{"id":13643645,"url":"https://github.com/19801201/SpinalHDL_CNN_Accelerator","last_synced_at":"2025-04-21T02:30:58.532Z","repository":{"id":37457205,"uuid":"442028500","full_name":"19801201/SpinalHDL_CNN_Accelerator","owner":"19801201","description":"CNN accelerator implemented with Spinal HDL","archived":false,"fork":false,"pushed_at":"2024-01-29T12:46:19.000Z","size":2362,"stargazers_count":134,"open_issues_count":0,"forks_count":35,"subscribers_count":6,"default_branch":"dev","last_synced_at":"2024-11-09T15:43:16.321Z","etag":null,"topics":["cnn","fpga","object-detection","spinalhdl","xilinx","yolo"],"latest_commit_sha":null,"homepage":"","language":"Scala","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"gpl-3.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/19801201.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2021-12-27T02:24:12.000Z","updated_at":"2024-11-07T06:07:50.000Z","dependencies_parsed_at":"2024-01-29T15:01:47.669Z","dependency_job_id":null,"html_url":"https://github.com/19801201/SpinalHDL_CNN_Accelerator","commit_stats":null,"previous_names":[],"tags_count":1,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/19801201%2FSpinalHDL_CNN_Accelerator","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/19801201%2FSpinalHDL_CNN_Accelerator/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/19801201%2FSpinalHDL_CNN_Accelerator/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/19801201%2FSpinalHDL_CNN_Accelerator/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/19801201","download_url":"https://codeload.github.com/19801201/SpinalHDL_CNN_Accelerator/tar.gz/refs/heads/dev","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":249986043,"owners_count":21356313,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["cnn","fpga","object-detection","spinalhdl","xilinx","yolo"],"created_at":"2024-08-02T01:01:50.699Z","updated_at":"2025-04-21T02:30:53.524Z","avatar_url":"https://github.com/19801201.png","language":"Scala","funding_links":[],"categories":["Neural Network Accelerators","Lighter and Deployment Frameworks","Applications"],"sub_categories":[],"readme":"# About SpinalHDL_CNN_Accelerator\n\n![GitHub](https://img.shields.io/github/license/liuwei9/spinal_yolo)\n\n\n\n[中文说明](./README_CN.md)\n\n## Implementing accelerator supporting various neural networks in SpinalHDL\n\n- This repository is implementing common operators in CNN in SpinalHDL 1.7.3.It can be guided by compiler to generate accelerators for various neural networks.\n- This repository aims to implement a general accelerator at the SpinalHDL level and a special accelerator at the Verilog level.\n- This repository implements an Npu module, which can be put into the project,as shown in the figure.\n\n![block_design](./img/block_design.png)\n\n- The resource occupation in FPGA is shown in the figure below:\n\n![resource.png](./img/resource.png)\n\n## Description\n\nThis repository hosts a CNN Accelerator implementation written in SpinalHDL. Here are some specs :\n\n- Easy to use\n- Complete implementation of convolution, quantization and shape \n- Configurable parametric interface\n- Optional convolution kernel type\n- The FPGA resource occupation is optimized at the code level\n- Implementation of rich tool class code\n- Access control of DMA and AXI\n- Automatically generate TCL files for instantiating Xilinx IP\n- Top-level files are easy to run\n- Implementation of the simulation of convolution\n\n## RTL code generation\nYou can find three runnable top modules in:\n- `src/main/scala/top.scala`\n- `src/main/scala/Npu.scala`\n- `src/test/scala/TbConv.scala`\n\nNOTES:\n- It could take time when you run it.\n- `top.scala` is used to implement convolution.\n- `Npu.scala` is used to implement complete project process.\n- `TbConv.scala` is used to implement the simulation of convolution.\n- Before you run the `TbConv.scala`,you should prepare files with feature and weight in advance.\n\n\n\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2F19801201%2FSpinalHDL_CNN_Accelerator","html_url":"https://awesome.ecosyste.ms/projects/github.com%2F19801201%2FSpinalHDL_CNN_Accelerator","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2F19801201%2FSpinalHDL_CNN_Accelerator/lists"}