{"id":18694258,"url":"https://github.com/9elements/u-boot-acpi","last_synced_at":"2026-03-04T13:30:51.779Z","repository":{"id":245281476,"uuid":"817339610","full_name":"9elements/u-boot-acpi","owner":"9elements","description":null,"archived":false,"fork":false,"pushed_at":"2025-03-14T16:03:34.000Z","size":339851,"stargazers_count":3,"open_issues_count":2,"forks_count":0,"subscribers_count":0,"default_branch":"master","last_synced_at":"2026-01-25T23:18:30.340Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"C","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/9elements.png","metadata":{"files":{"readme":"README","changelog":null,"contributing":null,"funding":null,"license":"Licenses/Exceptions","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null}},"created_at":"2024-06-19T13:52:59.000Z","updated_at":"2024-11-12T13:46:02.000Z","dependencies_parsed_at":"2025-04-12T07:05:02.934Z","dependency_job_id":null,"html_url":"https://github.com/9elements/u-boot-acpi","commit_stats":null,"previous_names":["9elements/u-boot-acpi"],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/9elements/u-boot-acpi","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/9elements%2Fu-boot-acpi","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/9elements%2Fu-boot-acpi/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/9elements%2Fu-boot-acpi/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/9elements%2Fu-boot-acpi/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/9elements","download_url":"https://codeload.github.com/9elements/u-boot-acpi/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/9elements%2Fu-boot-acpi/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":30081402,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-03-04T13:22:36.021Z","status":"ssl_error","status_checked_at":"2026-03-04T13:20:45.750Z","response_time":59,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-11-07T11:09:04.933Z","updated_at":"2026-03-04T13:30:51.761Z","avatar_url":"https://github.com/9elements.png","language":"C","readme":"# SPDX-License-Identifier: GPL-2.0+\n#\n# (C) Copyright 2000 - 2013\n# Wolfgang Denk, DENX Software Engineering, wd@denx.de.\n\nSummary:\n========\n\nThis directory contains the source code for U-Boot, a boot loader for\nEmbedded boards based on PowerPC, ARM, MIPS and several other\nprocessors, which can be installed in a boot ROM and used to\ninitialize and test the hardware or to download and run application\ncode.\n\nThe development of U-Boot is closely related to Linux: some parts of\nthe source code originate in the Linux source tree, we have some\nheader files in common, and special provision has been made to\nsupport booting of Linux images.\n\nSome attention has been paid to make this software easily\nconfigurable and extendable. For instance, all monitor commands are\nimplemented with the same call interface, so that it's very easy to\nadd new commands. Also, instead of permanently adding rarely used\ncode (for instance hardware test utilities) to the monitor, you can\nload and run it dynamically.\n\n\nStatus:\n=======\n\nIn general, all boards for which a default configuration file exists in the\nconfigs/ directory have been tested to some extent and can be considered\n\"working\". In fact, many of them are used in production systems.\n\nIn case of problems you can use\n\n     scripts/get_maintainer.pl \u003cpath\u003e\n\nto identify the people or companies responsible for various boards and\nsubsystems. Or have a look at the git log.\n\n\nWhere to get help:\n==================\n\nIn case you have questions about, problems with or contributions for\nU-Boot, you should send a message to the U-Boot mailing list at\n\u003cu-boot@lists.denx.de\u003e. There is also an archive of previous traffic\non the mailing list - please search the archive before asking FAQ's.\nPlease see https://lists.denx.de/pipermail/u-boot and\nhttps://marc.info/?l=u-boot\n\nWhere to get source code:\n=========================\n\nThe U-Boot source code is maintained in the Git repository at\nhttps://source.denx.de/u-boot/u-boot.git ; you can browse it online at\nhttps://source.denx.de/u-boot/u-boot\n\nThe \"Tags\" links on this page allow you to download tarballs of\nany version you might be interested in. Official releases are also\navailable from the DENX file server through HTTPS or FTP.\nhttps://ftp.denx.de/pub/u-boot/\nftp://ftp.denx.de/pub/u-boot/\n\n\nWhere we come from:\n===================\n\n- start from 8xxrom sources\n- create PPCBoot project (https://sourceforge.net/projects/ppcboot)\n- clean up code\n- make it easier to add custom boards\n- make it possible to add other [PowerPC] CPUs\n- extend functions, especially:\n  * Provide extended interface to Linux boot loader\n  * S-Record download\n  * network boot\n  * ATA disk / SCSI ... boot\n- create ARMBoot project (https://sourceforge.net/projects/armboot)\n- add other CPU families (starting with ARM)\n- create U-Boot project (https://sourceforge.net/projects/u-boot)\n- current project page: see https://www.denx.de/wiki/U-Boot\n\n\nNames and Spelling:\n===================\n\nThe \"official\" name of this project is \"Das U-Boot\". The spelling\n\"U-Boot\" shall be used in all written text (documentation, comments\nin source files etc.). Example:\n\n\tThis is the README file for the U-Boot project.\n\nFile names etc. shall be based on the string \"u-boot\". Examples:\n\n\tinclude/asm-ppc/u-boot.h\n\n\t#include \u003casm/u-boot.h\u003e\n\nVariable names, preprocessor constants etc. shall be either based on\nthe string \"u_boot\" or on \"U_BOOT\". Example:\n\n\tU_BOOT_VERSION\t\tu_boot_logo\n\tIH_OS_U_BOOT\t\tu_boot_hush_start\n\n\nSoftware Configuration:\n=======================\n\nSelection of Processor Architecture and Board Type:\n---------------------------------------------------\n\nFor all supported boards there are ready-to-use default\nconfigurations available; just type \"make \u003cboard_name\u003e_defconfig\".\n\nExample: For a TQM823L module type:\n\n\tcd u-boot\n\tmake TQM823L_defconfig\n\nNote: If you're looking for the default configuration file for a board\nyou're sure used to be there but is now missing, check the file\ndoc/README.scrapyard for a list of no longer supported boards.\n\nSandbox Environment:\n--------------------\n\nU-Boot can be built natively to run on a Linux host using the 'sandbox'\nboard. This allows feature development which is not board- or architecture-\nspecific to be undertaken on a native platform. The sandbox is also used to\nrun some of U-Boot's tests.\n\nSee doc/arch/sandbox/sandbox.rst for more details.\n\nThe following options need to be configured:\n\n- CPU Type:\tDefine exactly one, e.g. CONFIG_MPC85XX.\n\n- Board Type:\tDefine exactly one, e.g. CONFIG_MPC8540ADS.\n\n- 85xx CPU Options:\n\t\tCONFIG_SYS_PPC64\n\n\t\tSpecifies that the core is a 64-bit PowerPC implementation (implements\n\t\tthe \"64\" category of the Power ISA). This is necessary for ePAPR\n\t\tcompliance, among other possible reasons.\n\n\t\tCONFIG_SYS_FSL_ERRATUM_A004510\n\n\t\tEnables a workaround for erratum A004510.  If set,\n\t\tthen CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and\n\t\tCFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.\n\n\t\tCONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV\n\t\tCONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)\n\n\t\tDefines one or two SoC revisions (low 8 bits of SVR)\n\t\tfor which the A004510 workaround should be applied.\n\n\t\tThe rest of SVR is either not relevant to the decision\n\t\tof whether the erratum is present (e.g. p2040 versus\n\t\tp2041) or is implied by the build target, which controls\n\t\twhether CONFIG_SYS_FSL_ERRATUM_A004510 is set.\n\n\t\tSee Freescale App Note 4493 for more information about\n\t\tthis erratum.\n\n\t\tCFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY\n\n\t\tThis is the value to write into CCSR offset 0x18600\n\t\taccording to the A004510 workaround.\n\n\t\tCONFIG_SYS_FSL_SINGLE_SOURCE_CLK\n\t\tSingle Source Clock is clocking mode present in some of FSL SoC's.\n\t\tIn this mode, a single differential clock is used to supply\n\t\tclocks to the sysclock, ddrclock and usbclock.\n\n- Generic CPU options:\n\n\t\tCONFIG_SYS_FSL_DDR\n\t\tFreescale DDR driver in use. This type of DDR controller is\n\t\tfound in mpc83xx, mpc85xx as well as some ARM core SoCs.\n\n\t\tCFG_SYS_FSL_DDR_ADDR\n\t\tFreescale DDR memory-mapped register base.\n\n\t\tCONFIG_SYS_FSL_IFC_CLK_DIV\n\t\tDefines divider of platform clock(clock input to IFC controller).\n\n\t\tCONFIG_SYS_FSL_LBC_CLK_DIV\n\t\tDefines divider of platform clock(clock input to eLBC controller).\n\n\t\tCFG_SYS_FSL_DDR_SDRAM_BASE_PHY\n\t\tPhysical address from the view of DDR controllers. It is the\n\t\tsame as CFG_SYS_DDR_SDRAM_BASE for  all Power SoCs. But\n\t\tit could be different for ARM SoCs.\n\n- ARM options:\n\t\tCFG_SYS_EXCEPTION_VECTORS_HIGH\n\n\t\tSelect high exception vectors of the ARM core, e.g., do not\n\t\tclear the V bit of the c1 register of CP15.\n\n\t\tCOUNTER_FREQUENCY\n\t\tGeneric timer clock source frequency.\n\n\t\tCOUNTER_FREQUENCY_REAL\n\t\tGeneric timer clock source frequency if the real clock is\n\t\tdifferent from COUNTER_FREQUENCY, and can only be determined\n\t\tat run time.\n\n- Linux Kernel Interface:\n\t\tCONFIG_OF_LIBFDT\n\n\t\tNew kernel versions are expecting firmware settings to be\n\t\tpassed using flattened device trees (based on open firmware\n\t\tconcepts).\n\n\t\tCONFIG_OF_LIBFDT\n\t\t * New libfdt-based support\n\t\t * Adds the \"fdt\" command\n\t\t * The bootm command automatically updates the fdt\n\n\t\tOF_TBCLK - The timebase frequency.\n\n\t\tboards with QUICC Engines require OF_QE to set UCC MAC\n\t\taddresses\n\n\t\tCONFIG_OF_IDE_FIXUP\n\n\t\tU-Boot can detect if an IDE device is present or not.\n\t\tIf not, and this new config option is activated, U-Boot\n\t\tremoves the ATA node from the DTS before booting Linux,\n\t\tso the Linux IDE driver does not probe the device and\n\t\tcrash. This is needed for buggy hardware (uc101) where\n\t\tno pull down resistor is connected to the signal IDE5V_DD7.\n\n- vxWorks boot parameters:\n\n\t\tbootvx constructs a valid bootline using the following\n\t\tenvironments variables: bootdev, bootfile, ipaddr, netmask,\n\t\tserverip, gatewayip, hostname, othbootargs.\n\t\tIt loads the vxWorks image pointed bootfile.\n\n\t\tNote: If a \"bootargs\" environment is defined, it will override\n\t\tthe defaults discussed just above.\n\n- Cache Configuration for ARM:\n\t\tCFG_SYS_PL310_BASE - Physical base address of PL310\n\t\t\t\t\tcontroller register space\n\n- Serial Ports:\n\t\tCFG_PL011_CLOCK\n\n\t\tIf you have Amba PrimeCell PL011 UARTs, set this variable to\n\t\tthe clock speed of the UARTs.\n\n\t\tCFG_PL01x_PORTS\n\n\t\tIf you have Amba PrimeCell PL010 or PL011 UARTs on your board,\n\t\tdefine this to a list of base addresses for each (supported)\n\t\tport. See e.g. include/configs/versatile.h\n\n\t\tCONFIG_SERIAL_HW_FLOW_CONTROL\n\n\t\tDefine this variable to enable hw flow control in serial driver.\n\t\tCurrent user of this option is drivers/serial/nsl16550.c driver\n\n- Removal of commands\n\t\tIf no commands are needed to boot, you can disable\n\t\tCONFIG_CMDLINE to remove them. In this case, the command line\n\t\twill not be available, and when U-Boot wants to execute the\n\t\tboot command (on start-up) it will call board_run_command()\n\t\tinstead. This can reduce image size significantly for very\n\t\tsimple boot procedures.\n\n- Regular expression support:\n\t\tCONFIG_REGEX\n\t\tIf this variable is defined, U-Boot is linked against\n\t\tthe SLRE (Super Light Regular Expression) library,\n\t\twhich adds regex support to some commands, as for\n\t\texample \"env grep\" and \"setexpr\".\n\n- Watchdog:\n\t\tCFG_SYS_WATCHDOG_FREQ\n\t\tSome platforms automatically call WATCHDOG_RESET()\n\t\tfrom the timer interrupt handler every\n\t\tCFG_SYS_WATCHDOG_FREQ interrupts. If not set by the\n\t\tboard configuration file, a default of CONFIG_SYS_HZ/2\n\t\t(i.e. 500) is used. Setting CFG_SYS_WATCHDOG_FREQ\n\t\tto 0 disables calling WATCHDOG_RESET() from the timer\n\t\tinterrupt.\n\n- GPIO Support:\n\t\tThe CFG_SYS_I2C_PCA953X_WIDTH option specifies a list of\n\t\tchip-ngpio pairs that tell the PCA953X driver the number of\n\t\tpins supported by a particular chip.\n\n\t\tNote that if the GPIO device uses I2C, then the I2C interface\n\t\tmust also be configured. See I2C Support, below.\n\n- I/O tracing:\n\t\tWhen CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O\n\t\taccesses and can checksum them or write a list of them out\n\t\tto memory. See the 'iotrace' command for details. This is\n\t\tuseful for testing device drivers since it can confirm that\n\t\tthe driver behaves the same way before and after a code\n\t\tchange. Currently this is supported on sandbox and arm. To\n\t\tadd support for your architecture, add '#include \u003ciotrace.h\u003e'\n\t\tto the bottom of arch/\u003carch\u003e/include/asm/io.h and test.\n\n\t\tExample output from the 'iotrace stats' command is below.\n\t\tNote that if the trace buffer is exhausted, the checksum will\n\t\tstill continue to operate.\n\n\t\t\tiotrace is enabled\n\t\t\tStart:  10000000\t(buffer start address)\n\t\t\tSize:   00010000\t(buffer size)\n\t\t\tOffset: 00000120\t(current buffer offset)\n\t\t\tOutput: 10000120\t(start + offset)\n\t\t\tCount:  00000018\t(number of trace records)\n\t\t\tCRC32:  9526fb66\t(CRC32 of all trace records)\n\n- Timestamp Support:\n\n\t\tWhen CONFIG_TIMESTAMP is selected, the timestamp\n\t\t(date and time) of an image is printed by image\n\t\tcommands like bootm or iminfo. This option is\n\t\tautomatically enabled when you select CONFIG_CMD_DATE .\n\n- Partition Labels (disklabels) Supported:\n\t\tZero or more of the following:\n\t\tCONFIG_MAC_PARTITION   Apple's MacOS partition table.\n\t\tCONFIG_ISO_PARTITION   ISO partition table, used on CDROM etc.\n\t\tCONFIG_EFI_PARTITION   GPT partition table, common when EFI is the\n\t\t\t\t       bootloader.  Note 2TB partition limit; see\n\t\t\t\t       disk/part_efi.c\n\t\tCONFIG_SCSI) you must configure support for at\n\t\tleast one non-MTD partition type as well.\n\n- NETWORK Support (PCI):\n\t\tCONFIG_E1000_SPI\n\t\tUtility code for direct access to the SPI bus on Intel 8257x.\n\t\tThis does not do anything useful unless you set at least one\n\t\tof CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.\n\n\t\tCONFIG_NATSEMI\n\t\tSupport for National dp83815 chips.\n\n\t\tCONFIG_NS8382X\n\t\tSupport for National dp8382[01] gigabit chips.\n\n- NETWORK Support (other):\n\t\tCONFIG_CALXEDA_XGMAC\n\t\tSupport for the Calxeda XGMAC device\n\n\t\tCONFIG_LAN91C96\n\t\tSupport for SMSC's LAN91C96 chips.\n\n\t\t\tCONFIG_LAN91C96_USE_32_BIT\n\t\t\tDefine this to enable 32 bit addressing\n\n\t\t\tCFG_SYS_DAVINCI_EMAC_PHY_COUNT\n\t\t\tDefine this if you have more then 3 PHYs.\n\n\t\tCONFIG_FTGMAC100\n\t\tSupport for Faraday's FTGMAC100 Gigabit SoC Ethernet\n\n\t\t\tCONFIG_FTGMAC100_EGIGA\n\t\t\tDefine this to use GE link update with gigabit PHY.\n\t\t\tDefine this if FTGMAC100 is connected to gigabit PHY.\n\t\t\tIf your system has 10/100 PHY only, it might not occur\n\t\t\twrong behavior. Because PHY usually return timeout or\n\t\t\tuseless data when polling gigabit status and gigabit\n\t\t\tcontrol registers. This behavior won't affect the\n\t\t\tcorrectnessof 10/100 link speed update.\n\n\t\tCONFIG_SH_ETHER\n\t\tSupport for Renesas on-chip Ethernet controller\n\n\t\t\tCFG_SH_ETHER_USE_PORT\n\t\t\tDefine the number of ports to be used\n\n\t\t\tCFG_SH_ETHER_PHY_ADDR\n\t\t\tDefine the ETH PHY's address\n\n\t\t\tCFG_SH_ETHER_CACHE_WRITEBACK\n\t\t\tIf this option is set, the driver enables cache flush.\n\n- TPM Support:\n\t\tCONFIG_TPM\n\t\tSupport TPM devices.\n\n\t\tCONFIG_TPM_TIS_INFINEON\n\t\tSupport for Infineon i2c bus TPM devices. Only one device\n\t\tper system is supported at this time.\n\n\t\t\tCONFIG_TPM_TIS_I2C_BURST_LIMITATION\n\t\t\tDefine the burst count bytes upper limit\n\n\t\tCONFIG_TPM_ST33ZP24\n\t\tSupport for STMicroelectronics TPM devices. Requires DM_TPM support.\n\n\t\t\tCONFIG_TPM_ST33ZP24_I2C\n\t\t\tSupport for STMicroelectronics ST33ZP24 I2C devices.\n\t\t\tRequires TPM_ST33ZP24 and I2C.\n\n\t\t\tCONFIG_TPM_ST33ZP24_SPI\n\t\t\tSupport for STMicroelectronics ST33ZP24 SPI devices.\n\t\t\tRequires TPM_ST33ZP24 and SPI.\n\n\t\tCONFIG_TPM_ATMEL_TWI\n\t\tSupport for Atmel TWI TPM device. Requires I2C support.\n\n\t\tCONFIG_TPM_TIS_LPC\n\t\tSupport for generic parallel port TPM devices. Only one device\n\t\tper system is supported at this time.\n\n\t\tCONFIG_TPM\n\t\tDefine this to enable the TPM support library which provides\n\t\tfunctional interfaces to some TPM commands.\n\t\tRequires support for a TPM device.\n\n\t\tCONFIG_TPM_AUTH_SESSIONS\n\t\tDefine this to enable authorized functions in the TPM library.\n\t\tRequires CONFIG_TPM and CONFIG_SHA1.\n\n- USB Support:\n\t\tAt the moment only the UHCI host controller is\n\t\tsupported (PIP405, MIP405); define\n\t\tCONFIG_USB_UHCI to enable it.\n\t\tdefine CONFIG_USB_KEYBOARD to enable the USB Keyboard\n\t\tand define CONFIG_USB_STORAGE to enable the USB\n\t\tstorage devices.\n\t\tNote:\n\t\tSupported are USB Keyboards and USB Floppy drives\n\t\t(TEAC FD-05PUB).\n\n\t\tCONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2\n\t\tHW module registers.\n\n- USB Device:\n\t\tDefine the below if you wish to use the USB console.\n\t\tOnce firmware is rebuilt from a serial console issue the\n\t\tcommand \"setenv stdin usbtty; setenv stdout usbtty\" and\n\t\tattach your USB cable. The Unix command \"dmesg\" should print\n\t\tit has found a new device. The environment variable usbtty\n\t\tcan be set to gserial or cdc_acm to enable your device to\n\t\tappear to a USB host as a Linux gserial device or a\n\t\tCommon Device Class Abstract Control Model serial device.\n\t\tIf you select usbtty = gserial you should be able to enumerate\n\t\ta Linux host by\n\t\t# modprobe usbserial vendor=0xVendorID product=0xProductID\n\t\telse if using cdc_acm, simply setting the environment\n\t\tvariable usbtty to be cdc_acm should suffice. The following\n\t\tmight be defined in YourBoardName.h\n\n\t\tIf you have a USB-IF assigned VendorID then you may wish to\n\t\tdefine your own vendor specific values either in BoardName.h\n\t\tor directly in usbd_vendor_info.h. If you don't define\n\t\tCONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,\n\t\tCONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot\n\t\tshould pretend to be a Linux device to it's target host.\n\n\t\t\tCONFIG_USBD_MANUFACTURER\n\t\t\tDefine this string as the name of your company for\n\t\t\t- CONFIG_USBD_MANUFACTURER \"my company\"\n\n\t\t\tCONFIG_USBD_PRODUCT_NAME\n\t\t\tDefine this string as the name of your product\n\t\t\t- CONFIG_USBD_PRODUCT_NAME \"acme usb device\"\n\n\t\t\tCONFIG_USBD_VENDORID\n\t\t\tDefine this as your assigned Vendor ID from the USB\n\t\t\tImplementors Forum. This *must* be a genuine Vendor ID\n\t\t\tto avoid polluting the USB namespace.\n\t\t\t- CONFIG_USBD_VENDORID 0xFFFF\n\n\t\t\tCONFIG_USBD_PRODUCTID\n\t\t\tDefine this as the unique Product ID\n\t\t\tfor your device\n\t\t\t- CONFIG_USBD_PRODUCTID 0xFFFF\n\n- ULPI Layer Support:\n\t\tThe ULPI (UTMI Low Pin (count) Interface) PHYs are supported via\n\t\tthe generic ULPI layer. The generic layer accesses the ULPI PHY\n\t\tvia the platform viewport, so you need both the genric layer and\n\t\tthe viewport enabled. Currently only Chipidea/ARC based\n\t\tviewport is supported.\n\t\tTo enable the ULPI layer support, define CONFIG_USB_ULPI and\n\t\tCONFIG_USB_ULPI_VIEWPORT in your board configuration file.\n\t\tIf your ULPI phy needs a different reference clock than the\n\t\tstandard 24 MHz then you have to define CFG_ULPI_REF_CLK to\n\t\tthe appropriate value in Hz.\n\n- MMC Support:\n\t\tCONFIG_SH_MMCIF\n\t\tSupport for Renesas on-chip MMCIF controller\n\n\t\t\tCONFIG_SH_MMCIF_ADDR\n\t\t\tDefine the base address of MMCIF registers\n\n\t\t\tCONFIG_SH_MMCIF_CLK\n\t\t\tDefine the clock frequency for MMCIF\n\n- USB Device Firmware Update (DFU) class support:\n\t\tCONFIG_DFU_OVER_USB\n\t\tThis enables the USB portion of the DFU USB class\n\n\t\tCONFIG_DFU_NAND\n\t\tThis enables support for exposing NAND devices via DFU.\n\n\t\tCONFIG_DFU_RAM\n\t\tThis enables support for exposing RAM via DFU.\n\t\tNote: DFU spec refer to non-volatile memory usage, but\n\t\tallow usages beyond the scope of spec - here RAM usage,\n\t\tone that would help mostly the developer.\n\n\t\tCONFIG_SYS_DFU_DATA_BUF_SIZE\n\t\tDfu transfer uses a buffer before writing data to the\n\t\traw storage device. Make the size (in bytes) of this buffer\n\t\tconfigurable. The size of this buffer is also configurable\n\t\tthrough the \"dfu_bufsiz\" environment variable.\n\n\t\tCONFIG_SYS_DFU_MAX_FILE_SIZE\n\t\tWhen updating files rather than the raw storage device,\n\t\twe use a static buffer to copy the file into and then write\n\t\tthe buffer once we've been given the whole file.  Define\n\t\tthis to the maximum filesize (in bytes) for the buffer.\n\t\tDefault is 4 MiB if undefined.\n\n\t\tDFU_DEFAULT_POLL_TIMEOUT\n\t\tPoll timeout [ms], is the timeout a device can send to the\n\t\thost. The host must wait for this timeout before sending\n\t\ta subsequent DFU_GET_STATUS request to the device.\n\n\t\tDFU_MANIFEST_POLL_TIMEOUT\n\t\tPoll timeout [ms], which the device sends to the host when\n\t\tentering dfuMANIFEST state. Host waits this timeout, before\n\t\tsending again an USB request to the device.\n\n- Keyboard Support:\n\t\tSee Kconfig help for available keyboard drivers.\n\n- MII/PHY support:\n\t\tCONFIG_PHY_CLOCK_FREQ (ppc4xx)\n\n\t\tThe clock frequency of the MII bus\n\n\t\tCONFIG_PHY_CMD_DELAY (ppc4xx)\n\n\t\tSome PHY like Intel LXT971A need extra delay after\n\t\tcommand issued before MII status register can be read\n\n- BOOTP Recovery Mode:\n\t\tCONFIG_BOOTP_RANDOM_DELAY\n\n\t\tIf you have many targets in a network that try to\n\t\tboot using BOOTP, you may want to avoid that all\n\t\tsystems send out BOOTP requests at precisely the same\n\t\tmoment (which would happen for instance at recovery\n\t\tfrom a power failure, when all systems will try to\n\t\tboot, thus flooding the BOOTP server. Defining\n\t\tCONFIG_BOOTP_RANDOM_DELAY causes a random delay to be\n\t\tinserted before sending out BOOTP requests. The\n\t\tfollowing delays are inserted then:\n\n\t\t1st BOOTP request:\tdelay 0 ... 1 sec\n\t\t2nd BOOTP request:\tdelay 0 ... 2 sec\n\t\t3rd BOOTP request:\tdelay 0 ... 4 sec\n\t\t4th and following\n\t\tBOOTP requests:\t\tdelay 0 ... 8 sec\n\n\t\tCFG_BOOTP_ID_CACHE_SIZE\n\n\t\tBOOTP packets are uniquely identified using a 32-bit ID. The\n\t\tserver will copy the ID from client requests to responses and\n\t\tU-Boot will use this to determine if it is the destination of\n\t\tan incoming response. Some servers will check that addresses\n\t\taren't in use before handing them out (usually using an ARP\n\t\tping) and therefore take up to a few hundred milliseconds to\n\t\trespond. Network congestion may also influence the time it\n\t\ttakes for a response to make it back to the client. If that\n\t\ttime is too long, U-Boot will retransmit requests. In order\n\t\tto allow earlier responses to still be accepted after these\n\t\tretransmissions, U-Boot's BOOTP client keeps a small cache of\n\t\tIDs. The CFG_BOOTP_ID_CACHE_SIZE controls the size of this\n\t\tcache. The default is to keep IDs for up to four outstanding\n\t\trequests. Increasing this will allow U-Boot to accept offers\n\t\tfrom a BOOTP client in networks with unusually high latency.\n\n- DHCP Advanced Options:\n\n - Link-local IP address negotiation:\n\t\tNegotiate with other link-local clients on the local network\n\t\tfor an address that doesn't require explicit configuration.\n\t\tThis is especially useful if a DHCP server cannot be guaranteed\n\t\tto exist in all environments that the device must operate.\n\n\t\tSee doc/README.link-local for more information.\n\n - MAC address from environment variables\n\n\t\tFDT_SEQ_MACADDR_FROM_ENV\n\n\t\tFix-up device tree with MAC addresses fetched sequentially from\n\t\tenvironment variables. This config work on assumption that\n\t\tnon-usable ethernet node of device-tree are either not present\n\t\tor their status has been marked as \"disabled\".\n\n - CDP Options:\n\t\tCONFIG_CDP_DEVICE_ID\n\n\t\tThe device id used in CDP trigger frames.\n\n\t\tCONFIG_CDP_DEVICE_ID_PREFIX\n\n\t\tA two character string which is prefixed to the MAC address\n\t\tof the device.\n\n\t\tCONFIG_CDP_PORT_ID\n\n\t\tA printf format string which contains the ascii name of\n\t\tthe port. Normally is set to \"eth%d\" which sets\n\t\teth0 for the first Ethernet, eth1 for the second etc.\n\n\t\tCONFIG_CDP_CAPABILITIES\n\n\t\tA 32bit integer which indicates the device capabilities;\n\t\t0x00000010 for a normal host which does not forwards.\n\n\t\tCONFIG_CDP_VERSION\n\n\t\tAn ascii string containing the version of the software.\n\n\t\tCONFIG_CDP_PLATFORM\n\n\t\tAn ascii string containing the name of the platform.\n\n\t\tCONFIG_CDP_TRIGGER\n\n\t\tA 32bit integer sent on the trigger.\n\n\t\tCONFIG_CDP_POWER_CONSUMPTION\n\n\t\tA 16bit integer containing the power consumption of the\n\t\tdevice in .1 of milliwatts.\n\n\t\tCONFIG_CDP_APPLIANCE_VLAN_TYPE\n\n\t\tA byte containing the id of the VLAN.\n\n- Status LED:\tCONFIG_LED_STATUS\n\n\t\tSeveral configurations allow to display the current\n\t\tstatus using a LED. For instance, the LED will blink\n\t\tfast while running U-Boot code, stop blinking as\n\t\tsoon as a reply to a BOOTP request was received, and\n\t\tstart blinking slow once the Linux kernel is running\n\t\t(supported by a status LED driver in the Linux\n\t\tkernel). Defining CONFIG_LED_STATUS enables this\n\t\tfeature in U-Boot.\n\n\t\tAdditional options:\n\n\t\tCONFIG_LED_STATUS_GPIO\n\t\tThe status LED can be connected to a GPIO pin.\n\t\tIn such cases, the gpio_led driver can be used as a\n\t\tstatus LED backend implementation. Define CONFIG_LED_STATUS_GPIO\n\t\tto include the gpio_led driver in the U-Boot binary.\n\n\t\tCFG_GPIO_LED_INVERTED_TABLE\n\t\tSome GPIO connected LEDs may have inverted polarity in which\n\t\tcase the GPIO high value corresponds to LED off state and\n\t\tGPIO low value corresponds to LED on state.\n\t\tIn such cases CFG_GPIO_LED_INVERTED_TABLE may be defined\n\t\twith a list of GPIO LEDs that have inverted polarity.\n\n- I2C Support:\n\t\tCFG_SYS_NUM_I2C_BUSES\n\t\tHold the number of i2c buses you want to use.\n\n\t\tCFG_SYS_I2C_BUSES\n\t\thold a list of buses you want to use\n\n\t\t CFG_SYS_I2C_BUSES\t{{0, {I2C_NULL_HOP}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \\\n\t\t\t\t\t{1, {I2C_NULL_HOP}}, \\\n\t\t\t\t\t{1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \\\n\t\t\t\t\t{1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \\\n\t\t\t\t\t}\n\n\t\twhich defines\n\t\t\tbus 0 on adapter 0 without a mux\n\t\t\tbus 1 on adapter 0 with a PCA9547 on address 0x70 port 1\n\t\t\tbus 2 on adapter 0 with a PCA9547 on address 0x70 port 2\n\t\t\tbus 3 on adapter 0 with a PCA9547 on address 0x70 port 3\n\t\t\tbus 4 on adapter 0 with a PCA9547 on address 0x70 port 4\n\t\t\tbus 5 on adapter 0 with a PCA9547 on address 0x70 port 5\n\t\t\tbus 6 on adapter 1 without a mux\n\t\t\tbus 7 on adapter 1 with a PCA9544 on address 0x72 port 1\n\t\t\tbus 8 on adapter 1 with a PCA9544 on address 0x72 port 2\n\n\t\tIf you do not have i2c muxes on your board, omit this define.\n\n- Legacy I2C Support:\n\t\tIf you use the software i2c interface (CONFIG_SYS_I2C_SOFT)\n\t\tthen the following macros need to be defined (examples are\n\t\tfrom include/configs/lwmon.h):\n\n\t\tI2C_INIT\n\n\t\t(Optional). Any commands necessary to enable the I2C\n\t\tcontroller or configure ports.\n\n\t\teg: #define I2C_INIT (immr-\u003eim_cpm.cp_pbdir |=\tPB_SCL)\n\n\t\tI2C_ACTIVE\n\n\t\tThe code necessary to make the I2C data line active\n\t\t(driven).  If the data line is open collector, this\n\t\tdefine can be null.\n\n\t\teg: #define I2C_ACTIVE (immr-\u003eim_cpm.cp_pbdir |=  PB_SDA)\n\n\t\tI2C_TRISTATE\n\n\t\tThe code necessary to make the I2C data line tri-stated\n\t\t(inactive).  If the data line is open collector, this\n\t\tdefine can be null.\n\n\t\teg: #define I2C_TRISTATE (immr-\u003eim_cpm.cp_pbdir \u0026= ~PB_SDA)\n\n\t\tI2C_READ\n\n\t\tCode that returns true if the I2C data line is high,\n\t\tfalse if it is low.\n\n\t\teg: #define I2C_READ ((immr-\u003eim_cpm.cp_pbdat \u0026 PB_SDA) != 0)\n\n\t\tI2C_SDA(bit)\n\n\t\tIf \u003cbit\u003e is true, sets the I2C data line high. If it\n\t\tis false, it clears it (low).\n\n\t\teg: #define I2C_SDA(bit) \\\n\t\t\tif(bit) immr-\u003eim_cpm.cp_pbdat |=  PB_SDA; \\\n\t\t\telse\timmr-\u003eim_cpm.cp_pbdat \u0026= ~PB_SDA\n\n\t\tI2C_SCL(bit)\n\n\t\tIf \u003cbit\u003e is true, sets the I2C clock line high. If it\n\t\tis false, it clears it (low).\n\n\t\teg: #define I2C_SCL(bit) \\\n\t\t\tif(bit) immr-\u003eim_cpm.cp_pbdat |=  PB_SCL; \\\n\t\t\telse\timmr-\u003eim_cpm.cp_pbdat \u0026= ~PB_SCL\n\n\t\tI2C_DELAY\n\n\t\tThis delay is invoked four times per clock cycle so this\n\t\tcontrols the rate of data transfer.  The data rate thus\n\t\tis 1 / (I2C_DELAY * 4). Often defined to be something\n\t\tlike:\n\n\t\t#define I2C_DELAY  udelay(2)\n\n\t\tCONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA\n\n\t\tIf your arch supports the generic GPIO framework (asm/gpio.h),\n\t\tthen you may alternatively define the two GPIOs that are to be\n\t\tused as SCL / SDA.  Any of the previous I2C_xxx macros will\n\t\thave GPIO-based defaults assigned to them as appropriate.\n\n\t\tYou should define these to the GPIO value as given directly to\n\t\tthe generic GPIO functions.\n\n\t\tCFG_SYS_I2C_NOPROBES\n\n\t\tThis option specifies a list of I2C devices that will be skipped\n\t\twhen the 'i2c probe' command is issued.\n\n\t\te.g.\n\t\t\t#define CFG_SYS_I2C_NOPROBES {0x50,0x68}\n\n\t\twill skip addresses 0x50 and 0x68 on a board with one I2C bus\n\n\t\tCONFIG_SOFT_I2C_READ_REPEATED_START\n\n\t\tdefining this will force the i2c_read() function in\n\t\tthe soft_i2c driver to perform an I2C repeated start\n\t\tbetween writing the address pointer and reading the\n\t\tdata.  If this define is omitted the default behaviour\n\t\tof doing a stop-start sequence will be used.  Most I2C\n\t\tdevices can use either method, but some require one or\n\t\tthe other.\n\n- SPI Support:\tCONFIG_SPI\n\n\t\tEnables SPI driver (so far only tested with\n\t\tSPI EEPROM, also an instance works with Crystal A/D and\n\t\tD/As on the SACSng board)\n\n\t\tCFG_SYS_SPI_MXC_WAIT\n\t\tTimeout for waiting until spi transfer completed.\n\t\tdefault: (CONFIG_SYS_HZ/100)     /* 10 ms */\n\n- FPGA Support: CONFIG_FPGA\n\n\t\tEnables FPGA subsystem.\n\n\t\tCONFIG_FPGA_\u003cvendor\u003e\n\n\t\tEnables support for specific chip vendors.\n\t\t(ALTERA, XILINX)\n\n\t\tCONFIG_FPGA_\u003cfamily\u003e\n\n\t\tEnables support for FPGA family.\n\t\t(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)\n\n\t\tCONFIG_SYS_FPGA_CHECK_BUSY\n\n\t\tEnable checks on FPGA configuration interface busy\n\t\tstatus by the configuration function. This option\n\t\twill require a board or device specific function to\n\t\tbe written.\n\n\t\tCFG_FPGA_DELAY\n\n\t\tIf defined, a function that provides delays in the FPGA\n\t\tconfiguration driver.\n\n\t\tCFG_SYS_FPGA_CHECK_ERROR\n\n\t\tCheck for configuration errors during FPGA bitfile\n\t\tloading. For example, abort during Virtex II\n\t\tconfiguration if the INIT_B line goes low (which\n\t\tindicated a CRC error).\n\n\t\tCFG_SYS_FPGA_WAIT_INIT\n\n\t\tMaximum time to wait for the INIT_B line to de-assert\n\t\tafter PROB_B has been de-asserted during a Virtex II\n\t\tFPGA configuration sequence. The default time is 500\n\t\tms.\n\n\t\tCFG_SYS_FPGA_WAIT_BUSY\n\n\t\tMaximum time to wait for BUSY to de-assert during\n\t\tVirtex II FPGA configuration. The default is 5 ms.\n\n\t\tCFG_SYS_FPGA_WAIT_CONFIG\n\n\t\tTime to wait after FPGA configuration. The default is\n\t\t200 ms.\n\n- Vendor Parameter Protection:\n\n\t\tU-Boot considers the values of the environment\n\t\tvariables \"serial#\" (Board Serial Number) and\n\t\t\"ethaddr\" (Ethernet Address) to be parameters that\n\t\tare set once by the board vendor / manufacturer, and\n\t\tprotects these variables from casual modification by\n\t\tthe user. Once set, these variables are read-only,\n\t\tand write or delete attempts are rejected. You can\n\t\tchange this behaviour:\n\n\t\tIf CONFIG_ENV_OVERWRITE is #defined in your config\n\t\tfile, the write protection for vendor parameters is\n\t\tcompletely disabled. Anybody can change or delete\n\t\tthese parameters.\n\n\t\tThe same can be accomplished in a more flexible way\n\t\tfor any variable by configuring the type of access\n\t\tto allow for those variables in the \".flags\" variable\n\t\tor define CFG_ENV_FLAGS_LIST_STATIC.\n\n- Protected RAM:\n\t\tCFG_PRAM\n\n\t\tDefine this variable to enable the reservation of\n\t\t\"protected RAM\", i. e. RAM which is not overwritten\n\t\tby U-Boot. Define CFG_PRAM to hold the number of\n\t\tkB you want to reserve for pRAM. You can overwrite\n\t\tthis default value by defining an environment\n\t\tvariable \"pram\" to the number of kB you want to\n\t\treserve. Note that the board info structure will\n\t\tstill show the full amount of RAM. If pRAM is\n\t\treserved, a new environment variable \"mem\" will\n\t\tautomatically be defined to hold the amount of\n\t\tremaining RAM in a form that can be passed as boot\n\t\targument to Linux, for instance like that:\n\n\t\t\tsetenv bootargs ... mem=\\${mem}\n\t\t\tsaveenv\n\n\t\tThis way you can tell Linux not to use this memory,\n\t\teither, which results in a memory region that will\n\t\tnot be affected by reboots.\n\n\t\t*WARNING* If your board configuration uses automatic\n\t\tdetection of the RAM size, you must make sure that\n\t\tthis memory test is non-destructive. So far, the\n\t\tfollowing board configurations are known to be\n\t\t\"pRAM-clean\":\n\n\t\t\tIVMS8, IVML24, SPD8xx,\n\t\t\tHERMES, IP860, RPXlite, LWMON,\n\t\t\tFLAGADM\n\n- Error Recovery:\n\tNote:\n\n\t\tIn the current implementation, the local variables\n\t\tspace and global environment variables space are\n\t\tseparated. Local variables are those you define by\n\t\tsimply typing `name=value'. To access a local\n\t\tvariable later on, you have write `$name' or\n\t\t`${name}'; to execute the contents of a variable\n\t\tdirectly type `$name' at the command prompt.\n\n\t\tGlobal environment variables are those you use\n\t\tsetenv/printenv to work with. To run a command stored\n\t\tin such a variable, you need to use the run command,\n\t\tand you must not use the '$' sign to access them.\n\n\t\tTo store commands and special characters in a\n\t\tvariable, please use double quotation marks\n\t\tsurrounding the whole text of the variable, instead\n\t\tof the backslashes before semicolons and special\n\t\tsymbols.\n\n- Default Environment:\n\t\tCFG_EXTRA_ENV_SETTINGS\n\n\t\tDefine this to contain any number of null terminated\n\t\tstrings (variable = value pairs) that will be part of\n\t\tthe default environment compiled into the boot image.\n\n\t\tFor example, place something like this in your\n\t\tboard's config file:\n\n\t\t#define CFG_EXTRA_ENV_SETTINGS \\\n\t\t\t\"myvar1=value1\\0\" \\\n\t\t\t\"myvar2=value2\\0\"\n\n\t\tWarning: This method is based on knowledge about the\n\t\tinternal format how the environment is stored by the\n\t\tU-Boot code. This is NOT an official, exported\n\t\tinterface! Although it is unlikely that this format\n\t\twill change soon, there is no guarantee either.\n\t\tYou better know what you are doing here.\n\n\t\tNote: overly (ab)use of the default environment is\n\t\tdiscouraged. Make sure to check other ways to preset\n\t\tthe environment like the \"source\" command or the\n\t\tboot command first.\n\n\t\tCONFIG_DELAY_ENVIRONMENT\n\n\t\tNormally the environment is loaded when the board is\n\t\tinitialised so that it is available to U-Boot. This inhibits\n\t\tthat so that the environment is not available until\n\t\texplicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL\n\t\tthis is instead controlled by the value of\n\t\t/config/load-environment.\n\n- Automatic software updates via TFTP server\n\t\tCONFIG_UPDATE_TFTP\n\t\tCONFIG_UPDATE_TFTP_CNT_MAX\n\t\tCONFIG_UPDATE_TFTP_MSEC_MAX\n\n\t\tThese options enable and control the auto-update feature;\n\t\tfor a more detailed description refer to doc/README.update.\n\n- MTD Support (mtdparts command, UBI support)\n\t\tCONFIG_MTD_UBI_WL_THRESHOLD\n\t\tThis parameter defines the maximum difference between the highest\n\t\terase counter value and the lowest erase counter value of eraseblocks\n\t\tof UBI devices. When this threshold is exceeded, UBI starts performing\n\t\twear leveling by means of moving data from eraseblock with low erase\n\t\tcounter to eraseblocks with high erase counter.\n\n\t\tThe default value should be OK for SLC NAND flashes, NOR flashes and\n\t\tother flashes which have eraseblock life-cycle 100000 or more.\n\t\tHowever, in case of MLC NAND flashes which typically have eraseblock\n\t\tlife-cycle less than 10000, the threshold should be lessened (e.g.,\n\t\tto 128 or 256, although it does not have to be power of 2).\n\n\t\tdefault: 4096\n\n\t\tCONFIG_MTD_UBI_BEB_LIMIT\n\t\tThis option specifies the maximum bad physical eraseblocks UBI\n\t\texpects on the MTD device (per 1024 eraseblocks). If the\n\t\tunderlying flash does not admit of bad eraseblocks (e.g. NOR\n\t\tflash), this value is ignored.\n\n\t\tNAND datasheets often specify the minimum and maximum NVM\n\t\t(Number of Valid Blocks) for the flashes' endurance lifetime.\n\t\tThe maximum expected bad eraseblocks per 1024 eraseblocks\n\t\tthen can be calculated as \"1024 * (1 - MinNVB / MaxNVB)\",\n\t\twhich gives 20 for most NANDs (MaxNVB is basically the total\n\t\tcount of eraseblocks on the chip).\n\n\t\tTo put it differently, if this value is 20, UBI will try to\n\t\treserve about 1.9% of physical eraseblocks for bad blocks\n\t\thandling. And that will be 1.9% of eraseblocks on the entire\n\t\tNAND chip, not just the MTD partition UBI attaches. This means\n\t\tthat if you have, say, a NAND flash chip admits maximum 40 bad\n\t\teraseblocks, and it is split on two MTD partitions of the same\n\t\tsize, UBI will reserve 40 eraseblocks when attaching a\n\t\tpartition.\n\n\t\tdefault: 20\n\n\t\tCONFIG_MTD_UBI_FASTMAP\n\t\tFastmap is a mechanism which allows attaching an UBI device\n\t\tin nearly constant time. Instead of scanning the whole MTD device it\n\t\tonly has to locate a checkpoint (called fastmap) on the device.\n\t\tThe on-flash fastmap contains all information needed to attach\n\t\tthe device. Using fastmap makes only sense on large devices where\n\t\tattaching by scanning takes long. UBI will not automatically install\n\t\ta fastmap on old images, but you can set the UBI parameter\n\t\tCONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note\n\t\tthat fastmap-enabled images are still usable with UBI implementations\n\t\twithout\tfastmap support. On typical flash devices the whole fastmap\n\t\tfits into one PEB. UBI will reserve PEBs to hold two fastmaps.\n\n\t\tCONFIG_MTD_UBI_FASTMAP_AUTOCONVERT\n\t\tSet this parameter to enable fastmap automatically on images\n\t\twithout a fastmap.\n\t\tdefault: 0\n\n\t\tCONFIG_MTD_UBI_FM_DEBUG\n\t\tEnable UBI fastmap debug\n\t\tdefault: 0\n\n- SPL framework\n\t\tCONFIG_SPL\n\t\tEnable building of SPL globally.\n\n\t\tCONFIG_SPL_PANIC_ON_RAW_IMAGE\n\t\tWhen defined, SPL will panic() if the image it has\n\t\tloaded does not have a signature.\n\t\tDefining this is useful when code which loads images\n\t\tin SPL cannot guarantee that absolutely all read errors\n\t\twill be caught.\n\t\tAn example is the LPC32XX MLC NAND driver, which will\n\t\tconsider that a completely unreadable NAND block is bad,\n\t\tand thus should be skipped silently.\n\n\t\tCONFIG_SPL_DISPLAY_PRINT\n\t\tFor ARM, enable an optional function to print more information\n\t\tabout the running system.\n\n\t\tCONFIG_SPL_MPC83XX_WAIT_FOR_NAND\n\t\tSet this for NAND SPL on PPC mpc83xx targets, so that\n\t\tstart.S waits for the rest of the SPL to load before\n\t\tcontinuing (the hardware starts execution after just\n\t\tloading the first page rather than the full 4K).\n\n\t\tCONFIG_SPL_UBI\n\t\tSupport for a lightweight UBI (fastmap) scanner and\n\t\tloader\n\n\t\tCONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_SIZE,\n\t\tCONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE,\n\t\tCONFIG_SYS_NAND_BAD_BLOCK_POS, CFG_SYS_NAND_ECCPOS,\n\t\tCFG_SYS_NAND_ECCSIZE, CFG_SYS_NAND_ECCBYTES\n\t\tDefines the size and behavior of the NAND that SPL uses\n\t\tto read U-Boot\n\n\t\tCFG_SYS_NAND_U_BOOT_DST\n\t\tLocation in memory to load U-Boot to\n\n\t\tCFG_SYS_NAND_U_BOOT_SIZE\n\t\tSize of image to load\n\n\t\tCFG_SYS_NAND_U_BOOT_START\n\t\tEntry point in loaded image to jump to\n\n\t\tCONFIG_SPL_RAM_DEVICE\n\t\tSupport for running image already present in ram, in SPL binary\n\n\t\tCONFIG_SPL_FIT_PRINT\n\t\tPrinting information about a FIT image adds quite a bit of\n\t\tcode to SPL. So this is normally disabled in SPL. Use this\n\t\toption to re-enable it. This will affect the output of the\n\t\tbootm command when booting a FIT image.\n\n- Interrupt support (PPC):\n\n\t\tThere are common interrupt_init() and timer_interrupt()\n\t\tfor all PPC archs. interrupt_init() calls interrupt_init_cpu()\n\t\tfor CPU specific initialization. interrupt_init_cpu()\n\t\tshould set decrementer_count to appropriate value. If\n\t\tCPU resets decrementer automatically after interrupt\n\t\t(ppc4xx) it should set decrementer_count to zero.\n\t\ttimer_interrupt() calls timer_interrupt_cpu() for CPU\n\t\tspecific handling. If board has watchdog / status_led\n\t\t/ other_activity_monitor it works automatically from\n\t\tgeneral timer_interrupt().\n\n\nBoard initialization settings:\n------------------------------\n\nDuring Initialization u-boot calls a number of board specific functions\nto allow the preparation of board specific prerequisites, e.g. pin setup\nbefore drivers are initialized. To enable these callbacks the\nfollowing configuration macros have to be defined. Currently this is\narchitecture specific, so please check arch/your_architecture/lib/board.c\ntypically in board_init_f() and board_init_r().\n\n- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()\n- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()\n- CONFIG_BOARD_LATE_INIT: Call board_late_init()\n\nConfiguration Settings:\n-----------------------\n\n- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;\n\t\tundefine this when you're short of memory.\n\n- CFG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default\n\t\twidth of the commands listed in the 'help' command output.\n\n- CONFIG_SYS_PROMPT:\tThis is what U-Boot prints on the console to\n\t\tprompt for user input.\n\n- CFG_SYS_BAUDRATE_TABLE:\n\t\tList of legal baudrate settings for this board.\n\n- CFG_SYS_MEM_RESERVE_SECURE\n\t\tOnly implemented for ARMv8 for now.\n\t\tIf defined, the size of CFG_SYS_MEM_RESERVE_SECURE memory\n\t\tis substracted from total RAM and won't be reported to OS.\n\t\tThis memory can be used as secure memory. A variable\n\t\tgd-\u003earch.secure_ram is used to track the location. In systems\n\t\tthe RAM base is not zero, or RAM is divided into banks,\n\t\tthis variable needs to be recalcuated to get the address.\n\n- CFG_SYS_SDRAM_BASE:\n\t\tPhysical start address of SDRAM. _Must_ be 0 here.\n\n- CFG_SYS_FLASH_BASE:\n\t\tPhysical start address of Flash memory.\n\n- CONFIG_SYS_MALLOC_LEN:\n\t\tSize of DRAM reserved for malloc() use.\n\n- CFG_SYS_BOOTMAPSZ:\n\t\tMaximum size of memory mapped by the startup code of\n\t\tthe Linux kernel; all data that must be processed by\n\t\tthe Linux kernel (bd_info, boot arguments, FDT blob if\n\t\tused) must be put below this limit, unless \"bootm_low\"\n\t\tenvironment variable is defined and non-zero. In such case\n\t\tall data for the Linux kernel must be between \"bootm_low\"\n\t\tand \"bootm_low\" + CFG_SYS_BOOTMAPSZ.\t The environment\n\t\tvariable \"bootm_mapsize\" will override the value of\n\t\tCFG_SYS_BOOTMAPSZ.  If CFG_SYS_BOOTMAPSZ is undefined,\n\t\tthen the value in \"bootm_size\" will be used instead.\n\n- CONFIG_SYS_BOOT_GET_CMDLINE:\n\t\tEnables allocating and saving kernel cmdline in space between\n\t\t\"bootm_low\" and \"bootm_low\" + BOOTMAPSZ.\n\n- CONFIG_SYS_BOOT_GET_KBD:\n\t\tEnables allocating and saving a kernel copy of the bd_info in\n\t\tspace between \"bootm_low\" and \"bootm_low\" + BOOTMAPSZ.\n\n- CONFIG_SYS_FLASH_PROTECTION\n\t\tIf defined, hardware flash sectors protection is used\n\t\tinstead of U-Boot software protection.\n\n- CONFIG_SYS_FLASH_CFI:\n\t\tDefine if the flash driver uses extra elements in the\n\t\tcommon flash structure for storing flash geometry.\n\n- CONFIG_FLASH_CFI_DRIVER\n\t\tThis option also enables the building of the cfi_flash driver\n\t\tin the drivers directory\n\n- CONFIG_FLASH_CFI_MTD\n\t\tThis option enables the building of the cfi_mtd driver\n\t\tin the drivers directory. The driver exports CFI flash\n\t\tto the MTD layer.\n\n- CONFIG_SYS_FLASH_USE_BUFFER_WRITE\n\t\tUse buffered writes to flash.\n\n- CONFIG_ENV_FLAGS_LIST_DEFAULT\n- CFG_ENV_FLAGS_LIST_STATIC\n\tEnable validation of the values given to environment variables when\n\tcalling env set.  Variables can be restricted to only decimal,\n\thexadecimal, or boolean.  If CONFIG_CMD_NET is also defined,\n\tthe variables can also be restricted to IP address or MAC address.\n\n\tThe format of the list is:\n\t\ttype_attribute = [s|d|x|b|i|m]\n\t\taccess_attribute = [a|r|o|c]\n\t\tattributes = type_attribute[access_attribute]\n\t\tentry = variable_name[:attributes]\n\t\tlist = entry[,list]\n\n\tThe type attributes are:\n\t\ts - String (default)\n\t\td - Decimal\n\t\tx - Hexadecimal\n\t\tb - Boolean ([1yYtT|0nNfF])\n\t\ti - IP address\n\t\tm - MAC address\n\n\tThe access attributes are:\n\t\ta - Any (default)\n\t\tr - Read-only\n\t\to - Write-once\n\t\tc - Change-default\n\n\t- CONFIG_ENV_FLAGS_LIST_DEFAULT\n\t\tDefine this to a list (string) to define the \".flags\"\n\t\tenvironment variable in the default or embedded environment.\n\n\t- CFG_ENV_FLAGS_LIST_STATIC\n\t\tDefine this to a list (string) to define validation that\n\t\tshould be done if an entry is not found in the \".flags\"\n\t\tenvironment variable.  To override a setting in the static\n\t\tlist, simply add an entry for the same variable name to the\n\t\t\".flags\" variable.\n\n\tIf CONFIG_REGEX is defined, the variable_name above is evaluated as a\n\tregular expression. This allows multiple variables to define the same\n\tflags without explicitly listing them for each variable.\n\nThe following definitions that deal with the placement and management\nof environment data (variable area); in general, we support the\nfollowing configurations:\n\nBE CAREFUL! The first access to the environment happens quite early\nin U-Boot initialization (when we try to get the setting of for the\nconsole baudrate). You *MUST* have mapped your NVRAM area then, or\nU-Boot will hang.\n\nPlease note that even with NVRAM we still use a copy of the\nenvironment in RAM: we could work on NVRAM directly, but we want to\nkeep settings there always unmodified except somebody uses \"saveenv\"\nto save the current settings.\n\nBE CAREFUL! For some special cases, the local device can not use\n\"saveenv\" command. For example, the local device will get the\nenvironment stored in a remote NOR flash by SRIO or PCIE link,\nbut it can not erase, write this NOR flash by SRIO or PCIE interface.\n\n- CONFIG_NAND_ENV_DST\n\n\tDefines address in RAM to which the nand_spl code should copy the\n\tenvironment. If redundant environment is used, it will be copied to\n\tCONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.\n\nPlease note that the environment is read-only until the monitor\nhas been relocated to RAM and a RAM copy of the environment has been\ncreated; also, when using EEPROM you will have to use env_get_f()\nuntil then to read environment variables.\n\nThe environment is protected by a CRC32 checksum. Before the monitor\nis relocated into RAM, as a result of a bad CRC you will be working\nwith the compiled-in default environment - *silently*!!! [This is\nnecessary, because the first environment variable we need is the\n\"baudrate\" setting for the console - if we have a bad CRC, we don't\nhave any device yet where we could complain.]\n\nNote: once the monitor has been relocated, then it will complain if\nthe default environment is used; a new CRC is computed as soon as you\nuse the \"saveenv\" command to store a valid environment.\n\n- CONFIG_SYS_FAULT_MII_ADDR:\n\t\tMII address of the PHY to check for the Ethernet link state.\n\n- CONFIG_DISPLAY_BOARDINFO\n\t\tDisplay information about the board that U-Boot is running on\n\t\twhen U-Boot starts up. The board function checkboard() is called\n\t\tto do this.\n\n- CONFIG_DISPLAY_BOARDINFO_LATE\n\t\tSimilar to the previous option, but display this information\n\t\tlater, once stdio is running and output goes to the LCD, if\n\t\tpresent.\n\nLow Level (hardware related) configuration options:\n---------------------------------------------------\n\n- CONFIG_SYS_CACHELINE_SIZE:\n\t\tCache Line Size of the CPU.\n\n- CONFIG_SYS_CCSRBAR_DEFAULT:\n\t\tDefault (power-on reset) physical address of CCSR on Freescale\n\t\tPowerPC SOCs.\n\n- CFG_SYS_CCSRBAR:\n\t\tVirtual address of CCSR.  On a 32-bit build, this is typically\n\t\tthe same value as CONFIG_SYS_CCSRBAR_DEFAULT.\n\n- CFG_SYS_CCSRBAR_PHYS:\n\t\tPhysical address of CCSR.  CCSR can be relocated to a new\n\t\tphysical address, if desired.  In this case, this macro should\n\t\tbe set to that address.\t Otherwise, it should be set to the\n\t\tsame value as CONFIG_SYS_CCSRBAR_DEFAULT.  For example, CCSR\n\t\tis typically relocated on 36-bit builds.  It is recommended\n\t\tthat this macro be defined via the _HIGH and _LOW macros:\n\n\t\t#define CFG_SYS_CCSRBAR_PHYS ((CFG_SYS_CCSRBAR_PHYS_HIGH\n\t\t\t* 1ull) \u003c\u003c 32 | CFG_SYS_CCSRBAR_PHYS_LOW)\n\n- CFG_SYS_CCSRBAR_PHYS_HIGH:\n\t\tBits 33-36 of CFG_SYS_CCSRBAR_PHYS.\tThis value is typically\n\t\teither 0 (32-bit build) or 0xF (36-bit build).\tThis macro is\n\t\tused in assembly code, so it must not contain typecasts or\n\t\tinteger size suffixes (e.g. \"ULL\").\n\n- CFG_SYS_CCSRBAR_PHYS_LOW:\n\t\tLower 32-bits of CFG_SYS_CCSRBAR_PHYS.  This macro is\n\t\tused in assembly code, so it must not contain typecasts or\n\t\tinteger size suffixes (e.g. \"ULL\").\n\n- CONFIG_SYS_IMMR:\tPhysical address of the Internal Memory.\n\t\tDO NOT CHANGE unless you know exactly what you're\n\t\tdoing! (11-4) [MPC8xx systems only]\n\n- CFG_SYS_INIT_RAM_ADDR:\n\n\t\tStart address of memory area that can be used for\n\t\tinitial data and stack; please note that this must be\n\t\twritable memory that is working WITHOUT special\n\t\tinitialization, i. e. you CANNOT use normal RAM which\n\t\twill become available only after programming the\n\t\tmemory controller and running certain initialization\n\t\tsequences.\n\n\t\tU-Boot uses the following memory types:\n\t\t- MPC8xx: IMMR (internal memory of the CPU)\n\n- CONFIG_SYS_SCCR:\tSystem Clock and reset Control Register (15-27)\n\n- CONFIG_SYS_OR_TIMING_SDRAM:\n\t\tSDRAM timing\n\n- CONFIG_SYS_SRIOn_MEM_VIRT:\n\t\tVirtual Address of SRIO port 'n' memory region\n\n- CONFIG_SYS_SRIOn_MEM_PHYxS:\n\t\tPhysical Address of SRIO port 'n' memory region\n\n- CONFIG_SYS_SRIOn_MEM_SIZE:\n\t\tSize of SRIO port 'n' memory region\n\n- CONFIG_SYS_NAND_BUSWIDTH_16BIT\n\t\tDefined to tell the NAND controller that the NAND chip is using\n\t\ta 16 bit bus.\n\t\tNot all NAND drivers use this symbol.\n\t\tExample of drivers that use it:\n\t\t- drivers/mtd/nand/raw/ndfc.c\n\t\t- drivers/mtd/nand/raw/mxc_nand.c\n\n- CONFIG_SYS_NDFC_EBC0_CFG\n\t\tSets the EBC0_CFG register for the NDFC. If not defined\n\t\ta default value will be used.\n\n- CONFIG_SYS_SPD_BUS_NUM\n\t\tIf SPD EEPROM is on an I2C bus other than the first\n\t\tone, specify here. Note that the value must resolve\n\t\tto something your driver can deal with.\n\n- CONFIG_FSL_DDR_INTERACTIVE\n\t\tEnable interactive DDR debugging. See doc/README.fsl-ddr.\n\n- CONFIG_FSL_DDR_SYNC_REFRESH\n\t\tEnable sync of refresh for multiple controllers.\n\n- CONFIG_FSL_DDR_BIST\n\t\tEnable built-in memory test for Freescale DDR controllers.\n\n- CONFIG_RMII\n\t\tEnable RMII mode for all FECs.\n\t\tNote that this is a global option, we can't\n\t\thave one FEC in standard MII mode and another in RMII mode.\n\n- CONFIG_CRC32_VERIFY\n\t\tAdd a verify option to the crc32 command.\n\t\tThe syntax is:\n\n\t\t=\u003e crc32 -v \u003caddress\u003e \u003ccount\u003e \u003ccrc32\u003e\n\n\t\tWhere address/count indicate a memory area\n\t\tand crc32 is the correct crc32 which the\n\t\tarea should have.\n\n- CONFIG_LOOPW\n\t\tAdd the \"loopw\" memory command. This only takes effect if\n\t\tthe memory commands are activated globally (CONFIG_CMD_MEMORY).\n\n- CONFIG_CMD_MX_CYCLIC\n\t\tAdd the \"mdc\" and \"mwc\" memory commands. These are cyclic\n\t\t\"md/mw\" commands.\n\t\tExamples:\n\n\t\t=\u003e mdc.b 10 4 500\n\t\tThis command will print 4 bytes (10,11,12,13) each 500 ms.\n\n\t\t=\u003e mwc.l 100 12345678 10\n\t\tThis command will write 12345678 to address 100 all 10 ms.\n\n\t\tThis only takes effect if the memory commands are activated\n\t\tglobally (CONFIG_CMD_MEMORY).\n\n- CONFIG_XPL_BUILD\n\t\tSet when the currently running compilation is for an artifact\n\t\tthat will end up in one of the 'xPL' builds, i.e. SPL, TPL or\n\t\tVPL. Code that needs phase-specific behaviour can check this,\n\t\tor (where possible) use xpl_phase() instead.\n\n\t\tNote that CONFIG_XPL_BUILD *is* always defined when either\n\t\tof CONFIG_TPL_BUILD / CONFIG_VPL_BUILD is defined. This can be\n\t\tcounter-intuitive and should perhaps be changed.\n\n- CONFIG_TPL_BUILD\n\t\tSet when the currently running compilation is for an artifact\n\t\tthat will end up in the TPL build (as opposed to SPL, VPL or\n\t\tU-Boot proper). Code that needs phase-specific behaviour can\n\t\tcheck this, or (where possible) use xpl_phase() instead.\n\n- CONFIG_VPL_BUILD\n\t\tSet when the currently running compilation is for an artifact\n\t\tthat will end up in the VPL build (as opposed to the SPL, TPL\n\t\tor U-Boot proper). Code that needs phase-specific behaviour can\n\t\tcheck this, or (where possible) use xpl_phase() instead.\n\n- CONFIG_ARCH_MAP_SYSMEM\n\t\tGenerally U-Boot (and in particular the md command) uses\n\t\teffective address. It is therefore not necessary to regard\n\t\tU-Boot address as virtual addresses that need to be translated\n\t\tto physical addresses. However, sandbox requires this, since\n\t\tit maintains its own little RAM buffer which contains all\n\t\taddressable memory. This option causes some memory accesses\n\t\tto be mapped through map_sysmem() / unmap_sysmem().\n\n- CONFIG_X86_RESET_VECTOR\n\t\tIf defined, the x86 reset vector code is included. This is not\n\t\tneeded when U-Boot is running from Coreboot.\n\nFreescale QE/FMAN Firmware Support:\n-----------------------------------\n\nThe Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the\nloading of \"firmware\", which is encoded in the QE firmware binary format.\nThis firmware often needs to be loaded during U-Boot booting, so macros\nare used to identify the storage device (NOR flash, SPI, etc) and the address\nwithin that device.\n\n- CONFIG_SYS_FMAN_FW_ADDR\n\tThe address in the storage device where the FMAN microcode is located.  The\n\tmeaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro\n\tis also specified.\n\n- CONFIG_SYS_QE_FW_ADDR\n\tThe address in the storage device where the QE microcode is located.  The\n\tmeaning of this address depends on which CONFIG_SYS_QE_FMAN_FW_IN_xxx macro\n\tis also specified.\n\n- CONFIG_SYS_QE_FMAN_FW_LENGTH\n\tThe maximum possible size of the firmware.  The firmware binary format\n\thas a field that specifies the actual size of the firmware, but it\n\tmight not be possible to read any part of the firmware unless some\n\tlocal storage is allocated to hold the entire firmware first.\n\n- CONFIG_SYS_QE_FMAN_FW_IN_NOR\n\tSpecifies that QE/FMAN firmware is located in NOR flash, mapped as\n\tnormal addressable memory via the LBC.  CONFIG_SYS_FMAN_FW_ADDR is the\n\tvirtual address in NOR flash.\n\n- CONFIG_SYS_QE_FMAN_FW_IN_NAND\n\tSpecifies that QE/FMAN firmware is located in NAND flash.\n\tCONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.\n\n- CONFIG_SYS_QE_FMAN_FW_IN_MMC\n\tSpecifies that QE/FMAN firmware is located on the primary SD/MMC\n\tdevice.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.\n\n- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE\n\tSpecifies that QE/FMAN firmware is located in the remote (master)\n\tmemory space.\tCONFIG_SYS_FMAN_FW_ADDR is a virtual address which\n\tcan be mapped from slave TLB-\u003eslave LAW-\u003eslave SRIO or PCIE outbound\n\twindow-\u003emaster inbound window-\u003emaster LAW-\u003ethe ucode address in\n\tmaster's memory space.\n\nFreescale Layerscape Management Complex Firmware Support:\n---------------------------------------------------------\nThe Freescale Layerscape Management Complex (MC) supports the loading of\n\"firmware\".\nThis firmware often needs to be loaded during U-Boot booting, so macros\nare used to identify the storage device (NOR flash, SPI, etc) and the address\nwithin that device.\n\n- CONFIG_FSL_MC_ENET\n\tEnable the MC driver for Layerscape SoCs.\n\nFreescale Layerscape Debug Server Support:\n-------------------------------------------\nThe Freescale Layerscape Debug Server Support supports the loading of\n\"Debug Server firmware\" and triggering SP boot-rom.\nThis firmware often needs to be loaded during U-Boot booting.\n\n- CONFIG_SYS_MC_RSV_MEM_ALIGN\n\tDefine alignment of reserved memory MC requires\n\n\nBuilding the Software:\n======================\n\nBuilding U-Boot has been tested in several native build environments\nand in many different cross environments. Of course we cannot support\nall possibly existing versions of cross development tools in all\n(potentially obsolete) versions. In case of tool chain problems we\nrecommend to use the ELDK (see https://www.denx.de/wiki/DULG/ELDK)\nwhich is extensively used to build and test U-Boot.\n\nIf you are not using a native environment, it is assumed that you\nhave GNU cross compiling tools available in your path. In this case,\nyou must set the environment variable CROSS_COMPILE in your shell.\nNote that no changes to the Makefile or any other source files are\nnecessary. For example using the ELDK on a 4xx CPU, please enter:\n\n\t$ CROSS_COMPILE=ppc_4xx-\n\t$ export CROSS_COMPILE\n\nU-Boot is intended to be simple to build. After installing the\nsources you must configure U-Boot for one specific board type. This\nis done by typing:\n\n\tmake NAME_defconfig\n\nwhere \"NAME_defconfig\" is the name of one of the existing configu-\nrations; see configs/*_defconfig for supported names.\n\nNote: for some boards special configuration names may exist; check if\n      additional information is available from the board vendor; for\n      instance, the TQM823L systems are available without (standard)\n      or with LCD support. You can select such additional \"features\"\n      when choosing the configuration, i. e.\n\n      make TQM823L_defconfig\n\t- will configure for a plain TQM823L, i. e. no LCD support\n\n      make TQM823L_LCD_defconfig\n\t- will configure for a TQM823L with U-Boot console on LCD\n\n      etc.\n\n\nFinally, type \"make all\", and you should get some working U-Boot\nimages ready for download to / installation on your system:\n\n- \"u-boot.bin\" is a raw binary image\n- \"u-boot\" is an image in ELF binary format\n- \"u-boot.srec\" is in Motorola S-Record format\n\nUser specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by\nsetting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS.\nFor example to treat all compiler warnings as errors:\n\n\tmake KCFLAGS=-Werror\n\nPlease be aware that the Makefiles assume you are using GNU make, so\nfor instance on NetBSD you might need to use \"gmake\" instead of\nnative \"make\".\n\n\nIf the system board that you have is not listed, then you will need\nto port U-Boot to your hardware platform. To do this, follow these\nsteps:\n\n1.  Create a new directory to hold your board specific code. Add any\n    files you need. In your board directory, you will need at least\n    the \"Makefile\" and a \"\u003cboard\u003e.c\".\n2.  Create a new configuration file \"include/configs/\u003cboard\u003e.h\" for\n    your board.\n3.  If you're porting U-Boot to a new CPU, then also create a new\n    directory to hold your CPU specific code. Add any files you need.\n4.  Run \"make \u003cboard\u003e_defconfig\" with your new name.\n5.  Type \"make\", and you should get a working \"u-boot.srec\" file\n    to be installed on your target system.\n6.  Debug and solve any problems that might arise.\n    [Of course, this last step is much harder than it sounds.]\n\n\nTesting of U-Boot Modifications, Ports to New Hardware, etc.:\n==============================================================\n\nIf you have modified U-Boot sources (for instance added a new board\nor support for new devices, a new CPU, etc.) you are expected to\nprovide feedback to the other developers. The feedback normally takes\nthe form of a \"patch\", i.e. a context diff against a certain (latest\nofficial or latest in the git repository) version of U-Boot sources.\n\nBut before you submit such a patch, please verify that your modifi-\ncation did not break existing code. At least make sure that *ALL* of\nthe supported boards compile WITHOUT ANY compiler warnings. To do so,\njust run the buildman script (tools/buildman/buildman), which will\nconfigure and build U-Boot for ALL supported system. Be warned, this\nwill take a while. Please see the buildman README, or run 'buildman -H'\nfor documentation.\n\n\nSee also \"U-Boot Porting Guide\" below.\n\n\nMonitor Commands - Overview:\n============================\n\ngo\t- start application at address 'addr'\nrun\t- run commands in an environment variable\nbootm\t- boot application image from memory\nbootp\t- boot image via network using BootP/TFTP protocol\nbootz   - boot zImage from memory\ntftpboot- boot image via network using TFTP protocol\n\t       and env variables \"ipaddr\" and \"serverip\"\n\t       (and eventually \"gatewayip\")\ntftpput - upload a file via network using TFTP protocol\nrarpboot- boot image via network using RARP/TFTP protocol\ndiskboot- boot from IDE devicebootd   - boot default, i.e., run 'bootcmd'\nloads\t- load S-Record file over serial line\nloadb\t- load binary file over serial line (kermit mode)\nloadm   - load binary blob from source address to destination address\nmd\t- memory display\nmm\t- memory modify (auto-incrementing)\nnm\t- memory modify (constant address)\nmw\t- memory write (fill)\nms\t- memory search\ncp\t- memory copy\ncmp\t- memory compare\ncrc32\t- checksum calculation\ni2c\t- I2C sub-system\nsspi\t- SPI utility commands\nbase\t- print or set address offset\nprintenv- print environment variables\npwm\t- control pwm channels\nseama   - load SEAMA NAND image\nsetenv\t- set environment variables\nsaveenv - save environment variables to persistent storage\nprotect - enable or disable FLASH write protection\nerase\t- erase FLASH memory\nflinfo\t- print FLASH memory information\nnand\t- NAND memory operations (see doc/README.nand)\nbdinfo\t- print Board Info structure\niminfo\t- print header information for application image\nconinfo - print console devices and informations\nide\t- IDE sub-system\nloop\t- infinite loop on address range\nloopw\t- infinite write loop on address range\nmtest\t- simple RAM test\nicache\t- enable or disable instruction cache\ndcache\t- enable or disable data cache\nreset\t- Perform RESET of the CPU\necho\t- echo args to console\nversion - print monitor version\nhelp\t- print online help\n?\t- alias for 'help'\n\n\nMonitor Commands - Detailed Description:\n========================================\n\nTODO.\n\nFor now: just type \"help \u003ccommand\u003e\".\n\n\nNote for Redundant Ethernet Interfaces:\n=======================================\n\nSome boards come with redundant Ethernet interfaces; U-Boot supports\nsuch configurations and is capable of automatic selection of a\n\"working\" interface when needed. MAC assignment works as follows:\n\nNetwork interfaces are numbered eth0, eth1, eth2, ... Corresponding\nMAC addresses can be stored in the environment as \"ethaddr\" (=\u003eeth0),\n\"eth1addr\" (=\u003eeth1), \"eth2addr\", ...\n\nIf the network interface stores some valid MAC address (for instance\nin SROM), this is used as default address if there is NO correspon-\nding setting in the environment; if the corresponding environment\nvariable is set, this overrides the settings in the card; that means:\n\no If the SROM has a valid MAC address, and there is no address in the\n  environment, the SROM's address is used.\n\no If there is no valid address in the SROM, and a definition in the\n  environment exists, then the value from the environment variable is\n  used.\n\no If both the SROM and the environment contain a MAC address, and\n  both addresses are the same, this MAC address is used.\n\no If both the SROM and the environment contain a MAC address, and the\n  addresses differ, the value from the environment is used and a\n  warning is printed.\n\no If neither SROM nor the environment contain a MAC address, an error\n  is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case\n  a random, locally-assigned MAC is used.\n\nIf Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses\nwill be programmed into hardware as part of the initialization process.\t This\nmay be skipped by setting the appropriate 'ethmacskip' environment variable.\nThe naming convention is as follows:\n\"ethmacskip\" (=\u003eeth0), \"eth1macskip\" (=\u003eeth1) etc.\n\nImage Formats:\n==============\n\nU-Boot is capable of booting (and performing other auxiliary operations on)\nimages in two formats:\n\nNew uImage format (FIT)\n-----------------------\n\nFlexible and powerful format based on Flattened Image Tree -- FIT (similar\nto Flattened Device Tree). It allows the use of images with multiple\ncomponents (several kernels, ramdisks, etc.), with contents protected by\nSHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.\n\n\nOld uImage format\n-----------------\n\nOld image format is based on binary files which can be basically anything,\npreceded by a special header; see the definitions in include/image.h for\ndetails; basically, the header defines the following image properties:\n\n* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,\n  4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,\n  LynxOS, pSOS, QNX, RTEMS, INTEGRITY;\n  Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY).\n* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,\n  IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;\n  Currently supported: ARM, Intel x86, MIPS, Nios II, PowerPC).\n* Compression Type (uncompressed, gzip, bzip2)\n* Load Address\n* Entry Point\n* Image Name\n* Image Timestamp\n\nThe header is marked by a special Magic Number, and both the header\nand the data portions of the image are secured against corruption by\nCRC32 checksums.\n\n\nLinux Support:\n==============\n\nAlthough U-Boot should support any OS or standalone application\neasily, the main focus has always been on Linux during the design of\nU-Boot.\n\nU-Boot includes many features that so far have been part of some\nspecial \"boot loader\" code within the Linux kernel. Also, any\n\"initrd\" images to be used are no longer part of one big Linux image;\ninstead, kernel and \"initrd\" are separate images. This implementation\nserves several purposes:\n\n- the same features can be used for other OS or standalone\n  applications (for instance: using compressed images to reduce the\n  Flash memory footprint)\n\n- it becomes much easier to port new Linux kernel versions because\n  lots of low-level, hardware dependent stuff are done by U-Boot\n\n- the same Linux kernel image can now be used with different \"initrd\"\n  images; of course this also means that different kernel images can\n  be run with the same \"initrd\". This makes testing easier (you don't\n  have to build a new \"zImage.initrd\" Linux image when you just\n  change a file in your \"initrd\"). Also, a field-upgrade of the\n  software is easier now.\n\n\nLinux HOWTO:\n============\n\nPorting Linux to U-Boot based systems:\n---------------------------------------\n\nU-Boot cannot save you from doing all the necessary modifications to\nconfigure the Linux device drivers for use with your target hardware\n(no, we don't intend to provide a full virtual machine interface to\nLinux :-).\n\nBut now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).\n\nJust make sure your machine specific header file (for instance\ninclude/asm-ppc/tqm8xx.h) includes the same definition of the Board\nInformation structure as we define in include/asm-\u003carch\u003e/u-boot.h,\nand make sure that your definition of IMAP_ADDR uses the same value\nas your U-Boot configuration in CONFIG_SYS_IMMR.\n\nNote that U-Boot now has a driver model, a unified model for drivers.\nIf you are adding a new driver, plumb it into driver model. If there\nis no uclass available, you are encouraged to create one. See\ndoc/driver-model.\n\n\nConfiguring the Linux kernel:\n-----------------------------\n\nNo specific requirements for U-Boot. Make sure you have some root\ndevice (initial ramdisk, NFS) for your target system.\n\n\nBuilding a Linux Image:\n-----------------------\n\nWith U-Boot, \"normal\" build targets like \"zImage\" or \"bzImage\" are\nnot used. If you use recent kernel source, a new build target\n\"uImage\" will exist which automatically builds an image usable by\nU-Boot. Most older kernels also have support for a \"pImage\" target,\nwhich was introduced for our predecessor project PPCBoot and uses a\n100% compatible format.\n\nExample:\n\n\tmake TQM850L_defconfig\n\tmake oldconfig\n\tmake dep\n\tmake uImage\n\nThe \"uImage\" build target uses a special tool (in 'tools/mkimage') to\nencapsulate a compressed Linux kernel image with header\t information,\nCRC32 checksum etc. for use with U-Boot. This is what we are doing:\n\n* build a standard \"vmlinux\" kernel image (in ELF binary format):\n\n* convert the kernel into a raw binary image:\n\n\t${CROSS_COMPILE}-objcopy -O binary \\\n\t\t\t\t -R .note -R .comment \\\n\t\t\t\t -S vmlinux linux.bin\n\n* compress the binary image:\n\n\tgzip -9 linux.bin\n\n* package compressed binary image for U-Boot:\n\n\tmkimage -A ppc -O linux -T kernel -C gzip \\\n\t\t-a 0 -e 0 -n \"Linux Kernel Image\" \\\n\t\t-d linux.bin.gz uImage\n\n\nThe \"mkimage\" tool can also be used to create ramdisk images for use\nwith U-Boot, either separated from the Linux kernel image, or\ncombined into one file. \"mkimage\" encapsulates the images with a 64\nbyte header containing information about target architecture,\noperating system, image type, compression method, entry points, time\nstamp, CRC32 checksums, etc.\n\n\"mkimage\" can be called in two ways: to verify existing images and\nprint the header information, or to build new images.\n\nIn the first form (with \"-l\" option) mkimage lists the information\ncontained in the header of an existing U-Boot image; this includes\nchecksum verification:\n\n\ttools/mkimage -l image\n\t  -l ==\u003e list image header information\n\nThe second form (with \"-d\" option) is used to build a U-Boot image\nfrom a \"data file\" which is used as image payload:\n\n\ttools/mkimage -A arch -O os -T type -C comp -a addr -e ep \\\n\t\t      -n name -d data_file image\n\t  -A ==\u003e set architecture to 'arch'\n\t  -O ==\u003e set operating system to 'os'\n\t  -T ==\u003e set image type to 'type'\n\t  -C ==\u003e set compression type 'comp'\n\t  -a ==\u003e set load address to 'addr' (hex)\n\t  -e ==\u003e set entry point to 'ep' (hex)\n\t  -n ==\u003e set image name to 'name'\n\t  -d ==\u003e use image data from 'datafile'\n\nRight now, all Linux kernels for PowerPC systems use the same load\naddress (0x00000000), but the entry point address depends on the\nkernel version:\n\n- 2.2.x kernels have the entry point at 0x0000000C,\n- 2.3.x and later kernels have the entry point at 0x00000000.\n\nSo a typical call to build a U-Boot image would read:\n\n\t-\u003e tools/mkimage -n '2.4.4 kernel for TQM850L' \\\n\t\u003e -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \\\n\t\u003e -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \\\n\t\u003e examples/uImage.TQM850L\n\tImage Name:   2.4.4 kernel for TQM850L\n\tCreated:      Wed Jul 19 02:34:59 2000\n\tImage Type:   PowerPC Linux Kernel Image (gzip compressed)\n\tData Size:    335725 Bytes = 327.86 kB = 0.32 MB\n\tLoad Address: 0x00000000\n\tEntry Point:  0x00000000\n\nTo verify the contents of the image (or check for corruption):\n\n\t-\u003e tools/mkimage -l examples/uImage.TQM850L\n\tImage Name:   2.4.4 kernel for TQM850L\n\tCreated:      Wed Jul 19 02:34:59 2000\n\tImage Type:   PowerPC Linux Kernel Image (gzip compressed)\n\tData Size:    335725 Bytes = 327.86 kB = 0.32 MB\n\tLoad Address: 0x00000000\n\tEntry Point:  0x00000000\n\nNOTE: for embedded systems where boot time is critical you can trade\nspeed for memory and install an UNCOMPRESSED image instead: this\nneeds more space in Flash, but boots much faster since it does not\nneed to be uncompressed:\n\n\t-\u003e gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz\n\t-\u003e tools/mkimage -n '2.4.4 kernel for TQM850L' \\\n\t\u003e -A ppc -O linux -T kernel -C none -a 0 -e 0 \\\n\t\u003e -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \\\n\t\u003e examples/uImage.TQM850L-uncompressed\n\tImage Name:   2.4.4 kernel for TQM850L\n\tCreated:      Wed Jul 19 02:34:59 2000\n\tImage Type:   PowerPC Linux Kernel Image (uncompressed)\n\tData Size:    792160 Bytes = 773.59 kB = 0.76 MB\n\tLoad Address: 0x00000000\n\tEntry Point:  0x00000000\n\n\nSimilar you can build U-Boot images from a 'ramdisk.image.gz' file\nwhen your kernel is intended to use an initial ramdisk:\n\n\t-\u003e tools/mkimage -n 'Simple Ramdisk Image' \\\n\t\u003e -A ppc -O linux -T ramdisk -C gzip \\\n\t\u003e -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd\n\tImage Name:   Simple Ramdisk Image\n\tCreated:      Wed Jan 12 14:01:50 2000\n\tImage Type:   PowerPC Linux RAMDisk Image (gzip compressed)\n\tData Size:    566530 Bytes = 553.25 kB = 0.54 MB\n\tLoad Address: 0x00000000\n\tEntry Point:  0x00000000\n\nThe \"dumpimage\" tool can be used to disassemble or list the contents of images\nbuilt by mkimage. See dumpimage's help output (-h) for details.\n\nInstalling a Linux Image:\n-------------------------\n\nTo downloading a U-Boot image over the serial (console) interface,\nyou must convert the image to S-Record format:\n\n\tobjcopy -I binary -O srec examples/image examples/image.srec\n\nThe 'objcopy' does not understand the information in the U-Boot\nimage header, so the resulting S-Record file will be relative to\naddress 0x00000000. To load it to a given address, you need to\nspecify the target address as 'offset' parameter with the 'loads'\ncommand.\n\nExample: install the image to address 0x40100000 (which on the\nTQM8xxL is in the first Flash bank):\n\n\t=\u003e erase 40100000 401FFFFF\n\n\t.......... done\n\tErased 8 sectors\n\n\t=\u003e loads 40100000\n\t## Ready for S-Record download ...\n\t~\u003eexamples/image.srec\n\t1 2 3 4 5 6 7 8 9 10 11 12 13 ...\n\t...\n\t15989 15990 15991 15992\n\t[file transfer complete]\n\t[connected]\n\t## Start Addr = 0x00000000\n\n\nYou can check the success of the download using the 'iminfo' command;\nthis includes a checksum verification so you can be sure no data\ncorruption happened:\n\n\t=\u003e imi 40100000\n\n\t## Checking Image at 40100000 ...\n\t   Image Name:\t 2.2.13 for initrd on TQM850L\n\t   Image Type:\t PowerPC Linux Kernel Image (gzip compressed)\n\t   Data Size:\t 335725 Bytes = 327 kB = 0 MB\n\t   Load Address: 00000000\n\t   Entry Point:\t 0000000c\n\t   Verifying Checksum ... OK\n\n\nBoot Linux:\n-----------\n\nThe \"bootm\" command is used to boot an application that is stored in\nmemory (RAM or Flash). In case of a Linux kernel image, the contents\nof the \"bootargs\" environment variable is passed to the kernel as\nparameters. You can check and modify this variable using the\n\"printenv\" and \"setenv\" commands:\n\n\n\t=\u003e printenv bootargs\n\tbootargs=root=/dev/ram\n\n\t=\u003e setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2\n\n\t=\u003e printenv bootargs\n\tbootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2\n\n\t=\u003e bootm 40020000\n\t## Booting Linux kernel at 40020000 ...\n\t   Image Name:\t 2.2.13 for NFS on TQM850L\n\t   Image Type:\t PowerPC Linux Kernel Image (gzip compressed)\n\t   Data Size:\t 381681 Bytes = 372 kB = 0 MB\n\t   Load Address: 00000000\n\t   Entry Point:\t 0000000c\n\t   Verifying Checksum ... OK\n\t   Uncompressing Kernel Image ... OK\n\tLinux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000\n\tBoot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2\n\ttime_init: decrementer frequency = 187500000/60\n\tCalibrating delay loop... 49.77 BogoMIPS\n\tMemory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]\n\t...\n\nIf you want to boot a Linux kernel with initial RAM disk, you pass\nthe memory addresses of both the kernel and the initrd image (PPBCOOT\nformat!) to the \"bootm\" command:\n\n\t=\u003e imi 40100000 40200000\n\n\t## Checking Image at 40100000 ...\n\t   Image Name:\t 2.2.13 for initrd on TQM850L\n\t   Image Type:\t PowerPC Linux Kernel Image (gzip compressed)\n\t   Data Size:\t 335725 Bytes = 327 kB = 0 MB\n\t   Load Address: 00000000\n\t   Entry Point:\t 0000000c\n\t   Verifying Checksum ... OK\n\n\t## Checking Image at 40200000 ...\n\t   Image Name:\t Simple Ramdisk Image\n\t   Image Type:\t PowerPC Linux RAMDisk Image (gzip compressed)\n\t   Data Size:\t 566530 Bytes = 553 kB = 0 MB\n\t   Load Address: 00000000\n\t   Entry Point:\t 00000000\n\t   Verifying Checksum ... OK\n\n\t=\u003e bootm 40100000 40200000\n\t## Booting Linux kernel at 40100000 ...\n\t   Image Name:\t 2.2.13 for initrd on TQM850L\n\t   Image Type:\t PowerPC Linux Kernel Image (gzip compressed)\n\t   Data Size:\t 335725 Bytes = 327 kB = 0 MB\n\t   Load Address: 00000000\n\t   Entry Point:\t 0000000c\n\t   Verifying Checksum ... OK\n\t   Uncompressing Kernel Image ... OK\n\t## Loading RAMDisk Image at 40200000 ...\n\t   Image Name:\t Simple Ramdisk Image\n\t   Image Type:\t PowerPC Linux RAMDisk Image (gzip compressed)\n\t   Data Size:\t 566530 Bytes = 553 kB = 0 MB\n\t   Load Address: 00000000\n\t   Entry Point:\t 00000000\n\t   Verifying Checksum ... OK\n\t   Loading Ramdisk ... OK\n\tLinux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000\n\tBoot arguments: root=/dev/ram\n\ttime_init: decrementer frequency = 187500000/60\n\tCalibrating delay loop... 49.77 BogoMIPS\n\t...\n\tRAMDISK: Compressed image found at block 0\n\tVFS: Mounted root (ext2 filesystem).\n\n\tbash#\n\nBoot Linux and pass a flat device tree:\n-----------\n\nFirst, U-Boot must be compiled with the appropriate defines. See the section\ntitled \"Linux Kernel Interface\" above for a more in depth explanation. The\nfollowing is an example of how to start a kernel and pass an updated\nflat device tree:\n\n=\u003e print oftaddr\noftaddr=0x300000\n=\u003e print oft\noft=oftrees/mpc8540ads.dtb\n=\u003e tftp $oftaddr $oft\nSpeed: 1000, full duplex\nUsing TSEC0 device\nTFTP from server 192.168.1.1; our IP address is 192.168.1.101\nFilename 'oftrees/mpc8540ads.dtb'.\nLoad address: 0x300000\nLoading: #\ndone\nBytes transferred = 4106 (100a hex)\n=\u003e tftp $loadaddr $bootfile\nSpeed: 1000, full duplex\nUsing TSEC0 device\nTFTP from server 192.168.1.1; our IP address is 192.168.1.2\nFilename 'uImage'.\nLoad address: 0x200000\nLoading:############\ndone\nBytes transferred = 1029407 (fb51f hex)\n=\u003e print loadaddr\nloadaddr=200000\n=\u003e print oftaddr\noftaddr=0x300000\n=\u003e bootm $loadaddr - $oftaddr\n## Booting image at 00200000 ...\n   Image Name:\t Linux-2.6.17-dirty\n   Image Type:\t PowerPC Linux Kernel Image (gzip compressed)\n   Data Size:\t 1029343 Bytes = 1005.2 kB\n   Load Address: 00000000\n   Entry Point:\t 00000000\n   Verifying Checksum ... OK\n   Uncompressing Kernel Image ... OK\nBooting using flat device tree at 0x300000\nUsing MPC85xx ADS machine description\nMemory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb\n[snip]\n\n\nMore About U-Boot Image Types:\n------------------------------\n\nU-Boot supports the following image types:\n\n   \"Standalone Programs\" are directly runnable in the environment\n\tprovided by U-Boot; it is expected that (if they behave\n\twell) you can continue to work in U-Boot after return from\n\tthe Standalone Program.\n   \"OS Kernel Images\" are usually images of some Embedded OS which\n\twill take over control completely. Usually these programs\n\twill install their own set of exception handlers, device\n\tdrivers, set up the MMU, etc. - this means, that you cannot\n\texpect to re-enter U-Boot except by resetting the CPU.\n   \"RAMDisk Images\" are more or less just data blocks, and their\n\tparameters (address, size) are passed to an OS kernel that is\n\tbeing started.\n   \"Multi-File Images\" contain several images, typically an OS\n\t(Linux) kernel image and one or more data images like\n\tRAMDisks. This construct is useful for instance when you want\n\tto boot over the network using BOOTP etc., where the boot\n\tserver provides just a single image file, but you want to get\n\tfor instance an OS kernel and a RAMDisk image.\n\n\t\"Multi-File Images\" start with a list of image sizes, each\n\timage size (in bytes) specified by an \"uint32_t\" in network\n\tbyte order. This list is terminated by an \"(uint32_t)0\".\n\tImmediately after the terminating 0 follow the images, one by\n\tone, all aligned on \"uint32_t\" boundaries (size rounded up to\n\ta multiple of 4 bytes).\n\n   \"Firmware Images\" are binary images containing firmware (like\n\tU-Boot or FPGA images) which usually will be programmed to\n\tflash memory.\n\n   \"Script files\" are command sequences that will be executed by\n\tU-Boot's command interpreter; this feature is especially\n\tuseful when you configure U-Boot to use a real shell (hush)\n\tas command interpreter.\n\nBooting the Linux zImage:\n-------------------------\n\nOn some platforms, it's possible to boot Linux zImage. This is done\nusing the \"bootz\" command. The syntax of \"bootz\" command is the same\nas the syntax of \"bootm\" command.\n\nNote, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply\nkernel with raw initrd images. The syntax is slightly different, the\naddress of the initrd must be augmented by it's size, in the following\nformat: \"\u003cinitrd addres\u003e:\u003cinitrd size\u003e\".\n\n\nStandalone HOWTO:\n=================\n\nOne of the features of U-Boot is that you can dynamically load and\nrun \"standalone\" applications, which can use some resources of\nU-Boot like console I/O functions or interrupt services.\n\nTwo simple examples are included with the sources:\n\n\"Hello World\" Demo:\n-------------------\n\n'examples/hello_world.c' contains a small \"Hello World\" Demo\napplication; it is automatically compiled when you build U-Boot.\nIt's configured to run at address 0x00040004, so you can play with it\nlike that:\n\n\t=\u003e loads\n\t## Ready for S-Record download ...\n\t~\u003eexamples/hello_world.srec\n\t1 2 3 4 5 6 7 8 9 10 11 ...\n\t[file transfer complete]\n\t[connected]\n\t## Start Addr = 0x00040004\n\n\t=\u003e go 40004 Hello World! This is a test.\n\t## Starting application at 0x00040004 ...\n\tHello World\n\targc = 7\n\targv[0] = \"40004\"\n\targv[1] = \"Hello\"\n\targv[2] = \"World!\"\n\targv[3] = \"This\"\n\targv[4] = \"is\"\n\targv[5] = \"a\"\n\targv[6] = \"test.\"\n\targv[7] = \"\u003cNULL\u003e\"\n\tHit any key to exit ...\n\n\t## Application terminated, rc = 0x0\n\nAnother example, which demonstrates how to register a CPM interrupt\nhandler with the U-Boot code, can be found in 'examples/timer.c'.\nHere, a CPM timer is set up to generate an interrupt every second.\nThe interrupt service routine is trivial, just printing a '.'\ncharacter, but this is just a demo program. The application can be\ncontrolled by the following keys:\n\n\t? - print current values og the CPM Timer registers\n\tb - enable interrupts and start timer\n\te - stop timer and disable interrupts\n\tq - quit application\n\n\t=\u003e loads\n\t## Ready for S-Record download ...\n\t~\u003eexamples/timer.srec\n\t1 2 3 4 5 6 7 8 9 10 11 ...\n\t[file transfer complete]\n\t[connected]\n\t## Start Addr = 0x00040004\n\n\t=\u003e go 40004\n\t## Starting application at 0x00040004 ...\n\tTIMERS=0xfff00980\n\tUsing timer 1\n\t  tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0\n\nHit 'b':\n\t[q, b, e, ?] Set interval 1000000 us\n\tEnabling timer\nHit '?':\n\t[q, b, e, ?] ........\n\ttgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0\nHit '?':\n\t[q, b, e, ?] .\n\ttgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0\nHit '?':\n\t[q, b, e, ?] .\n\ttgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0\nHit '?':\n\t[q, b, e, ?] .\n\ttgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0\nHit 'e':\n\t[q, b, e, ?] ...Stopping timer\nHit 'q':\n\t[q, b, e, ?] ## Application terminated, rc = 0x0\n\n\nImplementation Internals:\n=========================\n\nThe following is not intended to be a complete description of every\nimplementation detail. However, it should help to understand the\ninner workings of U-Boot and make it easier to port it to custom\nhardware.\n\n\nInitial Stack, Global Data:\n---------------------------\n\nThe implementation of U-Boot is complicated by the fact that U-Boot\nstarts running out of ROM (flash memory), usually without access to\nsystem RAM (because the memory controller is not initialized yet).\nThis means that we don't have writable Data or BSS segments, and BSS\nis not initialized as zero. To be able to get a C environment working\nat all, we have to allocate at least a minimal stack. Implementation\noptions for this are defined and restricted by the CPU used: Some CPU\nmodels provide on-chip memory (like the IMMR area on MPC8xx and\nMPC826x processors), on others (parts of) the data cache can be\nlocked as (mis-) used as memory, etc.\n\n\tChris Hallinan posted a good summary of these issues to the\n\tU-Boot mailing list:\n\n\tSubject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?\n\tFrom: \"Chris Hallinan\" \u003cclh@net1plus.com\u003e\n\tDate: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)\n\t...\n\n\tCorrect me if I'm wrong, folks, but the way I understand it\n\tis this: Using DCACHE as initial RAM for Stack, etc, does not\n\trequire any physical RAM backing up the cache. The cleverness\n\tis that the cache is being used as a temporary supply of\n\tnecessary storage before the SDRAM controller is setup. It's\n\tbeyond the scope of this list to explain the details, but you\n\tcan see how this works by studying the cache architecture and\n\toperation in the architecture and processor-specific manuals.\n\n\tOCM is On Chip Memory, which I believe the 405GP has 4K. It\n\tis another option for the system designer to use as an\n\tinitial stack/RAM area prior to SDRAM being available. Either\n\toption should work for you. Using CS 4 should be fine if your\n\tboard designers haven't used it for something that would\n\tcause you grief during the initial boot! It is frequently not\n\tused.\n\n\tCFG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere\n\twith your processor/board/system design. The default value\n\tyou will find in any recent u-boot distribution in\n\twalnut.h should work for you. I'd set it to a value larger\n\tthan your SDRAM module. If you have a 64MB SDRAM module, set\n\tit above 400_0000. Just make sure your board has no resources\n\tthat are supposed to respond to that address! That code in\n\tstart.S has been around a while and should work as is when\n\tyou get the config right.\n\n\t-Chris Hallinan\n\tDS4.COM, Inc.\n\nIt is essential to remember this, since it has some impact on the C\ncode for the initialization procedures:\n\n* Initialized global data (data segment) is read-only. Do not attempt\n  to write it.\n\n* Do not use any uninitialized global data (or implicitly initialized\n  as zero data - BSS segment) at all - this is undefined, initiali-\n  zation is performed later (when relocating to RAM).\n\n* Stack space is very limited. Avoid big data buffers or things like\n  that.\n\nHaving only the stack as writable memory limits means we cannot use\nnormal global data to share information between the code. But it\nturned out that the implementation of U-Boot can be greatly\nsimplified by making a global data structure (gd_t) available to all\nfunctions. We could pass a pointer to this data as argument to _all_\nfunctions, but this would bloat the code. Instead we use a feature of\nthe GCC compiler (Global Register Variables) to share the data: we\nplace a pointer (gd) to the global data into a register which we\nreserve for this purpose.\n\nWhen choosing a register for such a purpose we are restricted by the\nrelevant  (E)ABI  specifications for the current architecture, and by\nGCC's implementation.\n\nFor PowerPC, the following registers have specific use:\n\tR1:\tstack pointer\n\tR2:\treserved for system use\n\tR3-R4:\tparameter passing and return values\n\tR5-R10: parameter passing\n\tR13:\tsmall data area pointer\n\tR30:\tGOT pointer\n\tR31:\tframe pointer\n\n\t(U-Boot also uses R12 as internal GOT pointer. r12\n\tis a volatile register so r12 needs to be reset when\n\tgoing back and forth between asm and C)\n\n    ==\u003e U-Boot will use R2 to hold a pointer to the global data\n\n    Note: on PPC, we could use a static initializer (since the\n    address of the global data structure is known at compile time),\n    but it turned out that reserving a register results in somewhat\n    smaller code - although the code savings are not that big (on\n    average for all boards 752 bytes for the whole U-Boot image,\n    624 text + 127 data).\n\nOn ARM, the following registers are used:\n\n\tR0:\tfunction argument word/integer result\n\tR1-R3:\tfunction argument word\n\tR9:\tplatform specific\n\tR10:\tstack limit (used only if stack checking is enabled)\n\tR11:\targument (frame) pointer\n\tR12:\ttemporary workspace\n\tR13:\tstack pointer\n\tR14:\tlink register\n\tR15:\tprogram counter\n\n    ==\u003e U-Boot will use R9 to hold a pointer to the global data\n\n    Note: on ARM, only R_ARM_RELATIVE relocations are supported.\n\nOn Nios II, the ABI is documented here:\n\thttps://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf\n\n    ==\u003e U-Boot will use gp to hold a pointer to the global data\n\n    Note: on Nios II, we give \"-G0\" option to gcc and don't use gp\n    to access small data sections, so gp is free.\n\nOn RISC-V, the following registers are used:\n\n\tx0: hard-wired zero (zero)\n\tx1: return address (ra)\n\tx2:\tstack pointer (sp)\n\tx3:\tglobal pointer (gp)\n\tx4:\tthread pointer (tp)\n\tx5:\tlink register (t0)\n\tx8:\tframe pointer (fp)\n\tx10-x11:\targuments/return values (a0-1)\n\tx12-x17:\targuments (a2-7)\n\tx28-31:\t temporaries (t3-6)\n\tpc:\tprogram counter (pc)\n\n    ==\u003e U-Boot will use gp to hold a pointer to the global data\n\nSystem Initialization:\n----------------------\n\nIn the reset configuration, U-Boot starts at the reset entry point\n(on most PowerPC systems at address 0x00000100). Because of the reset\nconfiguration for CS0# this is a mirror of the on board Flash memory.\nTo be able to re-map memory U-Boot then jumps to its link address.\nTo be able to implement the initialization code in C, a (small!)\ninitial stack is set up in the internal Dual Ported RAM (in case CPUs\nwhich provide such a feature like), or in a locked part of the data\ncache. After that, U-Boot initializes the CPU core, the caches and\nthe SIU.\n\nNext, all (potentially) available memory banks are mapped using a\npreliminary mapping. For example, we put them on 512 MB boundaries\n(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash\non 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is\nprogrammed for SDRAM access. Using the temporary configuration, a\nsimple memory test is run that determines the size of the SDRAM\nbanks.\n\nWhen there is more than one SDRAM bank, and the banks are of\ndifferent size, the largest is mapped first. For equal size, the first\nbank (CS2#) is mapped first. The first mapping is always for address\n0x00000000, with any additional banks following immediately to create\ncontiguous memory starting from 0.\n\nThen, the monitor installs itself at the upper end of the SDRAM area\nand allocates memory for use by malloc() and for the global Board\nInfo data; also, the exception vector code is copied to the low RAM\npages, and the final stack is set up.\n\nOnly after this relocation will you have a \"normal\" C environment;\nuntil that you are restricted in several ways, mostly because you are\nrunning from ROM, and because the code will have to be relocated to a\nnew address in RAM.\n\n\nContributing\n============\n\nThe U-Boot projects depends on contributions from the user community.\nIf you want to participate, please, have a look at the 'General'\nsection of https://docs.u-boot.org/en/latest/develop/index.html\nwhere we describe coding standards and the patch submission process.\n","funding_links":[],"categories":[],"sub_categories":[],"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2F9elements%2Fu-boot-acpi","html_url":"https://awesome.ecosyste.ms/projects/github.com%2F9elements%2Fu-boot-acpi","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2F9elements%2Fu-boot-acpi/lists"}