{"id":13774780,"url":"https://github.com/CMU-SAFARI/ramulator2","last_synced_at":"2025-05-11T07:30:37.853Z","repository":{"id":189823902,"uuid":"681082592","full_name":"CMU-SAFARI/ramulator2","owner":"CMU-SAFARI","description":"Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and evaluation of new memory system designs (e.g., new DRAM standards, emerging RowHammer mitigation techniques). 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It is the successor of Ramulator 1.0 [Kim+, CAL'16], achieving both fast simulation speed and ease of extension. The goal of Ramulator 2.0 is to enable rapid and agile implementation and evaluation of design changes in the memory controller and DRAM to meet the increasing research effort in improving the performance, security, and reliability of memory systems. Ramulator 2.0 abstracts and models key components in a DRAM-based memory system and their interactions into shared interfaces and independent implementations, enabling easy modification and extension of the modeled functions of the memory controller and DRAM. \n\nThis Github repository contains the public version of Ramulator 2.0. From time to time, we will synchronize improvements of the code framework, additional functionalities, bug fixes, etc. from our internal version. Ramulator 2.0 is in its early stage and welcomes your contribution as well as new ideas and implementations in the memory system!\n\nCurrently, Ramulator 2.0 provides the DRAM models for the following standards:\n- DDR3, DDR4, DDR5\n- LPDDR5\n- GDDR6\n- HBM(2), HBM3\n\nRamulator 2.0 also provides implementations for the following RowHammer mitigation techniques:\n- PARA [[Kim+, ISCA'14]](https://people.inf.ethz.ch/omutlu/pub/dram-row-hammer_isca14.pdf)\n- TWiCe [[Lee+, ISCA'19]](https://ieeexplore.ieee.org/document/8980327)\n- Graphene [[Park+, MICRO'20]](https://microarch.org/micro53/papers/738300a001.pdf)\n- BlockHammer [[Yağlıkçı+, HPCA'21]](https://people.inf.ethz.ch/omutlu/pub/BlockHammer_preventing-DRAM-rowhammer-at-low-cost_hpca21.pdf)\n- Hydra [[Qureshi+, ISCA'22]](https://memlab.ece.gatech.edu/papers/ISCA_2022_1.pdf)\n- Randomized Row Swap (RRS) [[Saileshwar+, ASPLOS'22]](https://gururaj-s.github.io/assets/pdf/ASPLOS22_Saileshwar.pdf)\n- AQUA [[Saxena+, MICRO'22]](https://memlab.ece.gatech.edu/papers/MICRO_2022_1.pdf)\n- An \"Oracle\" Refresh Mitigation [[Kim+, ISCA'20]](https://people.inf.ethz.ch/omutlu/pub/Revisiting-RowHammer_isca20-FINAL-DO-NOT_DISTRIBUTE.pdf)\n\nA quick glance at Ramulator 2.0's other key features:\n- Modular and extensible software architecture: Ramulator 2.0 provides an explicit separation of implementations from interfaces. Therefore new ideas can be implemented without intrusive changes.\n- Self-registering factory for interface and implementation classes: Ramulator 2.0 automatically constructs the correct class of objects by their names as you specify in the configuration. Do *not* worry about boilerplate code!\n- YAML-based configuration file: Ramulator 2.0 is configured via human-readable and machine-friendly configuration files. Sweeping parameters is as easy as editing a Python dictionary!\n\nThe initial release of Ramulator 2.0 is described in the following [paper](https://people.inf.ethz.ch/omutlu/pub/Ramulator2_arxiv23.pdf):\n\u003e Haocong Luo, Yahya Can Tugrul, F. Nisa Bostancı, Ataberk Olgun, A. Giray Yaglıkcı, and Onur Mutlu,\n\u003e \"Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator,\"\n\u003e arXiv, 2023.\n\nIf you use Ramulator 2.0 in your work, please use the following citation:\n```\n@misc{luo2023ramulator2,\n  title={{Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator}}, \n  author={Haocong Luo and Yahya Can Tu\\u{g}rul and F. Nisa Bostancı and Ataberk Olgun and A. Giray Ya\\u{g}l{\\i}k\\c{c}{\\i} and and Onur Mutlu},\n  year={2023},\n  archivePrefix={arXiv},\n  primaryClass={cs.AR}\n}\n```\n\n## Using Ramulator 2.0\n### Dependencies\nRamulator uses some C++20 features to achieve both high runtime performance and modularity and extensibility. Therefore, a C++20-capable compiler is needed to build Ramulator 2.0. We have tested and verified Ramulator 2.0 with the following compilers:\n- `g++-12`\n- `clang++-15`\n\nRamulator 2.0 uses the following external libraries. The build system (CMake) will automatically download and configure these dependencies.\n- [argparse](https://github.com/p-ranav/argparse)\n- [spdlog](https://github.com/gabime/spdlog)\n- [yaml-cpp](https://github.com/jbeder/yaml-cpp)\n### Getting Started\nClone the repository\n```bash\n  $ git clone https://github.com/CMU-SAFARI/ramulator2\n```\nConfigure the project and build the executable\n```bash\n  $ mkdir build\n  $ cd build\n  $ cmake ..\n  $ make -j\n  $ cp ./ramulator2 ../ramulator2\n  $ cd ..\n```\nThis should produce a `ramulator2` executable that you can execute standalone and a `libramulator.so` dynamic library that can be used as a memory system library by other simulators.\n### Running Ramulator 2.0 in Standalone Mode\nRamulator 2.0 comes with two independent simulation frontends: A memory-trace parser and a simplistic out-of-order core model that can accept instruction traces. To start a simulation with these frontends, just run the Ramulator 2.0 executable with the path to the configuration file specified through the `-f` argument\n```bash\n  $ ./ramulator2 -f ./example_config.yaml\n```\nTo support easy automation of experiments (e.g., evaluate many different traces and sweep parameters), Ramulator 2.0 can accept the configurations as a string dump of the YAML document, which is usually produced by a scripting language that can easily parse and manipulate YAML documents (e.g., `python`). We provide an example `python` snippet to demonstrate an experiment of sweeping the `nRCD` timing constraint:\n```python\nimport os\nimport yaml  # YAML parsing provided with the PyYAML package\n\nbaseline_config_file = \"./example_config.yaml\"\nnRCD_list = [10, 15, 20, 25]\n\nbase_config = None\nwith open(base_config_file, 'r') as f:\n  base_config = yaml.safe_load(f)\n\nfor nRCD in nRCD_list:\n  config[\"MemorySystem\"][\"DRAM\"][\"timing\"][\"nRCD\"] = nRCD\n  cmds = [\"./ramulator2\", str(config)]\n  # Run the command with e.g., os.system(), subprocess.run(), ...\n```\n### Using Ramulator 2.0 as a Library (gem5 Example)\nRamulator 2.0 packs all the interfaces and implementations into a dynamic library (`libramulator.so`). This can be used as a memory system library providing extensible cycle-accurate DRAM simulation to another simulator. We use gem5 as an example to show how to use Ramulator 2.0 as a library. We have tested and verified the integration of Ramulator 2.0 into gem5 as a library.\n\n1. Clone Ramulator 2.0 into `gem5/ext/ramulator2/` directory.\n2. Build Ramulator 2.0. You should have `libramulator.so` at `gem5/ext/ramulator2/ramulator2/libramulator.so`\n3. Create a file `SConscript` at `gem5/ext/ramulator2/`, with the following contents to add Ramulator 2.0 to gem5's build system\n```python\nimport os\n\nImport('env')\n\nif not os.path.exists(Dir('.').srcnode().abspath + '/ramulator2'):\n  env['HAVE_RAMULATOR2'] = False\n  Return()\n\nenv['HAVE_RAMULATOR2'] = True\nramulator2_path = os.path.join(Dir('#').abspath, 'ext/ramulator2/ramulator2/')\nenv.Prepend(CPPPATH=Dir('.').srcnode())\nenv.Append(\n  LIBS=['ramulator'],\n  LIBPATH=[ramulator2_path],\n  RPATH=[ramulator2_path],\n  CPPPATH=[\n  ramulator2_path+'/src/', \n  ramulator2_path+'/ext/spdlog/include',\n  ramulator2_path+'/ext/yaml-cpp/include'\n])\n```\n4. Put the Ramulator2 wrapper code to `gem5/src/mem/`\n5. Add the code to `gem5/src/mem/SConscript` to register the Ramulator2 SimObjects to gem5 \n```python\nif env['HAVE_RAMULATOR2']:\n  SimObject('Ramulator2.py', sim_objects=['Ramulator2'])\n  Source('ramulator2.cc')\n  DebugFlag(\"Ramulator2\")\n```\n6. Create the Ramulator2 SimObject as the memory controller and specify the path to the Ramulator 2.0 configuration file in your gem5 configuration script, e.g.,\n```python\nimport m5\nfrom m5.objects import *\n\nsystem = System()\nsystem.mem_ctrl = Ramulator2()\nsystem.mem_ctrl.config_path = \"\u003cpath-to-config\u003e.yaml\" # Don't forget to specify GEM5 as the implementation of the frontend interface!\n\n# Continue your configuration of gem5 ...\n```\n\n### General Instructions for Writing Your Own Wrapper of Ramulator 2.0 for Another (including Your Own) Simulator\nWe describe the key steps and cover the key interfaces involved in using Ramulator 2.0 as a library for your own simulator.\n1. Add Ramulator 2.0's key header files to your build system:\n- `ramulator2/src/base/base.h`\n- `ramulator2/src/base/request.h`\n- `ramulator2/src/base/config.h`\n- `ramulator2/src/frontend/frontend.h`\n- `ramulator2/src/memory_system/memory_system.h`\n\n2. Parse the YAML configuration for Ramulator 2.0 and instantiate the interfaces of the two top-level components, e.g.,\n```c++\n// MyWrapper.h\nstd::string config_path;\nRamulator::IFrontEnd* ramulator2_frontend;\nRamulator::IMemorySystem* ramulator2_memorysystem;\n\n// MyWrapper.cpp\nYAML::Node config = Ramulator::Config::parse_config_file(config_path, {});\nramulator2_frontend = Ramulator::Factory::create_frontend(config);\nramulator2_memorysystem = Ramulator::Factory::create_memory_system(config);\n\nramulator2_frontend-\u003econnect_memory_system(ramulator2_memorysystem);\nramulator2_memorysystem-\u003econnect_frontend(ramulator2_frontend);\n```\n3. Communicate the necessary memory system information from Ramulator 2.0 to your system (e.g., memory system clock):\n```c++\nfloat memory_tCK = ramulator2_memorysystem-\u003eget_tCK();\n```\n4. Send the memory requests from your simulator to Ramulator 2.0, with the correspoding callbacks that should be executed when the request is \"completed\" by Ramulator 2.0, e.g.,\n```c++\nif (is_read_request) {\n  enqueue_success = ramulator2_frontend-\u003e\n    receive_external_requests(0, memory_address, context_id, \n    [this](Ramulator::Request\u0026 req) {\n      // your read request callback \n    });\n\n  if (enqueue_success) {\n    // What happens if the memory request is accepted by Ramulator 2.0\n  } else {\n    // What happens if the memory request is rejected by Ramulator 2.0 (e.g., request queue full)\n  }\n}\n```\n5. Find a proper time and place to call the epilogue functions of Ramulator 2.0 when your simulator has finished execution, e.g.,\n```c++\nvoid my_simulator_finish() {\n  ramulator2_frontend-\u003efinalize();\n  ramulator2_memorysystem-\u003efinalize();\n}\n```\n\n## Extending Ramulator 2.0\n### Directory Structure\nRamulator 2.0 \n```\next                     # External libraries\nsrc                     # Source code of Ramulator 2.0\n└ \u003ccomponent1\u003e          # Collection of the source code of all interfaces and implementations related to the component\n  └ impl                # Collection of the source code of all implementations of the component\n    └ com_impl.cpp      # Source file of a specific implementation\n  └ com_interface.h     # Header file that defines an interface\n  └ CMakeList.txt       # Component-level CMake configuration\n└ ...                    \n└ CMakeList.txt         # Top-level CMake configuration of all Ramulator 2.0's source files\nCMakeList.txt           # Project-level CMake configuration\n```\n\n### Interface and Implementation\nTo achieve high modularity and extensibility, Ramulator 2.0 models the components in the memory system using two concepts, Interfaces and Implementations:\n- An interface is a high-level abstraction of the common high-level functionality of a component as seen by other components in the system. It is an abstract C++ class defined in a `.h` header file, that provides its functionalities through virtual functions.\n- An implementation is a concrete realization of an interface that models the actual behavior of the object. It is usually a C++ class that inherits from the interface class it is implementing that provides implementations of the interface's virtual functions.\n\nAn example interface class looks like this:\n```c++\n// example_interface.h\n#ifndef     RAMULATOR_EXAMPLE_INTERFACE_H\n#define     RAMULATOR_EXAMPLE_INTERFACE_H\n\n// Defines fundamental data structures and types of Ramulator 2.0. Must include for all interfaces.\n#include \"base/base.h\"  \n\nnamespace Ramulator {\nclass ExampleIfce {\n  // One-liner macro to register this \"ExampleIfce\" interface with the name \"ExampleInterface\" to Ramulator 2.0.\n  RAMULATOR_REGISTER_INTERFACE(ExampleIfce, \"ExampleInterface\", \"An example of an interface class.\")\n  public:\n    // Model common behaviors of the interface with virtual functions \n    virtual void foo() = 0;\n};\n}        // namespace Ramulator\n\n#endif   // RAMULATOR_EXAMPLE_INTERFACE_H\n```\n\nAn example implementation that implements the above interface looks like this\n```c++\n// example_impl.cpp\n#include \u003ciostream\u003e\n\n// An implementation should always include the header of the interface that it is implementating\n#include \"example_interface.h\"\n\nnamespace Ramulator {\n// An implementation class should always inherit from *both* the interface it is implementating, and the \"Implementation\" base class\nclass ExampleImpl : public ExampleIfce, public Implementation  {\n  // One-liner macro to register and bind this \"ExampleImpl\" implementation with the name \"ExampleImplementation\" to the \"ExampleIfce\" interface.\n  RAMULATOR_REGISTER_IMPLEMENTATION(ExampleIfce, ExampleImpl, \"ExampleImplementation\", \"An example of an implementation class.\")\n  public:\n    // Implements concrete behavior\n    virtual void foo() override {\n      std::cout \u003c\u003c \"Bar!\" \u003c\u003c std::endl;\n    };\n};\n}      // namespace Ramulator\n```\n\n### Adding an Implementation to an Existing Interface\nLet us consider an example of adding an implementation \"MyImpl\" for the interface \"MyIfce\", defined in `my_ifce.h`, that belongs to a component \"my_comp\".\n1. Create a new `.cpp` file under `my_comp/impl/` that contains the source code for the implementation. Say this file is \"my_impl.cpp\". The directory structure for `my_comp` will look like this:\n```\nmy_comp                     \n  └ impl\n    └ my_impl.cpp      \n  └ my_interface.h     \n  └ CMakeList.txt       \n```\n2. Provide the concrete class definition for `MyImpl` in `my_impl.cpp`, following the structure explained above. It is important to do the following two things when defining your class:\n    * Make sure you inherit from *both* the interface class that you are implementing and the `Implementation` base class\n    * Make sure to include the macro `RAMULATOR_REGISTER_IMPLEMENTATION(...)` *inside* your implementation class definition. You should always specify which interface class your class is implementing and the stringified name of your implementation class in the macro.\nAssume you have the following registration macro for the interface class\n```c++\nclass MyIfce {\n  RAMULATOR_REGISTER_INTERFACE(MyIfce, \"MyInterfaceName\", \"An example of my interface class.\")\n}\n```\nand the following for the implementation class\n```c++\nclass MyImpl : public MyIfce, public Implementation {\n  RAMULATOR_REGISTER_IMPLEMENTATION(MyIfce, MyImpl, \"MyImplName\", \"An example of my implementation class.\")\n}\n```\nIf everything is correct, Ramulator 2.0 will be able to automatically construct a pointer of type `MyIfce*`, pointing to an object of type `MyImpl`, when it sees the following in the YAML configuration file:\n```yaml\nMyInterfaceName:\n  impl: MyImplName\n```\n\n3. Finally, add `impl/my_impl.cpp` to `target_sources` in `CMakeList.txt` so that CMake knows about the newly added source file.\n\n### Adding a New Interface (or New Component)\nThe process is similar to that of adding a new implementation, but you will need to create the interface and add them to `CMakeList.txt` under the corresponding component directory. If you add a new component (i.e., create a new directory under `src/`) you will need to add this new directory to the `CMakeList.txt` file under `src/`, i.e.,\n```cmake\nadd_subdirectory(my_comp)\n```\n## Verifying Ramulator 2.0's Memory Controller and DRAM Model\nWe use the [Verilog model from Micron](https://www.micron.com/products/dram/ddr4-sdram/part-catalog/mt40a2g4trf-093e) to verify that the DRAM commands issued by Ramulator 2.0 do not cause timing or state transition violations.\n1. Generate the instruction traces\n```bash\ncd verilog_verification\ncd traces\npython3 tracegen.py --type SimpleO3 --pattern {stream,random} --num-insts ${NUM_INSTS} --output ${TRACE_FILE} --distance ${MEMREQ_INTENSITY}\n```\n2. Collect the DRAM command trace (with addresses and time stamps) from the simulations\n```bash\ncd ..\n./ramulator2 -f ./verification-config.yaml\n```\n3. Configure the Verilog model to match the configuration used by Ramulator 2.0:\n- DRAM Organization: \"DDR4_8G_X8\"\n- DRAM Frequency: \"DDR4_2400\"\n- Number of Ranks: 2\n\nWe provide the already configured Verilog files in `verilog_verification/sources/`. \n\n4. Convert the DRAM Command Trace to fit the testbench of the Verilog model. We provide a script `verilog_verification/trace_converter.py` to do so.\n```bash\npython3 trace_converter.py DDR4_8G_X8 2 DDR4_2400\n```\n5.  Then you can just start your Verilog simulator (e.g., ModelSim) and check for violations. We provide a script to parse the simulation output and check for errors `verilog_verification/trace_verifier.py`\n```bash\npython3 trace_verifier.py \u003ctrace_filepath\u003e \u003coutput_filepath\u003e\n```\n\n## Reproducing the Results in our Ramulator 2.0 paper\n### Simulation Performance Comparison with Other Simulators\nWe put all scripts and configurations in `perf_comparison/`\n\n1. Get simulators from their respective sources and put their source code at `perf_comparison/simulators/`\n```bash\ncd perf_comparison\nmkdir simulators\ncd simulators\ngit clone https://github.com/umd-memsys/DRAMSim2.git    # DRAMSim2\ngit clone https://github.com/umd-memsys/DRAMsim3        # DRAMSim3\nwget http://www.cs.utah.edu/~rajeev/usimm-v1.3.tar.gz   # USIMM v1.3\ntar xvzf ./usimm-v1.3.tar.gz\ngit clone https://github.com/CMU-SAFARI/ramulator.git   # Ramulator 1.0\nmv ramulator ramulatorv1\ngit clone https://github.com/CMU-SAFARI/ramulator2.git  # Ramulator 2.0\nmv ramulator2 ramulatorv2\n```\n2. Apply patches to DRAMSim2, DRAMSim3, and USIMM to remove some of their hardcoded system configurations and unify the termination criteria of all simulators for a fair comparison. We do *not* change the core modeling and simulation code of these simulators.\n```bash\ncd DRAMSim2\ngit apply ../../DRAMSim2-patch.patch\ncd ..\ncd DRAMsim3\ngit apply ../../DRAMsim3-patch.patch\ncd ..\n```\n\n3. Build all simulators\n```bash\ncd ..\n./build_simulators.sh\n```\n4. Generate traces\n```bash\ncd traces\n./gen_all_traces.sh\n```\n5. Run the simulators with comparable system and DRAM configurations at `perf_comparison/configs/` and record runtimes\n```bash\npython3 perf_comparison.py\n```\n### Cross-Sectional Study of Various RowHammer Mitigation Techniques\nWe put all scripts and configurations in `rh_study/`\n1. Get the instruction traces from SPEC 2006 and 2017\n```bash\ncd rh_study\nwget \u003cdownload_link\u003e  # We host the traces here https://drive.google.com/file/d/1CvAenRZQmmM6s55ptG0-XyeLjhMVovTx/view?usp=drive_link\ntar xvzf ./cputraces.tar.gz\n```\n2. Generate workloads from trace combinations\n```bash\npython3 get_trace_combinations.py\n```\n3. Run the single-core and multi-core simulations (assuming using `slurm`, if not, please change line 68 of `run_singlecore.py` and line 73 of `run_multicore.py` to fit your job scheduler)\n```bash\npython3 run_singlecore.py\npython3 run_multicore.py\n```\n4. Execute the notebook `plot.ipynb` to plot the results\n\n\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2FCMU-SAFARI%2Framulator2","html_url":"https://awesome.ecosyste.ms/projects/github.com%2FCMU-SAFARI%2Framulator2","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2FCMU-SAFARI%2Framulator2/lists"}