{"id":27465058,"url":"https://github.com/FPGA-Research-Manchester/FABulous","last_synced_at":"2025-04-16T00:01:53.586Z","repository":{"id":37784866,"uuid":"290224265","full_name":"FPGA-Research/FABulous","owner":"FPGA-Research","description":"Fabric generator and CAD tools","archived":false,"fork":false,"pushed_at":"2025-04-02T13:17:02.000Z","size":213223,"stargazers_count":164,"open_issues_count":42,"forks_count":37,"subscribers_count":16,"default_branch":"master","last_synced_at":"2025-04-09T17:01:48.859Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":"https://fabulous.readthedocs.io/en/latest/","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/FPGA-Research.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2020-08-25T13:35:06.000Z","updated_at":"2025-04-07T09:56:34.000Z","dependencies_parsed_at":"2024-05-10T14:25:46.427Z","dependency_job_id":"a46745f1-08bf-44b1-9421-4d9dffd9b4c8","html_url":"https://github.com/FPGA-Research/FABulous","commit_stats":null,"previous_names":["fpga-research/fabulous","fpga-research-manchester/fabulous"],"tags_count":1,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/FPGA-Research%2FFABulous","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/FPGA-Research%2FFABulous/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/FPGA-Research%2FFABulous/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/FPGA-Research%2FFABulous/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/FPGA-Research","download_url":"https://codeload.github.com/FPGA-Research/FABulous/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":249173071,"owners_count":21224483,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2025-04-16T00:01:16.952Z","updated_at":"2025-04-16T00:01:53.563Z","avatar_url":"https://github.com/FPGA-Research.png","language":"Python","funding_links":[],"categories":["FPGAs","Python","FPGA Architectures"],"sub_categories":[],"readme":"# FABulous: an Embedded FPGA Framework\n\n[![License](https://img.shields.io/badge/License-Apache%202.0-blue.svg)](https://opensource.org/licenses/Apache-2.0)\n\n## Introduction\n\nFABulous is designed to fulfill the objectives of ease of use, maximum portability to different process nodes, good control for customization, and delivering good area, power, and performance characteristics of the generated FPGA fabrics. The framework provides templates for logic, arithmetic, memory, and I/O blocks that can be easily stitched together, whilst enabling users to add their own fully customized blocks and primitives.\n\nThe FABulous ecosystem generates the embedded FPGA fabric for chip fabrication, integrates\n[YosysHQ](https://github.com/YosysHQ/oss-cad-suite-build)\ntoolchain release packages, deals with the bitstream generation and provides after-fabrication tests. Additionally, we plan to provide an emulation path for system development.\n\nThis guide describes everything you need to set up your system to use the FABulous ecosystem, and the full project documentation can be found [here](https://fabulous.readthedocs.io/en/latest/).\n\n![FABulous Ecosystem Diagram](docs/source/figs/fabulous_ecosystem.png)\n\n## How to cite\n\nThe following paper can be used to cite FABulous:\n\nDirk Koch, Nguyen Dao, Bea Healy, Jing Yu, and Andrew Attwood. 2021. FABulous: An Embedded FPGA Framework. In \u003ci\u003eThe 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays\u003c/i\u003e (\u003ci\u003eFPGA '21\u003c/i\u003e). Association for Computing Machinery, New York, NY, USA, 45–56. DOI: https://doi.org/10.1145/3431920.3439302\n\n[Link to Paper](https://dl.acm.org/doi/pdf/10.1145/3431920.3439302)\n\n## Prerequisites\n\nThe following packages need to be installed for generating fabric HDL models and using the FABulous front end:\n\n- Python 3.9 or later\n\nInstall python dependencies\n\n```\npip3 install -r requirements.txt\nsudo apt-get install python3-tk\n```\n\nThe following packages need to be installed for the CAD toolchain\n - [Yosys](https://github.com/YosysHQ/yosys)\n - [nextpnr-generic](https://github.com/YosysHQ/nextpnr#nextpnr-generic)\n \n A flow using VPR, the place and route tool from the [VTR project](https://github.com/verilog-to-routing/vtr-verilog-to-routing) is also available. However, this still requires Yosys, as well as the FABulous nextpnr fork, since this contains files for design synthesis.\n\nTo build the docs locally, some further Python dependencies are required - to install these, run\n```\npip3 install -r docs/requirements.txt\n```\nfrom the top directory of the repository.\n\n## Getting started\n\nTo set up FABulous:\n\n```\ngit clone https://github.com/FPGA-Research-Manchester/FABulous\ncd FABulous\nexport FAB_ROOT=`pwd`\n```\n\nWe have provided a Python Command Line Interface (CLI) as well as a project structure for easy access of the FABulous toolchain.\n\nThe `Tile` folder contains all the definitions of the fabric primitive as well as the fabric matrix configuration. `fabric.csv` is what defining the architecture of the fabric. The FABulous project folder also contains a `.FABulous` folder which contains all the metadata during the generation of the fabric.\n\nWe can initiate the FABulous shell with `python3 FABulous.py \u003cproject_dir\u003e`. After that you will see a shell interface which allow for interactive fabric generation. To generate a fabric we first need to run `load_fabric [fabric_CSV]` to load in the fabric definition. Then we can call `run_FABulous_fabric` to generate a fabric.\n\nTo generate a model and bitstream for a specific design call `run_FABulous_bitstream npnr \u003cdir_to_top\u003e` which will\ngenerate a bitstream for the provided design in the same folder as the design.\n\nTo exit the shell simply type `exit` and this will terminate the shell.\n\nA demo of the whole flow:\n\n```\npython3 FABulous.py -c demo\n# In the FABulous shell (python3 FABulous.py demo)\nload_fabric\nrun_FABulous_fabric\nrun_FABulous_bitstream npnr ./user_design/sequential_16bit_en.v\nexit\n```\n\nTo run a simulation of a test bitstream on the design with Icarus Verilog:\n\n```\ncd demo/Test\n./build_test_design.sh\n./run_simulation.sh\n```\n\nThe tool also supports using TCL script to drive the build process. Assuming you have created a demo project using\n`python3 FABulous.py -c demo`, you can call `python3 FABulous.py demo -s ./demo/FABulous.tcl` to run the demo flow with the TCL interface.\n\nMore details on bitstream generation can be found [here](https://fabulous.readthedocs.io/en/latest/FPGA-to-bitstream/Bitstream%20generation.html).\n\nDetailed documentation for the project can be found [here](https://fabulous.readthedocs.io/en/latest/index.html)\n\n\n## GUI Setup\n\n[FABulator](https://github.com/FPGA-Research-Manchester/FABulator)\nsupports exploration of fabrics generated\nby FABulous, as well as displaying user \ndesigns.\n\nto import a fabric into FABulator, a geometry file\nfor the fabric is needed. This can be generated by\nrunning\n\n```\nload_fabric\ngen_fabric      # only needed once to generate matrix.csv files\ngen_geometry\n```\n\nin the FABulous shell. This file can then be imported\ninto FABulator. More information can be found\n[here](https://github.com/FPGA-Research-Manchester/FABulator).","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2FFPGA-Research-Manchester%2FFABulous","html_url":"https://awesome.ecosyste.ms/projects/github.com%2FFPGA-Research-Manchester%2FFABulous","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2FFPGA-Research-Manchester%2FFABulous/lists"}