{"id":13398939,"url":"https://github.com/PrincetonUniversity/prga","last_synced_at":"2025-03-14T03:30:59.114Z","repository":{"id":54723456,"uuid":"164019979","full_name":"PrincetonUniversity/prga","owner":"PrincetonUniversity","description":"Open-source FPGA research and prototyping framework.","archived":false,"fork":false,"pushed_at":"2023-01-12T15:47:42.000Z","size":1699,"stargazers_count":193,"open_issues_count":5,"forks_count":24,"subscribers_count":15,"default_branch":"release","last_synced_at":"2024-07-31T19:17:28.470Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":"http://parallel.princeton.edu/prga/","language":"SCSS","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"bsd-3-clause","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/PrincetonUniversity.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2019-01-03T20:31:30.000Z","updated_at":"2024-06-18T03:47:25.000Z","dependencies_parsed_at":"2023-02-09T12:31:58.822Z","dependency_job_id":null,"html_url":"https://github.com/PrincetonUniversity/prga","commit_stats":null,"previous_names":[],"tags_count":7,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/PrincetonUniversity%2Fprga","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/PrincetonUniversity%2Fprga/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/PrincetonUniversity%2Fprga/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/PrincetonUniversity%2Fprga/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/PrincetonUniversity","download_url":"https://codeload.github.com/PrincetonUniversity/prga/tar.gz/refs/heads/release","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":221432665,"owners_count":16820053,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-07-30T19:00:32.884Z","updated_at":"2024-10-25T14:31:53.287Z","avatar_url":"https://github.com/PrincetonUniversity.png","language":"SCSS","funding_links":[],"categories":["Projects (sorted by year)","FPGAs","FPGA Architectures","SCSS"],"sub_categories":["2018"],"readme":"[![PRGA logo](/docs/source/_static/images/logo.png)](https://parallel.princeton.edu/prga)\n\n# **P**rinceton **R**econfigurable **G**ate **A**rray\n\n[![License](https://img.shields.io/badge/License-BSD%203--Clause-blue.svg)](https://opensource.org/licenses/BSD-3-Clause)\n[![Documentation Status](https://readthedocs.org/projects/prga/badge/?version=latest)](https://prga.readthedocs.io/en/latest/?badge=latest)\n[![ci-install](https://github.com/PrincetonUniversity/prga/actions/workflows/checkinstall.yml/badge.svg?branch=release)](https://github.com/PrincetonUniversity/prga/actions/workflows/checkinstall.yml)\n[![ci-dev](https://github.com/PrincetonUniversity/prga/actions/workflows/quickcheck.yml/badge.svg?branch=dev)](https://github.com/PrincetonUniversity/prga/actions/workflows/quickcheck.yml)\n\nBuild your own FPGA Chip or embedded FPGA IP with Python, and enjoy a fully\nopen-source, auto-generated CAD flow specifically for your custom FPGA.\n\n#### Find out more\n* [Documentation](https://prga.rtfd.io)\n* [Website](https://parallel.princeton.edu/prga/)\n* [Cite PRGA](https://dl.acm.org/doi/abs/10.1145/3431920.3439294)\n\n## Quickstart\n\n```bash\n# Install PRGA and dependencies\ncd /path/to/prga/\n./envscr/install\n\n# Install iverilog (Icarus Verilog) if Synopsys VCS is not available\n# ...\n\n# Activate Python virtual environment\nsource ./envscr/activate\n\n# build an example FPGA\nmake -C examples/fpga/magic/k4_N2_8x8\n\n# create CAD \u0026 verification project\nmake -C examples/app/bcd2bin/magic_k4_N2_8x8\n\n# run RTL-to-bitstream flow and post-implementation simulation\nmake -C examples/app/bcd2bin/magic_k4_N2_8x8/tests/basic\n```\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2FPrincetonUniversity%2Fprga","html_url":"https://awesome.ecosyste.ms/projects/github.com%2FPrincetonUniversity%2Fprga","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2FPrincetonUniversity%2Fprga/lists"}