{"id":13774061,"url":"https://github.com/SymbiFlow/sphinx-verilog-domain","last_synced_at":"2025-05-11T06:31:59.473Z","repository":{"id":54247225,"uuid":"286714676","full_name":"SymbiFlow/sphinx-verilog-domain","owner":"SymbiFlow","description":"Sphinx domain to allow integration of Verilog / SystemVerilog documentation into Sphinx.","archived":false,"fork":false,"pushed_at":"2021-03-01T19:21:24.000Z","size":18231,"stargazers_count":23,"open_issues_count":7,"forks_count":7,"subscribers_count":14,"default_branch":"master","last_synced_at":"2025-05-07T03:04:56.427Z","etag":null,"topics":["hdl","rtl","sphinx","sphinx-domain","sphinx-extension","systemverilog","verilog","verilog-library"],"latest_commit_sha":null,"homepage":"https://sphinx-verilog-domain.rtfd.io","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/SymbiFlow.png","metadata":{"files":{"readme":"README.rst","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2020-08-11T10:27:44.000Z","updated_at":"2025-02-22T04:10:39.000Z","dependencies_parsed_at":"2022-08-13T10:00:25.138Z","dependency_job_id":null,"html_url":"https://github.com/SymbiFlow/sphinx-verilog-domain","commit_stats":null,"previous_names":[],"tags_count":2,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/SymbiFlow%2Fsphinx-verilog-domain","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/SymbiFlow%2Fsphinx-verilog-domain/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/SymbiFlow%2Fsphinx-verilog-domain/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/SymbiFlow%2Fsphinx-verilog-domain/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/SymbiFlow","download_url":"https://codeload.github.com/SymbiFlow/sphinx-verilog-domain/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":253528365,"owners_count":21922623,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["hdl","rtl","sphinx","sphinx-domain","sphinx-extension","systemverilog","verilog","verilog-library"],"created_at":"2024-08-03T17:01:23.318Z","updated_at":"2025-05-11T06:31:59.155Z","avatar_url":"https://github.com/SymbiFlow.png","language":"Python","funding_links":[],"categories":["Documentation"],"sub_categories":[],"readme":"sphinx-verilog-domain\n=====================\n\n.. warning::\n\n    This extension is in development stage.\n\nDependencies\n------------\n\n* ``lark-parser``\n\nEnabling\n--------\n\nAdd extension in ``conf.py``::\n\n    extensions = [ 'sphinx_verilog_domain' ]\n\nUsage\n-----\n\nModule headers (non-ANSI-style only for now)::\n\n    .. verilog::module:: module Top(a, b);\n\nPort declarations::\n\n    .. verilog:port:: input wire [31:0] a, b;\n\nParameter declarations::\n\n    .. verilog:parameter:: parameter logic param_name_05 = 1, param_name_05_b = 2;\n\nCustom name for use in references::\n\n    .. verilog:module:: module \\35(4p3|) (z);\n        :refname: module_escaped\n\nReferences::\n\n    Reference to :verilog:ref:`Top`\n    Reference to :verilog:ref:`module_escaped` - links to ``\\\\35(4p3|)``\n\nNesting::\n\n    .. verilog:module:: module Top1(a, b, c);\n\n        .. verilog:port:: input a;\n\n            Description of port ``a``\n\n        .. verilog:port:: input b;\n\n            Description of port ``b``\n\n        .. verilog:module:: module Nested(a);\n\n            .. verilog:port:: output a;\n\n                Description of port ``a`` in ``Nested``\n\n            Reference to module ``Top1``'s port ``a``: :verilog:ref:`Top1.a`.\n\nNamespaces\n^^^^^^^^^^\n\nThere are three directives for changing current Verilog scope:\n\n* ``.. verilog:namespace:: A::B`` - sets current scope to ``A::B``. Using ``$root`` as an argument or using the directive without argument at all sets global namespace.\n\n* ``.. verilog:namespace-push:: C::D`` - sets current scope to ``C::D`` relatively to current scope\n\n* ``.. verilog:namespace-pop::`` - restores scope which was active before previous ``namespace-push`` was called. If there is no matching ``namespace-push``, scope is set to global scope.\n\n.. note::\n    ``verilog::namespace`` resets push/pop stack\n\nExample::\n\n    .. verilog:namespace:: A::B\n    .. verilog:port:: input inside_a_b;\n    .. verilog:namespace-push:: C::D\n    .. verilog:port:: input inside_a_b_c_d;\n    .. verilog:namespace-pop::\n    .. verilog:port:: input inside_a_b_again;\n    .. verilog:namespace::\n    .. verilog:port:: input in_global_namespace;\n\nDevelopment\n-----------\n\nTo create and open the development environment with all system\nand python packages use::\n\n   make env\n   source env/conda/bin/activate sphinx-verilog-domain\n\nLicence\n-------\n\n`Apache 2.0 \u003cLICENSE\u003e`_\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2FSymbiFlow%2Fsphinx-verilog-domain","html_url":"https://awesome.ecosyste.ms/projects/github.com%2FSymbiFlow%2Fsphinx-verilog-domain","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2FSymbiFlow%2Fsphinx-verilog-domain/lists"}