{"id":15494466,"url":"https://github.com/addisonelliott/logifindfpgatest","last_synced_at":"2026-01-07T00:58:31.203Z","repository":{"id":139442280,"uuid":"82709421","full_name":"addisonElliott/LogiFindFPGATest","owner":"addisonElliott","description":"This is a Quartus Prime FPGA project testing the functionality of the LogiFind Altera Cyclone IV EP4CE6E22C8N Development Board. This product can also be found on eBay where I bought it from. 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This product can also be found on eBay where I bought it from. I hope to provide base code that will help others in their learning with this development board.\n\n## Where to get FPGA\nThe original manufacturer is a company called LogiFind.\n* [LogiFind](http://logifind.com/fpga-cpld-dsp/altera-cyclone-iv-fpga-development-board-ep4ce6e22c8n-1172.html)\n* [eBay](http://www.ebay.com/itm/Altera-Cyclone-IV-FPGA-EP4CE6E22C8N-V2-Development-Board-USB-BlasterProgrammer-/152251880703?hash=item2372eb54ff:g:8HMAAOSwYIxX5KVZ)\n\n## Additional Resources\nLogiFind supplies datasheets for each chip on the development board, user guide, development board schematic, 8 sample projects, USB blaster driver, UART COM PL2303 driver, PCB design, etc in a RAR file. Really, I am surprised at the amount of information they have included. I expected a lot less.\n\nSome users commented about the link being unsafe when their virus protection software scanned it, so I have uploaded it to my website in case anyone would rather use that link. Also, there were a few schematics and files that were completely in Chinese that I translated(with the power of the internet) and saved into English documents. Another reason to use my link instead of theirs.\n* [My Link](http://www.addielli.com/easyFPGA2.0.zip)\n* [Original Link](http://logifind.oss-cn-hongkong.aliyuncs.com/easyFPGA.rar)\n\n## Hardware Description Language (HDL)\nI use a few SystemVerilog features in this project such as enums, packages, and floating-point rounding. Thus, SystemVerilog must be enabled to run this project. If you are receiving errors about the line:\n`import UART_CONSTANTS::*;`\n\nThen, you likely do not have SystemVerilog enabled for the compiler.\n\n# [Downloading Project and Running it on Your FPGA](https://github.com/addisonElliott/LogiFindFPGATest/wiki/Downloading-Project-and-Running-it-on-Your-FPGA)\nDetailed guide can be found by clicking the link above. The page can also be found by going to the Wiki section of the Github project.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Faddisonelliott%2Flogifindfpgatest","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Faddisonelliott%2Flogifindfpgatest","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Faddisonelliott%2Flogifindfpgatest/lists"}