{"id":15047746,"url":"https://github.com/agenium-scale/nsimd","last_synced_at":"2025-04-09T15:01:59.265Z","repository":{"id":48105308,"uuid":"180551710","full_name":"agenium-scale/nsimd","owner":"agenium-scale","description":"Agenium Scale vectorization library for CPUs and GPUs","archived":false,"fork":false,"pushed_at":"2021-10-21T16:05:57.000Z","size":7251,"stargazers_count":331,"open_issues_count":17,"forks_count":29,"subscribers_count":25,"default_branch":"master","last_synced_at":"2025-04-02T10:06:28.148Z","etag":null,"topics":["aarch64","avx","avx2","avx512","cpp20","cpp20-library","cuda","hpc","neon","neon128","rocm","simd","simd-instructions","simd-library","simd-programming","sse2","sse42","sve","vectorization-library"],"latest_commit_sha":null,"homepage":"","language":"C","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/agenium-scale.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":"CONTRIBUTING.md","funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2019-04-10T09:47:03.000Z","updated_at":"2025-03-29T02:03:04.000Z","dependencies_parsed_at":"2022-08-12T18:40:48.004Z","dependency_job_id":null,"html_url":"https://github.com/agenium-scale/nsimd","commit_stats":null,"previous_names":[],"tags_count":7,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/agenium-scale%2Fnsimd","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/agenium-scale%2Fnsimd/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/agenium-scale%2Fnsimd/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/agenium-scale%2Fnsimd/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/agenium-scale","download_url":"https://codeload.github.com/agenium-scale/nsimd/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":248055272,"owners_count":21040153,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["aarch64","avx","avx2","avx512","cpp20","cpp20-library","cuda","hpc","neon","neon128","rocm","simd","simd-instructions","simd-library","simd-programming","sse2","sse42","sve","vectorization-library"],"created_at":"2024-09-24T21:04:09.191Z","updated_at":"2025-04-09T15:01:59.233Z","avatar_url":"https://github.com/agenium-scale.png","language":"C","funding_links":[],"categories":[],"sub_categories":[],"readme":"Documentation can be found [here](https://agenium-scale.github.io/nsimd/).\nWe put a lot of effort into\n[testing](https://agenium-scale.github.io/nsimd/how_tests_are_done.html).\n\n# What is NSIMD?\n\nAt its core, NSIMD is a vectorization library that abstracts [SIMD\nprogramming](\u003chttps://en.wikipedia.org/wiki/SIMD\u003e). It was designed to exploit\nthe maximum power of processors at a low development cost. NSIMD comes with\nmodules. As of now two of them adds support for GPUs to NSIMD. The\ndirection that NSIMD is taking is to provide several programming paradigms\nto address different problems and to allow a wider support of architectures.\nWith two of its modules NSIMD provides three programming paradigms:\n\n- Imperative programming provided by NSIMD core that supports a lots of\n  CPU/SIMD extensions.\n- Expressions templates provided by the TET1D module that supports all\n  architectures from NSIMD core and adds support for NVIDIA and AMD GPUs.\n- Single Program Multiple Data provided by the SPMD module that supports all\n  architectures from NSIMD core and adds support for NVIDIA and AMD GPUs.\n\n## Supported architectures\n\n| Architecture                          | NSIMD core | TET1D module | SPMD module |\n|:--------------------------------------|:----------:|:------------:|:-----------:|\n| CPU (scalar functions)                |     Y      |      Y       |      Y      |\n| CPU (128-bits SIMD emulation)         |     Y      |      Y       |      Y      |\n| Intel SSE 2                           |     Y      |      Y       |      Y      |\n| Intel SSE 4.2                         |     Y      |      Y       |      Y      |\n| Intel AVX                             |     Y      |      Y       |      Y      |\n| Intel AVX2                            |     Y      |      Y       |      Y      |\n| Intel AVX-512 for KNLs                |     Y      |      Y       |      Y      |\n| Intel AVX-512 for Skylake processors  |     Y      |      Y       |      Y      |\n| Arm NEON 128 bits (ARMv7 and earlier) |     Y      |      Y       |      Y      |\n| Arm NEON 128 bits (ARMv8 and later)   |     Y      |      Y       |      Y      |\n| Arm SVE (original sizeless SVE)       |     Y      |      Y       |      Y      |\n| Arm fixed sized SVE                   |     Y      |      Y       |      Y      |\n| IBM POWERPC VMX                       |     Y      |      Y       |      Y      |\n| IBM POWERPC VSX                       |     Y      |      Y       |      Y      |\n| NVIDIA CUDA                           |     N      |      Y       |      Y      |\n| AMD ROCm                              |     N      |      Y       |      Y      |\n| Intel oneAPI                          |     N      |      Y       |      Y      |\n\n## Contributions\n\n| Contributor          | Contribution(s)                                   |\n|:---------------------|:--------------------------------------------------|\n| Guillaume Quintin    | Maintainer + main contributor                     |\n| Alan Kelly           | Arm NEON + mathematical functions                 |\n| Kenny Péou           | Fixed point module                                |\n| Xavier Berault       | PowerPC VMX and VSX                               |\n| Vianney Stricher     | NSIMD core + oneAPI in SPMD and TET1D modules     |\n| Quentin Khan         | Soa/AoS loads and stores                          |\n| Paul Gannay          | PowerPC VMX, VSX + testing system                 |\n| Charly Chevalier     | Benchmarking system + Python internals            |\n| Erik Schnetter       | Fixes + code generation                           |\n| Lénaïc Bagnères      | Fixes + TET1D module                              |\n| Jean-Didier Pailleux | Shuffles operators                                |\n\n## How it works?\n\nTo achieve maximum performance, NSIMD mainly relies on the inline optimization\npass of the compiler. Therefore using any mainstream compiler such as GCC,\nClang, MSVC, XL C/C++, ICC and others with NSIMD will give you a zero-cost SIMD\nabstraction library.\n\nTo allow inlining, a lot of code is placed in header files. *Small* functions\nsuch as addition, multiplication, square root, etc, are all present in header\nfiles whereas big functions such as I/O are put in source files that are\ncompiled as a `.so`/`.dll` library.\n\nNSIMD provides C89, C11, C++98, C++11, C++14 and C++20 APIs. All APIs allow\nwriting generic code. For the C API this is achieved through a thin layer of\nmacros and with the `_Generic` keyword for the C advanced API; for the C++ APIs\nit is achieved using templates and function overloading. The C++ APIs are split\ninto two. The first part is a C-like API with only function calls and direct\ntype definitions for SIMD types while the second one provides operator\noverloading, higher level type definitions that allows unrolling.  C++11, C++14\nAPIs add for instance templated type definitions and templated constants while\nthe C++20 API uses concepts for better error reporting.\n\nBinary compatibility is guaranteed by the fact that only a C ABI is exposed.\nThe C++ API only wraps the C calls.\n\n## Supported compilers\n\nNSIMD is tested with GCC, Clang, MSVC, NVCC, HIPCC and ARMClang. As a C89 and a\nC++98 API are provided, other compilers should work fine. Old compiler versions\nshould work as long as they support the targeted SIMD extension. For instance,\nNSIMD can compile SSE 4.2 code with MSVC 2010.\n\n# Build the library\n\n## CMake\n\nAs CMake is widely used as a build system, we have added support for building\nthe library only and the corresponding find module.\n\n```sh\nmkdir build\ncd build\ncmake .. -Dsimd=SIMD_EXT\nmake\nmake install\n```\n\nwhere `SIMD_EXT` is one of the following: CPU, SSE2, SSE42, AVX, AVX2,\nAVX512\\_KNL, AVX512\\_SKYLAKE, NEON128, AARCH64, SVE, SVE128, SVE256, SVE512,\nSVE1024, SVE2048, VMX, VSX, CUDA, ROCM.\n\nNote that when compiling for NEON128 on Linux one has to choose the ABI, either\narmel or armhf. Default is armel. As CMake is unable to autodetect this\nparameter one has to tell CMake manually.\n\n```sh\ncmake .. -Dsimd=neon128                               # for armel\ncmake .. -Dsimd=neon128 -DNSIMD_ARM32_IS_ARMEL=OFF    # for armhf\n```\n\nWe provide in the `scripts` directory a CMake find module to find NSIMD on\nyour system. One can let the module find NSIMD on its own, if several\nversions for different SIMD extensions of NSIMD are installed then the\nmodule will find and return one. There is no guaranty on which versions will\nbe chosen by the module.\n\n```cmake\nfind_package(NSIMD)\n```\n\nIf one wants a specific version of the library for a given SIMD extension then\nuse the `COMPONENTS` part of `find_package`. Only one component is supported\nat a time.\n\n```cmake\nfind_package(NSIMD COMPONENTS avx2)         # find only NSIMD for Intel AVX2\nfind_package(NSIMD COMPONENTS sve)          # find only NSIMD for Arm SVE\nfind_package(NSIMD COMPONENTS sse2 sse42)   # unsupported\n```\n\n## Nsconfig\n\nThe support for CMake has been limited to building the library only. If you\nwish to run tests or contribute you need to use nsconfig as CMake has several\nflaws:\n- too slow especially on Windows,\n- inability to use several compilers at once,\n- inability to have a portable build system,\n- very poor support for portable compilation flags,\n- ...\n\n## Dependencies (nsconfig only)\n\nGenerating C/C++ files is done by the Python3 code contained in the `egg`.\nPython should be installed by default on any Linux distro. On Windows it comes\nwith the latest versions of Visual Studio on Windows\n(\u003chttps://visualstudio.microsoft.com/vs/community/\u003e), you can also download and\ninstall it directly from \u003chttps://www.python.org/\u003e.\n\nThe Python code can call `clang-format` to properly format all generated C/C++\nsource. On Linux you can install it via your package manager. On Windows you\ncan use the official binary at \u003chttps://llvm.org/builds/\u003e.\n\nCompiling the library requires a C++98 compiler. Any version of GCC, Clang or\nMSVC will do. Note that the produced library and header files for the end-user\nare C89, C++98, C++11 compatible. Note that C/C++ files are generated by a\nbunch of Python scripts and they must be executed first before running building\nthe library.\n\n## Build for Linux\n\n```bash\nbash scripts/build.sh for simd_ext1/.../simd_extN with comp1/.../compN\n```\n\nFor each combination a directory `build-simd_ext-comp` will be created and\nwill contain the library. Supported SIMD extension are:\n\n- sse2\n- sse42\n- avx\n- avx2\n- avx512\\_knl\n- avx512\\_skylake\n- neon128\n- aarch64\n- sve\n- sve128\n- sve256\n- sve512\n- sve1024\n- sve2048\n- vmx\n- vsx\n- cuda\n- rocm\n\nSupported compiler are:\n\n- gcc\n- clang\n- icc\n- armclang\n- xlc\n- dpcpp\n- fcc\n- cl\n- nvcc\n- hipcc\n\nNote that certain combination of SIMD extension/compilers are not supported\nsuch as aarch64 with icc, or avx512\\_skylake with nvcc.\n\n## Build on Windows\n\nMake sure you are typing in a Visual Studio prompt. The command is almost the\nsame as for Linux with the same constraints on the pairs SIMD\nextension/compilers.\n\n```batch\nscripts\\build.bat for simd_ext1/.../simd_extN with comp1/.../compN\n```\n\n## More details on building the library\n\nThe library uses a tool called nsconfig\n(\u003chttps://github.com/agenium-scale/nstools\u003e) which is basically a Makefile\ntranslator. If you have just built NSIMD following what's described above\nyou should have a `nstools` directory which contains `bin/nsconfig`. If not\nyou can generate it using on Linux\n\n```bash\nbash scripts/setup.sh\n```\n\nand on Windows\n\n```batch\nscripts\\setup.bat\n```\n\nThen you can use `nsconfig` directly it has a syntax similar to CMake at\ncommand line. Here is a quick tutorial with Linux command line. We first\ngo to the NSIMD directory and generate both NSIMD and nsconfig.\n\n```bash\n$ cd nsimd\n$ python3 egg/hatch.py -ltf\n$ bash scripts/setup.sh\n$ mkdir build\n$ cd build\n```\n\nHelp can be displayed using `--help`.\n\n```bash\n$ ../nstools/bin/nsconfig --help\nusage: nsconfig [OPTIONS]... DIRECTORY\nConfigure project for compilation.\n\n  -v              verbose mode, useful for debugging\n  -nodev          Build system will never call nsconfig\n  -DVAR=VALUE     Set value of variable VAR to VALUE\n  -list-vars      List project specific variable\n  -GBUILD_SYSTEM  Produce files for build system BUILD_SYSTEM\n                  Supported BUILD_SYSTEM:\n                    make       POSIX Makefile\n                    gnumake    GNU Makefile\n                    nmake      Microsot Visual Studio NMake Makefile\n                    ninja      Ninja build file (this is the default)\n                    list-vars  List project specific variables\n  -oOUTPUT        Output to OUTPUT instead of default\n  -suite=SUITE    Use compilers from SUITE as default ones\n                  Supported SUITE:\n                    gcc       The GNU compiler collection\n                    msvc      Microsoft C and C++ compiler\n                    llvm      The LLVM compiler infrastructure\n                    armclang  Arm suite of compilers based on LLVM\n                    xlc       IBM suite of compilers\n                    fcc_trad_mode\n                              Fujitsu compiler in traditional mode\n                    fcc_clang_mode\n                              Fujitsu compiler in clang mode\n                    emscripten\n                              Emscripten suite for compiling into JS\n                    icc       Intel C amd C++ compiler\n                    rocm      Radeon Open Compute compilers\n                    oneapi    Intel oneAPI compilers\n                    cuda, cuda+gcc, cuda+clang, cuda+msvc\n                              Nvidia CUDA C++ compiler\n  -comp=COMMAND,COMPILER[,PATH[,VERSION[,ARCHI]]]\n                  Use COMPILER when COMMAND is invoked for compilation\n                  If VERSION and/or ARCHI are not given, nsconfig will\n                  try to determine those. This is useful for cross\n                  compiling and/or setting the CUDA host compiler.\n                  COMMAND must be in { cc, c++, gcc, g++, cl, icc, nvcc,\n                  hipcc, hcc, clang, clang++, armclang, armclang++,\n                  cuda-host-c++, emcc, em++ } ;\n                  VERSION is compiler dependant. Note that VERSION\n                  can be set to only major number(s) in which case\n                  nsconfig fill missing numbers with zeros.\n                  Supported ARCHI:\n                    x86      Intel 32-bits ISA\n                    x86_64   Intel/AMD 64-bits ISA\n                    armel    ARMv5 and ARMv6 32-bits ISA\n                    armhf    ARMv7 32-bits ISA\n                    aarch64  ARM 64-bits ISA\n                    ppc64el  PowerPC 64-bits little entian\n                    wasm32   WebAssembly with 32-bits memory indexing\n                    wasm64   WebAssembly with 64-bits memory indexing\n                  Supported COMPILER:\n                    gcc, g++              GNU Compiler Collection\n                    clang, clang++        LLVM Compiler Infrastructure\n                    emcc, em++            Emscripten compilers\n                    msvc, cl              Microsoft Visual C++\n                    armclang, armclang++  ARM Compiler\n                    xlc, xlc++            IBM Compiler\n                    icc                   Intel C/C++ Compiler\n                    dpcpp                 Intel DPC++ Compiler\n                    nvcc                  Nvidia CUDA compiler\n                    hipcc                 ROCm HIP compiler\n                    fcc_trad_mode, FCC_trad_mode\n                                          Fujitsu C and C++ traditionnal\n                                          compiler\n                    fcc_clang_mode, FCC_clang_mode\n                                          Fujitsu C and C++ traditionnal\n                                          compiler\n  -prefix=PREFIX  Set path for installation to PREFIX\n  -h, --help      Print the current help\n\nNOTE: Nvidia CUDA compiler (nvcc) needs a host compiler. Usually on\n      Linux systems it is GCC while on Windows systems it is MSVC.\n      If nvcc is chosen as the default C++ compiler via the -suite\n      switch, then its host compiler can be invoked in compilation\n      commands with 'cuda-host-c++'. The latter defaults to GCC on Linux\n      systems and MSVC on Windows systems. The user can of course choose\n      a specific version and path of this host compiler via the\n      '-comp=cuda-host-c++,... parameters. If nvcc is not chosen as the\n      default C++ compiler but is used for compilation then its default\n      C++ host compiler is 'c++'. The latter can also be customized via\n      the '-comp=c++,...' command line switch.\n```\n\nEach project can defined its own set of variable controlling the generation of\nthe ninja file of Makefile.\n\n```bash\n$ ../nstools/bin/nsconfig .. -list-vars\nProject variables list:\nname             | description\n-----------------|-----------------------------------\nsimd             | SIMD extension to use\ncuda_arch_flags  | CUDA target arch flag(s) for tests\nstatic_libstdcpp | Compile the libstdc++ statically\ncpp20_tests      | Enable C++20 tests\n```\n\nFinally one can choose what to do and compile NSIMD and its tests.\n\n```bash\n$ ../nstools/bin/nsconfig .. -Dsimd=avx2\n$ ninja\n$ ninja tests\n```\n\nNsconfig comes with nstest a small tool to execute tests.\n\n```bash\n$ ../nstools/bin/nstest -j20\n```\n\n## Cross compilation\n\nIt is useful to cross-compile for example when you are on a Intel workstation\nand want to compile for a Raspberry Pi. Nsconfig generate some code, compile\nand run it to obtain informations on the C or C++ compilers. When cross\ncompiling, unless you configured your Linux box with binfmt\\_misc to\ntranparently execute aarch64 binaries on a x86\\_64 host you need to give\nnsconfig all the informations about the compilers so that it does not need to\nrun aarch64 code on x86\\_64 host.\n\n```bash\n$ ../nstools/bin/nsconfig .. -Dsimd=aarch64 \\\n      -comp=cc,gcc,aarch64-linux-gnu-gcc,10.0,aarch64 \\\n      -comp=c++,gcc,aarch64-linux-gnu-g++,10.0,aarch64\n```\n\n## Defines that control NSIMD compilation and usage\n\nSeveral defines control NSIMD.\n\n- `FMA` or `NSIMD_FMA` indicate to NSIMD that fma intrinsics can be used\n  when compiling code. This is useful on Intel SSE2, SSE42, AVX and AVX2.\n\n- `FP16` or `NSIMD_FP16` indicate to NSIMD that the targeted architecture\n  natively (and possibly partially) supports IEEE float16's. This is useful\n  when compiling for Intel SSE2, SSE42, AVX and AVX2, Arm NEON128 and AARCH64.\n\n# Philosophy of NSIMD\n\nOriginally the library aimed at providing a portable zero-cost abstraction over\nSIMD vendor intrinsics disregarding the underlying SIMD vector length. NSIMD\nwill of course continue to wrap SIMD intrinsics from various vendors but\nmore efforts will be put into writing NSIMD modules and improving the existing\nones especially the SPMD module. \n\n## The SPMD paradigm\n\nIt is our belief that SPMD is a good paradigm for writing vectorized code. It\nhelps both the developer and the compiler writer. It forces the developers to\nbetter arrange its data ion memory more suited for vectorization. On the\ncompiler side it is more simplier to write a \"SPMD compiler\" than a standard\nC/C++/Fortran compiler that tries to autovectorize some weird loop with data\nscattered all around the place. Our priority for our SPMD module are the\nfollowing:\n\n- Add oneAPI/SYCL support.\n- Provide a richer API.\n- Provide cross-lane data transfer.\n- Provide a way to abstract shared memory.\n\nOur approach can be roughly compared to ISPC (\u003chttps://ispc.github.io/\u003e)\nbut from a library point of view.\n\n## Wrapping intrinsics in NSIMD core\n\nNSIMD was designed following as closely as possible the following guidelines:\n\n- Correctness primes over speed except for corner cases which may include the\n  following:\n  + Buggy intrinsics on rare input values (denormal numbers, infinities,\n    NaNs) in which case a slower but correct alternative may be\n    proposed to bypass the buggy intrinsics.\n  + A buggy intrinsics but for a specific version of a family of chips. It\n    would be unreasonable to penalize the majority of users vs. a few (or\n    even no) users.\n- Emulate with tricks and intrinsic integer arithmetic when not available.\n- Use common names as found in common computation libraries.\n- Do not hide SIMD registers, one variable (of a type such as `nsimd::pack`)\n  matches one register. When possible force the user to think different between\n  SIMD code and scalar code.\n- Make the life of the compiler as easy as possible: keep the code simple to\n  allow the compiler to perform as many optimizations as possible.\n- Favor the advanced C++ API.\n\nYou may wrap intrinsics that require compile time knowledge of the underlying\nvector length but this should be done with caution.\n\nWrapping intrinsics that do not exist for all types is difficult and may\nrequire casting or emulation. For instance, 8 bit integer vector multiplication\nusing SSE2 does not exist. We can either process each pair of integers\nindividually or we can cast the 8 bit vectors to 16 bit vectors, do the\nmultiplication and cast them back to 8 bit vectors. In the second case,\nchaining operations will generate many unwanted casts.\n\nTo avoid hiding important details to the user, overloads of operators involving\nscalars and SIMD vectors are not provided by default. Those can be included\nexplicitely to emphasize the fact that using expressions like `scalar + vector`\nmight incur an optimization penalty.\n\nThe use of `nsimd::pack` may not be portable to ARM SVE and therefore must be\nincluded manually. ARM SVE registers can only be stored in sizeless strucs\n(`__sizeless_struct`). This feature (as of 2019/04/05) is only supported by the\nARM compiler. We do not know whether other compilers will use the same keyword\nor paradigm to support SVE intrinsics.\n\n# Contributing to NSIMD\n\nThe wrapping of intrinsics, the writing of test and bench files are tedious and\nrepetitive tasks. Most of those are generated using Python scripts that can be\nfound in `egg`.\n\n- Intrinsics that do not require to known the vector length can be wrapped and\n  will be accepted with no problem.\n- Intrinsics that do require the vector length at compile time can be wrapped\n  but it is up to the maintainer to accept it.\n- Use `clang-format` when writing C or C++ code.\n- The `.cpp` files are written in C++98.\n- The headers files must be compatible with C89 (when possible otherwise\n  C99), C++98, C++11, C++14 up to and including C++20.\n\nPlease see \u003cdoc/markdown/CONTRIBUTE.md\u003e for more details.\n\n# LICENSES\n\nNSIMD contains files from the excellent [Sleef library](https://sleef.org/)\nwhose license is stated below. The corresponding files are all located\nin the `src` folder and have retained their original license notices.\n\n## NSIMD license\n\nCopyright (c) 2021 Agenium Scale\n\nPermission is hereby granted, free of charge, to any person obtaining a copy of\nthis software and associated documentation files (the \"Software\"), to deal in\nthe Software without restriction, including without limitation the rights to\nuse, copy, modify, merge, publish, distribute, sublicense, and/or sell copies\nof the Software, and to permit persons to whom the Software is furnished to do\nso, subject to the following conditions:\n\nThe above copyright notice and this permission notice shall be included in all\ncopies or substantial portions of the Software.\n\nTHE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\nIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\nFITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE\nAUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\nLIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\nOUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\nSOFTWARE.\n\n## Sleef license ([Boost Software License v1.0](https://www.boost.org/LICENSE_1_0.txt))\n\nBoost Software License - Version 1.0 - August 17th, 2003\n\nPermission is hereby granted, free of charge, to any person or organization\nobtaining a copy of the software and accompanying documentation covered by\nthis license (the \"Software\") to use, reproduce, display, distribute,\nexecute, and transmit the Software, and to prepare derivative works of the\nSoftware, and to permit third-parties to whom the Software is furnished to\ndo so, all subject to the following:\n\nThe copyright notices in the Software and this entire statement, including\nthe above license grant, this restriction and the following disclaimer,\nmust be included in all copies of the Software, in whole or in part, and\nall derivative works of the Software, unless such copies or derivative\nworks are solely in the form of machine-executable object code generated by\na source language processor.\n\nTHE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\nIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\nFITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT\nSHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE\nFOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,\nARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER\nDEALINGS IN THE SOFTWARE.\n\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fagenium-scale%2Fnsimd","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fagenium-scale%2Fnsimd","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fagenium-scale%2Fnsimd/lists"}