{"id":21384033,"url":"https://github.com/alicepagano/mapd-a-project-ipbus-filter","last_synced_at":"2026-03-19T20:08:57.350Z","repository":{"id":130963602,"uuid":"339366536","full_name":"AlicePagano/MAPD-A-Project-IPBUS-Filter","owner":"AlicePagano","description":"FIR filter co-processor implementation in FPGA","archived":false,"fork":false,"pushed_at":"2021-02-16T12:59:34.000Z","size":42100,"stargazers_count":3,"open_issues_count":0,"forks_count":0,"subscribers_count":3,"default_branch":"main","last_synced_at":"2025-01-22T23:28:30.568Z","etag":null,"topics":["fpga-programming","vhdl-code"],"latest_commit_sha":null,"homepage":"","language":"VHDL","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/AlicePagano.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2021-02-16T10:48:52.000Z","updated_at":"2023-02-27T02:26:25.000Z","dependencies_parsed_at":"2023-03-22T20:15:11.305Z","dependency_job_id":null,"html_url":"https://github.com/AlicePagano/MAPD-A-Project-IPBUS-Filter","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/AlicePagano%2FMAPD-A-Project-IPBUS-Filter","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/AlicePagano%2FMAPD-A-Project-IPBUS-Filter/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/AlicePagano%2FMAPD-A-Project-IPBUS-Filter/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/AlicePagano%2FMAPD-A-Project-IPBUS-Filter/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/AlicePagano","download_url":"https://codeload.github.com/AlicePagano/MAPD-A-Project-IPBUS-Filter/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":243864609,"owners_count":20360355,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["fpga-programming","vhdl-code"],"created_at":"2024-11-22T11:37:39.342Z","updated_at":"2026-01-03T00:35:04.372Z","avatar_url":"https://github.com/AlicePagano.png","language":"VHDL","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Management and Analysis of Physics Datasets - Part A\n\n## FIR filter co-processor in FPGA with IPbus protocol\n\n\u003cp align=\"center\"\u003e\n    \u003cimg src=\"./wavedrom.png\" alt=\"Drawing\" style=\"width: 500px\"/\u003e\n\u003c/p\u003e\n\n\n\n\n\n## Authors\n\n* [**Rocco Ardino**](https://github.com/RoccoA97) (University of Padua)\n* [**Alessandro Lambertini**](https://github.com/Lambe96) (University of Padua)\n* [**Alice Pagano**](https://github.com/AlicePagano) (University of Padua)\n* [**Michele Puppin**](https://github.com/michelepuppin) (University of Padua)\n\n\n\n\n\n## Abstract\nIn this project we implement a FIR filter co-processor in FPGA (**Arty7 xc7a35tcsg324-1**), along with input/output data storage and transfer protocols. In particular, we use the IPbus protocol for communication with the FPGA board and a DPRAM component as memory source. We test the hardware implementation of the filter on several input waveforms and we compare the results with the ones obtained through a Python simulation.\n\n\n\n\n## Content of the folder\nThe repository is organized as follows:\n* **`code`**: folder with all the source code of the project, in particular:\n    * **`firmware`**: all the code for the FPGA firmware;\n    * **`software`**: some scripts to access FPGA memory registers through `uhal`;\n    * **`analysis`**: some notebooks to write the data to filter and to read the filtered data on FPGA;\n* **`report`**: folder with a report of the project, including also the `.tex` source files.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Falicepagano%2Fmapd-a-project-ipbus-filter","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Falicepagano%2Fmapd-a-project-ipbus-filter","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Falicepagano%2Fmapd-a-project-ipbus-filter/lists"}