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reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["analog-devices","fpga","hacktoberfest","hdl","jesd204b","verilog"],"created_at":"2024-08-01T09:00:58.330Z","updated_at":"2026-02-27T01:33:03.104Z","avatar_url":"https://github.com/analogdevicesinc.png","language":"Verilog","funding_links":[],"categories":["Libraries","Verilog","Awesome List"],"sub_categories":[],"readme":"\u003cp align=\"center\"\u003e\n\u003cimg src=\"docs/sources/HDL_logo.png\" width=\"500\" alt=\"ADI HDL Logo\"\u003e \u003c/br\u003e\n\u003c/p\u003e\n\n\u003cp align=\"center\"\u003e\n\u003ca href=\"https://github.com/analogdevicesinc/hdl/actions\"\u003e\n\u003cimg src=\"https://github.com/analogdevicesinc/hdl/actions/workflows/check_for_guideline_rules.yml/badge.svg\" alt=\"Build Status\"\u003e\n\u003c/a\u003e\n\n\u003ca href=\"https://github.com/analogdevicesinc/hdl/actions\"\u003e\n\u003cimg src=\"https://github.com/analogdevicesinc/hdl/actions/workflows/test_n_lint.yml/badge.svg\" alt=\"Build Status\"\u003e\n\u003c/a\u003e\n\u003c/p\u003e\n\n\u003cp align=\"center\"\u003e\n\u003ca href=\"http://analogdevicesinc.github.io/hdl/\"\u003e\n\u003cimg alt=\"GitHub Pages\" src=\"https://img.shields.io/badge/docs-GitHub%20Pages-blue.svg\"\u003e\n\u003c/a\u003e\n\n\u003ca href=\"https://ez.analog.com/fpga/f/q-a\"\u003e\n\u003cimg alt=\"EngineerZone\" src=\"https://img.shields.io/badge/Support-on%20EngineerZone-blue.svg\"\u003e\n\u003c/a\u003e\n\n\u003ca href=\"https://wiki.analog.com/resources/fpga/docs/hdl\"\u003e\n\u003cimg alt=\"Analog Wiki\" src=\"https://img.shields.io/badge/Wiki-on%20wiki.analog.com-blue.svg\"\u003e\n\u003c/a\u003e\n\u003c/p\u003e\n\n---\n# HDL Reference Designs\n\n[Analog Devices, Inc.](http://www.analog.com/en/index.html) HDL libraries and\nprojects for various reference design and prototyping systems.\nThis repository contains HDL code (Verilog or VHDL) and the required Tcl\nscripts to create and build a specific FPGA example design using the AMD\nXilinx and/or Intel tool chains.\n\n## Support\n\nThe HDL is provided \"AS IS\". Support is only provided on\n[EngineerZone](https://ez.analog.com/community/fpga).\n\nIf you feel you can not, or do not want to ask questions on\n[EngineerZone](https://ez.analog.com/community/fpga), you should not use or\nlook at the HDL found in this repository. Just like you have the freedom and\nrights to use this software in your products (with the obligations found in\nindividual licenses) and get support on\n[EngineerZone](https://ez.analog.com/community/fpga), you have the freedom and\nrights not to use this software and get data sheet level support from traditional\n[ADI](http://www.analog.com/en/index.html) contacts that you may have.\n\nThere is no free replacement for consulting services. If you have questions\nthat are best handed one-on-one engagement, and are time sensitive, consider\nhiring a consultant. If you want to find a consultant who is familiar with\nthe HDL found in this repository - ask on\n[EngineerZone](https://ez.analog.com/community/fpga).\n\n## Getting started\n\nThis repository supports reference designs for different\n[Analog Devices boards](../main/projects) based on\n[AMD Xilinx and Intel FPGA development boards](../main/projects/common)\nor standalone.\n\n### Prerequisites\n\n- [AMD Xilinx Vivado Design Suite](https://www.xilinx.com/support/download.html)\n\n**or**\n\n- [Intel Quartus Prime Design Suite](https://www.altera.com/downloads/download-center.html)\n\nPlease make sure that you have the\n[required](https://github.com/analogdevicesinc/hdl/releases) tool versions.\n\n### How to build a project\n\nFor building a project (generate a bitstream), you have to use the\n[GNU Make tool](https://www.gnu.org/software/make/). If you're a Windows user,\nplease checkout\n[this page](https://analogdevicesinc.github.io/hdl/user_guide/build_hdl.html#environment),\nto see how you can install this tool.\n\nTo build a project, checkout the\n[latest release](https://github.com/analogdevicesinc/hdl/releases), after that\njust **cd** to the project that you want to build and run make:\n\n```\ncd projects/fmcomms2/zcu102\nmake\n```\n\nA more comprehensive build guide can be found under the following link:\n\u003chttps://analogdevicesinc.github.io/hdl/user_guide/build_hdl.html\u003e\n\n### Building documentation (developer purposes only)\n\n\u003cdetails\u003e\n\n\u003csummary\u003e Click here for details on how to build the documentation and open it locally on your machine. \u003c/summary\u003e\n\nEnsure pip is newer than version 23.\n```\npip install pip --upgrade\n```\nInstall the documentation tools.\n```\n(cd docs ; pip install -r requirements.txt --upgrade)\n```\nBuild the libraries (recommended).\n```\n(cd library ; make)\n```\nBuild the documentation with Sphinx.\n```\n(cd docs ; make html)\n```\nThe generated documentation will be available at `docs/_build/html`.\n\n\u003c/details\u003e\n\n## Which branch should I use?\n\n- If you want to use the most stable code base, always use the\n  [latest release branch](https://github.com/analogdevicesinc/hdl/releases).\n- If you want to use the latest, but sometimes unstable, check out the\n  [main branch](https://github.com/analogdevicesinc/hdl/tree/main).\n\nThe AMD Xilinx Vivado/Intel Quartus versions for each branch can be found\n[here](https://analogdevicesinc.github.io/hdl/user_guide/releases.html), or in\n[the script that sets these versions](https://github.com/analogdevicesinc/hdl/blob/main/scripts/adi_env.tcl),\nwhile checked out on your desired branch.\n\n## Use already built files\n\nYou can download already built files and use them as they are.\nFor the main branch, they are available at the link inside\n[this document](https://swdownloads.analog.com/cse/boot_partition_files/main/latest_boot.txt).\nKeep in mind that the ones from the main branch are not stable all the time.\nWe suggest using the latest release branch, see\n[here](https://analogdevicesinc.github.io/hdl/user_guide/releases.html).\nThe files are built from [main branch](https://github.com/analogdevicesinc/hdl/tree/main)\nwhenever there are new commits in HDL or Linux repositories.\n\n:warning: Pay attention when using already built files from the main branch,\nas they are not tested in hardware!\n\n## Software\n\nIn general, all the projects have no-OS (baremetal) and a Linux support.\nSee [no-OS](https://github.com/analogdevicesinc/no-OS) repository or\n[Linux](https://github.com/analogdevicesinc/linux) repository for more information.\n\n## License\n\nIn this HDL repository, there are many different and unique modules, consisting\nof various HDL (Verilog or VHDL) components. The individual modules are\ndeveloped independently, and may be accompanied by separate and unique license\nterms.\n\nThe user should read each of these license terms, and understand the\nfreedoms and responsibilities that he or she has by using this source/core.\n\nSee [LICENSE](../main/LICENSE) for more details. The separate license files\ncab be found here:\n\n- [LICENSE_ADIBSD](../main/LICENSE_ADIBSD)\n- [LICENSE_GPL2](../main/LICENSE_GPL2)\n- [LICENSE_LGPL](../main/LICENSE_LGPL)\n\n## Comprehensive user guide\n\nSee [HDL User Guide](https://analogdevicesinc.github.io/hdl/user_guide/build_hdl.html)\nfor a more detailed guide.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fanalogdevicesinc%2Fhdl","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fanalogdevicesinc%2Fhdl","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fanalogdevicesinc%2Fhdl/lists"}