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nice syntax [OK]\n  - forth comments [OK]\n  - loop [OK]\n  - forth definitions [OK]\n  - ( ... ) comments [OK]\n\n- assembler\n  - variables [OK]\n  - 2 pass compiler [OK]\n  - asciiz [OK]\n  - word/bytes [OK]\n\n- bios\n  - compiler -\u003e bios\n  - load bios\n  - display string/char\n  - read keyboard scancode (blocking)\n  - read keyboard scancode (non-blocking)\n  - read disk\n  - write disk\n  - get/size # of disks?\n  - get memory size?\n\n- cpu\n  - mmu (virtual memory) [OK]\n  - short opcodes [OK]\n  - shift [OK]\n  - map registers ram?\n  - interrupt\n  - I/O\n\n\n   The CPU has the following instruction formats:\n\n    8 7 6 5 4 3 2 1 0\n   +-+-+-+-+-+-+-+-+-+\n   | # |             |\n   |pop|   opcode    |\n   |   |             |\n   +-+-+-+-+-+-+-+-+-+\n\n   Push 32 bit value:\n\n    8 7 6 5 4 3 2 1 0\n                      3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1\n                      1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0\n   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+\n   |   |             |                                                               |\n   |0 0| PUSH opcode |                        32 bit word                            |\n   |   |             |                                                               |\n   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+\n\n\n------------------------------------------------------------------------------------------------\n- call/ret ==\u003e accesso variabili 'globali' ?\n- I/O = emit\n- relative jump\n\n------------------------\nBefore subcall execution\n\n- caller local var\n- caller stack\n- arguments\n- fn addr\n\n------------------------\nDuring subcall execution\n\n- caller local var\n- caller stack\n- arguments\n\n- address to return \u003c---- $data ($fp)\n- value of $data in the caller\n- local var\n- stack \u003c- $sp\n\n\tcase CALL:\n\t\tcpu.mmu.WriteW(cpu.rsp, Word(cpu.rsp))            // store rsp\n\t\tcpu.mmu.WriteW(cpu.rsp+1*WordSize, Word(cpu.rbp)) // store rbp\n\t\tcpu.mmu.WriteW(cpu.rsp+2*WordSize, Word(cpu.pc))  // store pc\n\t\tcpu.rbp = cpu.rsp + 3*WordSize\n\t\tbreak\n\tcase RET:\n\t\tcpu.pc = Addr(cpu.mmu.ReadW(cpu.rsp - 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