{"id":18812605,"url":"https://github.com/anuejn/xc9500","last_synced_at":"2025-04-13T21:25:35.725Z","repository":{"id":80584583,"uuid":"167740261","full_name":"anuejn/XC9500","owner":"anuejn","description":"WIP open source tooling for the XC9500 / XC9500XL series of CPLDs from Xilinx.","archived":false,"fork":false,"pushed_at":"2021-11-05T22:32:01.000Z","size":1682,"stargazers_count":10,"open_issues_count":1,"forks_count":3,"subscribers_count":3,"default_branch":"master","last_synced_at":"2025-03-27T11:43:36.413Z","etag":null,"topics":["cpld","digital-logic","reverse-engineering","yosys"],"latest_commit_sha":null,"homepage":null,"language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/anuejn.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2019-01-26T21:21:16.000Z","updated_at":"2022-04-13T18:06:51.000Z","dependencies_parsed_at":"2023-04-17T06:15:52.433Z","dependency_job_id":null,"html_url":"https://github.com/anuejn/XC9500","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/anuejn%2FXC9500","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/anuejn%2FXC9500/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/anuejn%2FXC9500/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/anuejn%2FXC9500/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/anuejn","download_url":"https://codeload.github.com/anuejn/XC9500/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":248784038,"owners_count":21161040,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["cpld","digital-logic","reverse-engineering","yosys"],"created_at":"2024-11-07T23:34:16.854Z","updated_at":"2025-04-13T21:25:35.718Z","avatar_url":"https://github.com/anuejn.png","language":"Python","funding_links":[],"categories":[],"sub_categories":[],"readme":"# XC9500 Reverse Engineering\n\nWIP open source tooling for the XC9500 / XC9500XL series of CPLDs from Xilinx.  \nPrimary focus of efford is on the XC9572XL for now.\n\n## Useful documentation\n\nTo get started the following documents are a good intro into the architecture:\n\n* [The Family Datasheet](https://www.xilinx.com/support/documentation/data_sheets/ds054.pdf)\n* [The xc3sprog code and documentation](https://sourceforge.net/projects/xc3sprog/) (or see submodule in `bitstream/xc3sprog`)\n\n## Bitstream Documentation\n\nSome initial thoughts have been made on which bits / fuses exist, but they still have to be located in the bitstream.\n\nFor example bitstreams, see the `misc/bitstreams/` folder.\n\n## Simulator\n\nNothing is done on this front yet.\n\nA complete model of the CPLD is to be written. It should be able to be \"programmed\" with real bitstreams in jedec format and should behave like a real cpld.\n\n## Yosys Backend\n\nNothing is done on this front yet.\n\nThe primary goal is to be able to go from yosys rtlil to a working bitstream in jedec file format.\nTiming optimization / analysis is only secondary for now.","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fanuejn%2Fxc9500","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fanuejn%2Fxc9500","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fanuejn%2Fxc9500/lists"}