{"id":35140996,"url":"https://github.com/arithy/simuhw","last_synced_at":"2026-01-17T18:15:41.395Z","repository":{"id":328429737,"uuid":"893354371","full_name":"arithy/simuhw","owner":"arithy","description":"A behavioral hardware simulator provided as a Python module","archived":false,"fork":false,"pushed_at":"2026-01-11T02:05:16.000Z","size":406,"stargazers_count":1,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"main","last_synced_at":"2026-01-11T10:11:14.983Z","etag":null,"topics":["hardware-design","hardware-simulation","hardware-simulator"],"latest_commit_sha":null,"homepage":"https://arithy.github.io/simuhw/","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/arithy.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":".github/FUNDING.yml","license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null,"notice":null,"maintainers":null,"copyright":null,"agents":null,"dco":null,"cla":null},"funding":{"github":["arithy"],"buy_me_a_coffee":"arithy"}},"created_at":"2024-11-24T08:02:23.000Z","updated_at":"2026-01-07T09:33:44.000Z","dependencies_parsed_at":null,"dependency_job_id":null,"html_url":"https://github.com/arithy/simuhw","commit_stats":null,"previous_names":["arithy/simuhw"],"tags_count":12,"template":false,"template_full_name":null,"purl":"pkg:github/arithy/simuhw","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/arithy%2Fsimuhw","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/arithy%2Fsimuhw/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/arithy%2Fsimuhw/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/arithy%2Fsimuhw/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/arithy","download_url":"https://codeload.github.com/arithy/simuhw/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/arithy%2Fsimuhw/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28515136,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-01-17T17:57:59.192Z","status":"ssl_error","status_checked_at":"2026-01-17T17:57:52.527Z","response_time":85,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.5:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["hardware-design","hardware-simulation","hardware-simulator"],"created_at":"2025-12-28T11:29:14.144Z","updated_at":"2026-01-17T18:15:41.364Z","avatar_url":"https://github.com/arithy.png","language":"Python","readme":"# SimuHW\n\n## Overview\n\n**SimuHW** is a behavioral hardware simulator provided as a Python module.\n\nPython 3.11 or later is required.\n\nThe GitHub page is [https://github.com/arithy/simuhw](https://github.com/arithy/simuhw).\n\n## Installation\n\n### Release Version\n\nYou can install the release version by the following command.\n\n```sh\n$ python -m pip install simuhw\n```\n\n### Development Version\n\nYou can install the development version by the following commands.\n\n```sh\n$ cd simuhw   # the repository root directory\n$ make req\n$ make clean\n$ make dist\n$ python -m pip install --no-index --find-links=./dist simuhw\n```\n\n## Usage\n\n### Concept\n\n- **Word**: a chunk of bits being transferred by wires.\n- **Device**: a hardware element such as a wire, switching devices, and memory devices.\n- **Channel**: a wire to transfer *words*.\n- **Memory**: a memory device to memorize *words* associated with specific addresses.\n- **Port**: an endpoint provided by a *device* to input or output *words*.\n- **Probe**: an entity to record *word* values with the respective times, whenever the value of the *word* passing through a specific *port* or stored at a specific address in a *memory* changes.\n\n### Import of Module\n\nTo use SimuHW, import `simuhw` module. An example is shown below.\n```py\nimport simuhw as hw\n```\n\n### Simulation of Hardware Devices\n\n1. Create instances of the derived classes of [`Device`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Device) class. As of version 0.3.0, the following device classes are available.\n    \n    - Utility\n      - [`Source`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Source)\n      - [`LogicLowSource`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.LogicLowSource)\n      - [`LogicHighSource`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.LogicHighSource)\n      - [`LogicUnknownSource`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.LogicUnknownSource)\n      - [`HighZSource`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.HighZSource)\n      - [`Drain`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Drain)\n      - [`Delay`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Delay)\n      - [`Group`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Group)\n    - Clock\n      - [`Clock`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Clock)\n    - Channel\n      - [`Channel`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Channel)\n    - Branch\n      - [`WordCombiner`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.WordCombiner)\n      - [`WordSplitter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.WordSplitter)\n      - [`Multiplexer`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Multiplexer)\n      - [`Demultiplexer`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Demultiplexer)\n      - [`WordRetainDemultiplexer`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.WordRetainDemultiplexer)\n      - [`Junction`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Junction)\n      - [`Distributor`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Distributor)\n    - Elementary Combinational Circuit\n      - [`Buffer`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Buffer)\n      - [`Inverter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Inverter)\n      - [`TriStateBuffer`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.TriStateBuffer)\n      - [`TriStateInverter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.TriStateInverter)\n      - [`ANDGate`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.ANDGate)\n      - [`ORGate`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.ORGate)\n      - [`XORGate`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.XORGate)\n      - [`NANDGate`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.NANDGate)\n      - [`NORGate`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.NORGate)\n      - [`XNORGate`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.XNORGate)\n    - Elementary Sequential Circuit\n      - [`DLatch`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.DLatch)\n      - [`DFlipFlop`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.DFlipFlop)\n    - Lookup Table\n      - [`LookupTable`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.LookupTable)\n    - Bit Operation\n      - [`LeftShifter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.LeftShifter)\n      - [`RightShifter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.RightShifter)\n      - [`ArithmeticRightShifter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.ArithmeticRightShifter)\n      - [`LeftRotator`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.LeftRotator)\n      - [`RightRotator`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.RightRotator)\n      - [`PopulationCounter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.PopulationCounter)\n      - [`LeadingZeroCounter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.LeadingZeroCounter)\n      - [`TrailingZeroCounter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.TrailingZeroCounter)\n      - [`BitReverser`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.BitReverser)\n      - [`SIMD_LeftShifter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_LeftShifter)\n      - [`SIMD_RightShifter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_RightShifter)\n      - [`SIMD_ArithmeticRightShifter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_ArithmeticRightShifter)\n      - [`SIMD_LeftRotator`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_LeftRotator)\n      - [`SIMD_RightRotator`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_RightRotator)\n      - [`SIMD_PopulationCounter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_PopulationCounter)\n      - [`SIMD_LeadingZeroCounter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_LeadingZeroCounter)\n      - [`SIMD_TrailingZeroCounter`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_TrailingZeroCounter)\n      - [`SIMD_BitReverser`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_BitReverser)\n    - Integer Arithmetic\n      - [`Adder`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Adder)\n      - [`HalfAdder`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.HalfAdder)\n      - [`FullAdder`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.FullAdder)\n      - [`Subtractor`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Subtractor)\n      - [`HalfSubtractor`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.HalfSubtractor)\n      - [`FullSubtractor`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.FullSubtractor)\n      - [`Multiplier`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Multiplier)\n      - [`SignedMultiplier`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SignedMultiplier)\n      - [`Divider`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Divider)\n      - [`SignedDivider`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SignedDivider)\n      - [`Remainder`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Remainder)\n      - [`SignedRemainder`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SignedRemainder)\n      - [`SIMD_Adder`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_Adder)\n      - [`SIMD_Subtractor`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_Subtractor)\n      - [`SIMD_Multiplier`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_Multiplier)\n      - [`SIMD_SignedMultiplier`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_SignedMultiplier)\n      - [`SIMD_Divider`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_Divider)\n      - [`SIMD_SignedDivider`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_SignedDivider)\n      - [`SIMD_Remainder`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_Remainder)\n      - [`SIMD_SignedRemainder`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.SIMD_SignedRemainder)\n    - Floating-Point Arithmetic\n      \u003e Available only if an appropriate version of [softfloatpy](https://pypi.org/project/softfloatpy/) module is found.\n      - [`fp.FPNegator`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPNegator)\n      - [`fp.FPAdder`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPAdder)\n      - [`fp.FPSubtractor`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPSubtractor)\n      - [`fp.FPMultiplier`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPMultiplier)\n      - [`fp.FPFusedMultiplyAdder`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPFusedMultiplyAdder)\n      - [`fp.FPDivider`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPDivider)\n      - [`fp.FPRemainder`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPRemainder)\n      - [`fp.FPSquareRoot`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPSquareRoot)\n      - [`fp.FPComparator`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPComparator)\n      - [`fp.FPClassifier`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPClassifier)\n      - [`fp.FPToIntegerRounder`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPToIntegerRounder)\n      - [`fp.FPToIntegerConverter`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPToIntegerConverter)\n      - [`fp.FPToSignedIntegerConverter`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPToSignedIntegerConverter)\n      - [`fp.FPFromIntegerRounder`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPFromIntegerRounder)\n      - [`fp.FPFromSignedIntegerConverter`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPFromSignedIntegerConverter)\n      - [`fp.FPConverter`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.FPConverter)\n      - [`fp.SIMD_FPNegator`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPNegator)\n      - [`fp.SIMD_FPAdder`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPAdder)\n      - [`fp.SIMD_FPSubtractor`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPSubtractor)\n      - [`fp.SIMD_FPMultiplier`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPMultiplier)\n      - [`fp.SIMD_FPFusedMultiplyAdder`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPFusedMultiplyAdder)\n      - [`fp.SIMD_FPDivider`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPDivider)\n      - [`fp.SIMD_FPRemainder`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPRemainder)\n      - [`fp.SIMD_FPSquareRoot`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPSquareRoot)\n      - [`fp.SIMD_FPComparator`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPComparator)\n      - [`fp.SIMD_FPClassifier`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPClassifier)\n      - [`fp.SIMD_FPToIntegerRounder`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPToIntegerRounder)\n      - [`fp.SIMD_FPToIntegerConverter`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPToIntegerConverter)\n      - [`fp.SIMD_FPToSignedIntegerConverter`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPToSignedIntegerConverter)\n      - [`fp.SIMD_FPFromIntegerConverter`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPFromIntegerConverter)\n      - [`fp.SIMD_FPFromSignedIntegerConverter`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPFromSignedIntegerConverter)\n      - [`fp.SIMD_FPConverter`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.html#simuhw.fp.SIMD_FPConverter)\n      - [`fp.riscv.FRec7`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.riscv.html#simuhw.fp.riscv.FRec7)\n      - [`fp.riscv.FRSqrt7`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.riscv.html#simuhw.fp.riscv.FRSqrt7)\n      - [`fp.riscv.SIMD_FRec7`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.riscv.html#simuhw.fp.riscv.SIMD_FRec7)\n      - [`fp.riscv.SIMD_FRSqrt7`](https://arithy.github.io/simuhw/apidoc/simuhw.fp.riscv.html#simuhw.fp.riscv.SIMD_FRSqrt7)\n    - Arithmetic Logic Unit\n      - [`alu.GenericArithmeticLogicUnit`](https://arithy.github.io/simuhw/apidoc/simuhw.alu.html#simuhw.alu.GenericArithmeticLogicUnit)\n      - [`alu.FullArithmeticLogicUnit`](https://arithy.github.io/simuhw/apidoc/simuhw.alu.html#simuhw.alu.FullArithmeticLogicUnit)\n      - [`alu.SIMD_FullArithmeticLogicUnit`](https://arithy.github.io/simuhw/apidoc/simuhw.alu.html#simuhw.alu.SIMD_FullArithmeticLogicUnit)\n    - Counter\n      - [`counter.SynchronousBinaryCounter74161`](https://arithy.github.io/simuhw/apidoc/simuhw.counter.html#simuhw.counter.SynchronousBinaryCounter74161)\n      - [`counter.SynchronousBinaryCounter74163`](https://arithy.github.io/simuhw/apidoc/simuhw.counter.html#simuhw.counter.SynchronousBinaryCounter74163)\n    - Memory\n      - [`memory.LevelTriggeredMemory`](https://arithy.github.io/simuhw/apidoc/simuhw.memory.html#simuhw.memory.LevelTriggeredMemory)\n      - [`memory.EdgeTriggeredMemory`](https://arithy.github.io/simuhw/apidoc/simuhw.memory.html#simuhw.memory.EdgeTriggeredMemory)\n    \n    An example is shown below.\n    \n     ```py\n     width: int = 16  # Word size in bits\n     source: hw.Source = hw.Source(width, [\n         (b'\\x00\\x01', 0.0e-9),\n         (b'\\xc1\\x85', 3.0e-9),\n         (b'\\xd3\\xbb', 6.0e-9),\n         (b'\\xf2\\x3a', 10.0e-9)\n     ])\n     drain: hw.Drain = hw.Drain(width)\n     ```\n    \n1. Connect the output ports to the input ports of the device class instances.\n   An example is shown below.\n   \n    ```py\n    source.port_o.connect(drain.port_i)\n    ```\n   \n1. Create instances of [`ChannelProbe`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.ChannelProbe) class or [`MemoryProbe`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.MemoryProbe) class. `ChannelProbe` class instances can be added to input ports or output ports, and `MemoryProbe` class instances can be added to instances of the derived classes of `Memory` class.\n   An example is shown below.\n   \n    ```py\n    probe: hw.ChannelProbe = hw.ChannelProbe('out', width)\n    ```\n   \n1. Add the probes to the ports or the memory.\n   An example is shown below.\n   \n    ```py\n    drain.port_i.add_probe(probe)\n    ```\n   \n1. Create an instances of [`LogicAnalyzer`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.LogicAnalyzer) class.\n   An example is shown below.\n   \n    ```py\n    la: hw.LogicAnalyzer = hw.LogicAnalyzer()\n    ```\n   \n1. Add the probes to the logic analyzer.\n   An example is shown below.\n   \n    ```py\n    la.add_probe(probe)\n    ```\n   \n1. Create an instance of [`Simulator`](https://arithy.github.io/simuhw/apidoc/simuhw.html#simuhw.Simulator) class.\n   An example is shown below.\n   \n    ```py\n    sim: hw.Simulator = hw.Simulator([source, drain])\n    ```\n   \n1. Start the simulation.\n   An example is shown below.\n    ```py\n    sim.start()\n    ```\n\n1. Save the word value change timings recorded in the probes to a [VCD](https://en.wikipedia.org/wiki/Value_change_dump) file.\n   An example is shown below.\n   \n    ```py\n    with open('test.vcd', mode='w') as file:\n        la.save_as_vcd(file)\n    ```\n   \n1. View the VCD file using a waveform viewer such as [GTKWave](https://gtkwave.sourceforge.net/).\n\nThe whole source code of the example above is shown below.\n\n```py\nimport simuhw as hw\n\nwidth: int = 16  # Word size in bits\nsource: hw.Source = hw.Source(width, [\n    (b'\\x00\\x01', 0.0e-9),\n    (b'\\xc1\\x85', 3.0e-9),\n    (b'\\xd3\\xbb', 6.0e-9),\n    (b'\\xf2\\x3a', 10.0e-9)\n])\ndrain: hw.Drain = hw.Drain(width)\nsource.port_o.connect(drain.port_i)\nprobe: hw.ChannelProbe = hw.ChannelProbe('out', width)\ndrain.port_i.add_probe(probe)\nla: hw.LogicAnalyzer = hw.LogicAnalyzer()\nla.add_probe(probe)\nsim: hw.Simulator = hw.Simulator([source, drain])\nsim.start()\nwith open('test.vcd', mode='w') as file:\n    la.save_as_vcd(file)\n```\n\nThis example simulates a Source device and a Drain device which are connected directly, and saves word value change timings at the input port of the Drain device to the file `test.vcd`.\n","funding_links":["https://github.com/sponsors/arithy","https://buymeacoffee.com/arithy"],"categories":[],"sub_categories":[],"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Farithy%2Fsimuhw","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Farithy%2Fsimuhw","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Farithy%2Fsimuhw/lists"}