{"id":13995899,"url":"https://github.com/azonenberg/starshipraider","last_synced_at":"2025-07-22T22:33:10.028Z","repository":{"id":39422205,"uuid":"74342467","full_name":"azonenberg/starshipraider","owner":"azonenberg","description":"Open hardware test equipment","archived":false,"fork":false,"pushed_at":"2024-10-16T03:00:07.000Z","size":74914,"stargazers_count":145,"open_issues_count":4,"forks_count":22,"subscribers_count":25,"default_branch":"master","last_synced_at":"2024-11-29T18:42:10.107Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":"","language":"SystemVerilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"bsd-3-clause","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/azonenberg.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2016-11-21T08:31:08.000Z","updated_at":"2024-11-22T21:54:27.000Z","dependencies_parsed_at":"2023-02-09T16:16:26.227Z","dependency_job_id":"2055e972-0c7b-45ba-a486-0a313c58d593","html_url":"https://github.com/azonenberg/starshipraider","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/azonenberg/starshipraider","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/azonenberg%2Fstarshipraider","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/azonenberg%2Fstarshipraider/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/azonenberg%2Fstarshipraider/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/azonenberg%2Fstarshipraider/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/azonenberg","download_url":"https://codeload.github.com/azonenberg/starshipraider/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/azonenberg%2Fstarshipraider/sbom","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":266585995,"owners_count":23952169,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","status":"online","status_checked_at":"2025-07-22T02:00:09.085Z","response_time":66,"last_error":null,"robots_txt_status":null,"robots_txt_updated_at":null,"robots_txt_url":"https://github.com/robots.txt","online":true,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-08-09T14:03:38.919Z","updated_at":"2025-07-22T22:33:05.648Z","avatar_url":"https://github.com/azonenberg.png","language":"SystemVerilog","readme":"# Intro\n\nThis is the umbrella repo for a lot of my T\u0026M projects. Some will end up in separate repos.\n\n# Project Codenames\n\nBoards, subsystems, etc are all named after famous electrical engineers who made major contributions to the field of test equipment design.\n\n# Platform Architecture\n\nAll instruments are planned to share the same basic platform. Generally speaking, this platform will be:\n\n## Mechanical form factor\n\n* 1U rackmount, depth dependent on the specific instrument.\n\n## Power\n* 48V DC power on 6-pin Molex Mini-Fit Jr connector (back left)\n* Intermediate bus converter based on the [trigger crossbar](https://github.com/azonenberg/triggercrossbar/tree/main/pcb/ibc) IBC design to produce 12V output.\n* Possible changes from current design (as of 2024-03-31): switch to bigger MCU with flash space for A/B firmware images, consider swapping main DC-DC module to something with lower standby power (current IBC wastes ~3W no-load which isn't great)\n* STM32L0 based power/reset sequencing supervisor with soft power on/off\n\n## Software/firmware stack\n\n* ngscopeclient as primary UI\n* staticnet as TCP/IP stack\n* Bare metal, no OS, no dynamic memory allocation\n* SFTP based firmware update, eventually with signed updates (user can add new signing keys via uart console)\n\n## Main chipset\n* STM32H7 as main processor running SCPI stack, sshd, and control plane functionality (low speed ADCs/DACs, GPIOs, etc)\n* Xilinx UltraScale+ / UltraScale / 7 series FPGA as main datapath. Some instruments may have \u003e1 FPGA.\n\n## Communications\n\n* KSZ9031 based 10/100/1000 baseT fallback Ethernet interface\n* 10Gbase-R SFP+ / 25Gbase-R SFP28 interface for primary remote control path\n* Twinlan transport, SCPI control plane socket plus bare TCP socket for binary waveform data\n* 2.13\" monochrome e-ink display with IP/version/status information\n* RS232 console on rear panel RJ45 (Cisco pinout)\n\n## RF / signal interface\n\n* Front panel SMA/BNC probe ports. Number of channels dependent on PCB size.\n* Rear panel SMA for 10 MHz reference in, level TBD\n* May have reference out TBD\n* May have PPS in/out TBD\n* Rear panel trigger in/out if applicable\n\n# Roadmap (including external repos)\n\n1. [Trigger Crossbar](https://github.com/azonenberg/triggercrossbar)  \nCurrently in progress. Not planning to make in volume, focus is on prototyping as much of the platform as possible to speed development and de-risk future projects. Prototype assembled, firmware dev in progress.\n\n1. [kup-lulz](https://github.com/azonenberg/misc-devboards/tree/master/kup-lulz): One-off Kintex UltraScale+ test board on OSHPark 4 layers, using a sketchy reballed aliexpress FPGA. Intended as a low-risk validation for UltraScale+ based power, pcb footprint/schematic, and some RTL development. Schematic complete, fine tuning layout.\n\n1. [GROVER](https://github.com/azonenberg/grover): Kintex UltraScale+ based 10/25G BERT. On hold until kup-lulz is brought up and working as it will essentially be a scaled-up version of the same design\n\n1. VOLLUM (Howard Vollum, co-inventor of triggered-sweep oscilloscope)\n    - No design progress yet, but can probably leverage some old frontend work. One 6 Gbps AD9213 is in inventory for a scaled down (7 series based) single channel prototype.\n    - 2 GHz / 10 Gsps 12 bit oscilloscope, as many channels as I can fit in 1U\n    - Per channel: 1x AD9213, frontend, XCAU25P-2FFVB676, 72-bit DDR4 LRDIMM\n    - Top level: One more FPGA, details TBD, doing trigger sync and MSO channels\n    - Will need to use parallel / bonded serial LVDS for waveform download since all 12 GTYs on the KU25Ps will be used for the JESD204\n\n\n\n\n\n\n\n\n\n\n\n-----\n\n# Stuff below here is way old and needs to be redone\n\n-----\n\n## General\n\n* STARSHIPRAIDER: umbrella term for the entire project\n* CLARKE (Edith Clarke, first female EE professor in USA): the original STARSHIPRAIDER project\n\n## Oscilloscopes\n\nAll are 8 channels??\n\n* BLONDEL (Andre-Eugene Blondel, inventor of electromechanical oscillograph) \\\n  8 bit: 100 MHz / 250 - 500 - 1000 Msps \\\n  12 bit: 50 MHz / 125 - 250 - 500 Msps \\\n  4 AFE : 1 HMCAD1520 \\\n  Two acquisition cards, 4 channels each \\\n  One XC7A100T-2FGG676 on main board \\\n  One DDR3 800 SODIMM on main board\n\n* DUDDELL (William Duddell, inventor of moving-coil mirror oscillograph) \\\n  250 MHz / 1 Gsps, 1 AFE : 1 HMCAD1520\n  1x XC7K160T-2FFG676\n\n  Eight analog cards, one HMCAD1520 + one AFE each\n  One digital card with 1-2 SFF-8087 connectors for LA\n  One AWG card with a TBD JESD204 DAC using unused serdes lanes (assuming 4 for 40G, one for 10G, three available)\n\n* ZENNECK (Jonathan Zenneck, inventor of electrically scanned CRT oscilloscope) \\\n  500 MHz or 1 GHz / 5 Gsps, 1 AFE : 1 AD9213-6G\n\n  Per channel:\n  * 1x XC7A200T-2FFG1156\n  * 1x AD9213 in 6G speed grade\n  * 2x DDR3 800 SODIMM\n\n  Global:\n  * 1x XC7K160T-2FFG160T (could do six channels with direct lane to each one)\n\n* VOLLUM (Howard Vollum, co-inventor of triggered-sweep oscilloscope) \\\n  1-2 GHz / 10 Gsps, 1 AFE : 1 AD9213\n\n* MURDOCK (Melvin Jack Murdock, co-inventor of triggered-sweep oscilloscope) \\\n  6 GHz / 40 Gsps, 1 AFE : 4 AD9213\n\n## Probes / peripherals\n\n* CONWAY (VLSI pioneer, co-author of Mead \u0026 Conway) \\\n  8-bit comparator-to-LVDS logic analyzer pod with SFF-8087 interface and high-impedance inputs\n\n* MEAD (other half of Mead \u0026 Conway) \\\n  8-bit comparator-to-LVDS logic analyzer pod with SFF-8087 interface and 50 ohm inputs\n\n* MAXWELL (James Clerk Maxwell, discovered Maxwell's Equations) \\\n  Kintex-7 ISERDESE2 based LA\n\n* TODO: Artix-7 GTP based LA??\n\n* DENNARD (Robert Dennard, inventor of DRAM) \\\n  Kintex-7 GTX based LA\n\n* BRAUN (Karl Ferdinand Braun, inventor of optically scanned CRT oscilloscope and phased array)\n  Low-bandwidth active probe\n\tADA4817-1ACPZ-R7\n\n## Signal Generators\n\n* FLEMING (John Ambrose Fleming, inventor of vacuum tube)\n  4 channel 14 bit 2.5 Gsps arbitrary waveform generator, AD9739 + Kintex-7 + DDR3 SODIMM based.\n  Need ~160 Gbps of RAM bandwidth to keep them fed\n\n  Two channels of 14-bit LVDS per DAC = 28 LVDS pairs for data, assume clock/sync are external to FPGA\n  Slow control: 4 wire SPI, IRQ = 5 slow lines\n\n  4x DAC = 84 pairs (168 pins used / 4 banks / 200 allocated) + 15 slow lines\n\n  Two xc7k160t's, two dacs + 1 sodimm of ram on each\n\n  4GB DDR3 SODIMM, 1 GB per channel = 512 Mpoints of waveform data\n  Probably some digital outputs (mix of LVDS and LVCMOS, and maybe some slow pin headers?)\n","funding_links":[],"categories":["SystemVerilog","Reverse Engineering"],"sub_categories":["Malware Articles and Sources"],"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fazonenberg%2Fstarshipraider","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fazonenberg%2Fstarshipraider","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fazonenberg%2Fstarshipraider/lists"}