{"id":21306322,"url":"https://github.com/brlin-tw/clean-filter-for-verilog","last_synced_at":"2026-05-06T00:36:58.314Z","repository":{"id":143329463,"uuid":"91421641","full_name":"brlin-tw/Clean-Filter-for-Verilog","owner":"brlin-tw","description":"Clean your Verilog design code!","archived":false,"fork":false,"pushed_at":"2018-05-01T16:42:47.000Z","size":32,"stargazers_count":1,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"master","last_synced_at":"2025-01-22T08:46:10.073Z","etag":null,"topics":["bash","clean-filter","filter","git","git-attributes","istyle","vdent","verilog"],"latest_commit_sha":null,"homepage":null,"language":"Shell","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/brlin-tw.png","metadata":{"files":{"readme":"README.markdown","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2017-05-16T06:08:46.000Z","updated_at":"2019-03-11T20:36:30.000Z","dependencies_parsed_at":"2023-05-15T16:30:14.715Z","dependency_job_id":null,"html_url":"https://github.com/brlin-tw/Clean-Filter-for-Verilog","commit_stats":null,"previous_names":[],"tags_count":3,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/brlin-tw%2FClean-Filter-for-Verilog","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/brlin-tw%2FClean-Filter-for-Verilog/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/brlin-tw%2FClean-Filter-for-Verilog/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/brlin-tw%2FClean-Filter-for-Verilog/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/brlin-tw","download_url":"https://codeload.github.com/brlin-tw/Clean-Filter-for-Verilog/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":243784100,"owners_count":20347409,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["bash","clean-filter","filter","git","git-attributes","istyle","vdent","verilog"],"created_at":"2024-11-21T16:23:11.717Z","updated_at":"2025-10-19T11:33:47.234Z","avatar_url":"https://github.com/brlin-tw.png","language":"Shell","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Clean Filter for Verilog\n[![Build Status of the latest revision of project on Travis CI](https://travis-ci.org/Lin-Buo-Ren/Clean-Filter-for-Verilog.svg?branch=master)](https://travis-ci.org/Lin-Buo-Ren/Clean-Filter-for-Verilog)  \nClean your Verilog design code!  \n\u003chttps://github.com/Lin-Buo-Ren/Clean-Filter-for-Verilog\u003e\n\n## How to Use\n\nClone this repository as your project's submodule, and register `filter.bash` as verilog source files' clean filter.  Refer the `filter` attribute in the  `gitattributes(5)` manual page for more information.\n\nSeveral runtime configurable options are available, refer the output of `filter.bash --help` for more info.\n\n## Supported Cleaners\n\nThe executable path of the following cleaners must be in the executable search `PATH`s.\n\n### vdent\n\n[bmartini/vdent: Verilog Indenter. Simple indent program for Verilog source code. Trims end of line white space and indents lines based on nested depth of code blocks.](https://github.com/bmartini/vdent)\n\nThis is the default cleaner.\n\n### iStyle\n\n[thomasrussellmurphy/istyle-verilog-formatter: Open source implementation of a Verilog formatter](https://github.com/thomasrussellmurphy/istyle-verilog-formatter)\n\nUse `--cleaner istyle` to enable this cleaner.\n\n## License\n\nGNU GPLv3+ \n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fbrlin-tw%2Fclean-filter-for-verilog","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fbrlin-tw%2Fclean-filter-for-verilog","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fbrlin-tw%2Fclean-filter-for-verilog/lists"}