{"id":16528605,"url":"https://github.com/bufferoverflow/u-boot","last_synced_at":"2025-03-03T06:25:06.847Z","repository":{"id":8629492,"uuid":"10274936","full_name":"bufferoverflow/u-boot","owner":"bufferoverflow","description":"u-boot","archived":false,"fork":false,"pushed_at":"2016-02-01T19:51:36.000Z","size":84760,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":2,"default_branch":"master","last_synced_at":"2025-01-13T17:45:17.455Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"C","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/bufferoverflow.png","metadata":{"files":{"readme":"README","changelog":null,"contributing":null,"funding":null,"license":"Licenses/Exceptions","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2013-05-24T20:56:17.000Z","updated_at":"2014-08-07T10:29:44.000Z","dependencies_parsed_at":"2022-08-27T22:30:34.694Z","dependency_job_id":null,"html_url":"https://github.com/bufferoverflow/u-boot","commit_stats":null,"previous_names":[],"tags_count":222,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/bufferoverflow%2Fu-boot","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/bufferoverflow%2Fu-boot/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/bufferoverflow%2Fu-boot/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/bufferoverflow%2Fu-boot/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/bufferoverflow","download_url":"https://codeload.github.com/bufferoverflow/u-boot/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":241618220,"owners_count":19991818,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-10-11T17:41:00.676Z","updated_at":"2025-03-03T06:25:06.819Z","avatar_url":"https://github.com/bufferoverflow.png","language":"C","funding_links":[],"categories":[],"sub_categories":[],"readme":"#\n# (C) Copyright 2000 - 2013\n# Wolfgang Denk, DENX Software Engineering, wd@denx.de.\n#\n# SPDX-License-Identifier:\tGPL-2.0+\n#\n\nSummary:\n========\n\nThis directory contains the source code for U-Boot, a boot loader for\nEmbedded boards based on PowerPC, ARM, MIPS and several other\nprocessors, which can be installed in a boot ROM and used to\ninitialize and test the hardware or to download and run application\ncode.\n\nThe development of U-Boot is closely related to Linux: some parts of\nthe source code originate in the Linux source tree, we have some\nheader files in common, and special provision has been made to\nsupport booting of Linux images.\n\nSome attention has been paid to make this software easily\nconfigurable and extendable. For instance, all monitor commands are\nimplemented with the same call interface, so that it's very easy to\nadd new commands. Also, instead of permanently adding rarely used\ncode (for instance hardware test utilities) to the monitor, you can\nload and run it dynamically.\n\n\nStatus:\n=======\n\nIn general, all boards for which a configuration option exists in the\nMakefile have been tested to some extent and can be considered\n\"working\". In fact, many of them are used in production systems.\n\nIn case of problems see the CHANGELOG and CREDITS files to find out\nwho contributed the specific port. The boards.cfg file lists board\nmaintainers.\n\nNote: There is no CHANGELOG file in the actual U-Boot source tree;\nit can be created dynamically from the Git log using:\n\n\tmake CHANGELOG\n\n\nWhere to get help:\n==================\n\nIn case you have questions about, problems with or contributions for\nU-Boot you should send a message to the U-Boot mailing list at\n\u003cu-boot@lists.denx.de\u003e. There is also an archive of previous traffic\non the mailing list - please search the archive before asking FAQ's.\nPlease see http://lists.denx.de/pipermail/u-boot and\nhttp://dir.gmane.org/gmane.comp.boot-loaders.u-boot\n\n\nWhere to get source code:\n=========================\n\nThe U-Boot source code is maintained in the git repository at\ngit://www.denx.de/git/u-boot.git ; you can browse it online at\nhttp://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary\n\nThe \"snapshot\" links on this page allow you to download tarballs of\nany version you might be interested in. Official releases are also\navailable for FTP download from the ftp://ftp.denx.de/pub/u-boot/\ndirectory.\n\nPre-built (and tested) images are available from\nftp://ftp.denx.de/pub/u-boot/images/\n\n\nWhere we come from:\n===================\n\n- start from 8xxrom sources\n- create PPCBoot project (http://sourceforge.net/projects/ppcboot)\n- clean up code\n- make it easier to add custom boards\n- make it possible to add other [PowerPC] CPUs\n- extend functions, especially:\n * Provide extended interface to Linux boot loader\n * S-Record download\n * network boot\n * PCMCIA / CompactFlash / ATA disk / SCSI ... boot\n- create ARMBoot project (http://sourceforge.net/projects/armboot)\n- add other CPU families (starting with ARM)\n- create U-Boot project (http://sourceforge.net/projects/u-boot)\n- current project page: see http://www.denx.de/wiki/U-Boot\n\n\nNames and Spelling:\n===================\n\nThe \"official\" name of this project is \"Das U-Boot\". The spelling\n\"U-Boot\" shall be used in all written text (documentation, comments\nin source files etc.). Example:\n\n\tThis is the README file for the U-Boot project.\n\nFile names etc. shall be based on the string \"u-boot\". Examples:\n\n\tinclude/asm-ppc/u-boot.h\n\n\t#include \u003casm/u-boot.h\u003e\n\nVariable names, preprocessor constants etc. shall be either based on\nthe string \"u_boot\" or on \"U_BOOT\". Example:\n\n\tU_BOOT_VERSION\t\tu_boot_logo\n\tIH_OS_U_BOOT\t\tu_boot_hush_start\n\n\nVersioning:\n===========\n\nStarting with the release in October 2008, the names of the releases\nwere changed from numerical release numbers without deeper meaning\ninto a time stamp based numbering. Regular releases are identified by\nnames consisting of the calendar year and month of the release date.\nAdditional fields (if present) indicate release candidates or bug fix\nreleases in \"stable\" maintenance trees.\n\nExamples:\n\tU-Boot v2009.11\t - Release November 2009\n\tU-Boot v2009.11.1 - Release 1 in version November 2009 stable tree\n\tU-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release\n\n\nDirectory Hierarchy:\n====================\n\n/arch\t\t\tArchitecture specific files\n /arc\t\t\tFiles generic to ARC architecture\n /cpu\t\tCPU specific files\n /arc700\t\tFiles specific to ARC 700 CPUs\n /lib\t\tArchitecture specific library files\n /arm\t\t\tFiles generic to ARM architecture\n /cpu\t\tCPU specific files\n /arm720t\t\tFiles specific to ARM 720 CPUs\n /arm920t\t\tFiles specific to ARM 920 CPUs\n\t/at91\t\tFiles specific to Atmel AT91RM9200 CPU\n\t/imx\t\tFiles specific to Freescale MC9328 i.MX CPUs\n\t/s3c24x0\tFiles specific to Samsung S3C24X0 CPUs\n /arm926ejs\tFiles specific to ARM 926 CPUs\n /arm1136\t\tFiles specific to ARM 1136 CPUs\n /pxa\t\tFiles specific to Intel XScale PXA CPUs\n /sa1100\t\tFiles specific to Intel StrongARM SA1100 CPUs\n /lib\t\tArchitecture specific library files\n /avr32\t\tFiles generic to AVR32 architecture\n /cpu\t\tCPU specific files\n /lib\t\tArchitecture specific library files\n /blackfin\t\tFiles generic to Analog Devices Blackfin architecture\n /cpu\t\tCPU specific files\n /lib\t\tArchitecture specific library files\n /m68k\t\t\tFiles generic to m68k architecture\n /cpu\t\tCPU specific files\n /mcf52x2\t\tFiles specific to Freescale ColdFire MCF52x2 CPUs\n /mcf5227x\t\tFiles specific to Freescale ColdFire MCF5227x CPUs\n /mcf532x\t\tFiles specific to Freescale ColdFire MCF5329 CPUs\n /mcf5445x\t\tFiles specific to Freescale ColdFire MCF5445x CPUs\n /mcf547x_8x\tFiles specific to Freescale ColdFire MCF547x_8x CPUs\n /lib\t\tArchitecture specific library files\n /microblaze\t\tFiles generic to microblaze architecture\n /cpu\t\tCPU specific files\n /lib\t\tArchitecture specific library files\n /mips\t\t\tFiles generic to MIPS architecture\n /cpu\t\tCPU specific files\n /mips32\t\tFiles specific to MIPS32 CPUs\n /mips64\t\tFiles specific to MIPS64 CPUs\n /lib\t\tArchitecture specific library files\n /nds32\t\tFiles generic to NDS32 architecture\n /cpu\t\tCPU specific files\n /n1213\t\tFiles specific to Andes Technology N1213 CPUs\n /lib\t\tArchitecture specific library files\n /nios2\t\tFiles generic to Altera NIOS2 architecture\n /cpu\t\tCPU specific files\n /lib\t\tArchitecture specific library files\n /openrisc\t\tFiles generic to OpenRISC architecture\n /cpu\t\tCPU specific files\n /lib\t\tArchitecture specific library files\n /powerpc\t\tFiles generic to PowerPC architecture\n /cpu\t\tCPU specific files\n /74xx_7xx\t\tFiles specific to Freescale MPC74xx and 7xx CPUs\n /mpc5xx\t\tFiles specific to Freescale MPC5xx CPUs\n /mpc5xxx\t\tFiles specific to Freescale MPC5xxx CPUs\n /mpc8xx\t\tFiles specific to Freescale MPC8xx CPUs\n /mpc824x\t\tFiles specific to Freescale MPC824x CPUs\n /mpc8260\t\tFiles specific to Freescale MPC8260 CPUs\n /mpc85xx\t\tFiles specific to Freescale MPC85xx CPUs\n /ppc4xx\t\tFiles specific to AMCC PowerPC 4xx CPUs\n /lib\t\tArchitecture specific library files\n /sh\t\t\tFiles generic to SH architecture\n /cpu\t\tCPU specific files\n /sh2\t\tFiles specific to sh2 CPUs\n /sh3\t\tFiles specific to sh3 CPUs\n /sh4\t\tFiles specific to sh4 CPUs\n /lib\t\tArchitecture specific library files\n /sparc\t\tFiles generic to SPARC architecture\n /cpu\t\tCPU specific files\n /leon2\t\tFiles specific to Gaisler LEON2 SPARC CPU\n /leon3\t\tFiles specific to Gaisler LEON3 SPARC CPU\n /lib\t\tArchitecture specific library files\n /x86\t\t\tFiles generic to x86 architecture\n /cpu\t\tCPU specific files\n /lib\t\tArchitecture specific library files\n/api\t\t\tMachine/arch independent API for external apps\n/board\t\t\tBoard dependent files\n/common\t\t\tMisc architecture independent functions\n/disk\t\t\tCode for disk drive partition handling\n/doc\t\t\tDocumentation (don't expect too much)\n/drivers\t\tCommonly used device drivers\n/dts\t\t\tContains Makefile for building internal U-Boot fdt.\n/examples\t\tExample code for standalone applications, etc.\n/fs\t\t\tFilesystem code (cramfs, ext2, jffs2, etc.)\n/include\t\tHeader Files\n/lib\t\t\tFiles generic to all architectures\n /libfdt\t\tLibrary files to support flattened device trees\n /lzma\t\t\tLibrary files to support LZMA decompression\n /lzo\t\t\tLibrary files to support LZO decompression\n/net\t\t\tNetworking code\n/post\t\t\tPower On Self Test\n/spl\t\t\tSecondary Program Loader framework\n/tools\t\t\tTools to build S-Record or U-Boot images, etc.\n\nSoftware Configuration:\n=======================\n\nConfiguration is usually done using C preprocessor defines; the\nrationale behind that is to avoid dead code whenever possible.\n\nThere are two classes of configuration variables:\n\n* Configuration _OPTIONS_:\n These are selectable by the user and have names beginning with\n \"CONFIG_\".\n\n* Configuration _SETTINGS_:\n These depend on the hardware etc. and should not be meddled with if\n you don't know what you're doing; they have names beginning with\n \"CONFIG_SYS_\".\n\nLater we will add a configuration tool - probably similar to or even\nidentical to what's used for the Linux kernel. Right now, we have to\ndo the configuration by hand, which means creating some symbolic\nlinks and editing some configuration files. We use the TQM8xxL boards\nas an example here.\n\n\nSelection of Processor Architecture and Board Type:\n---------------------------------------------------\n\nFor all supported boards there are ready-to-use default\nconfigurations available; just type \"make \u003cboard_name\u003e_defconfig\".\n\nExample: For a TQM823L module type:\n\n\tcd u-boot\n\tmake TQM823L_defconfig\n\nFor the Cogent platform, you need to specify the CPU type as well;\ne.g. \"make cogent_mpc8xx_defconfig\". And also configure the cogent\ndirectory according to the instructions in cogent/README.\n\n\nSandbox Environment:\n--------------------\n\nU-Boot can be built natively to run on a Linux host using the 'sandbox'\nboard. This allows feature development which is not board- or architecture-\nspecific to be undertaken on a native platform. The sandbox is also used to\nrun some of U-Boot's tests.\n\nSee board/sandbox/sandbox/README.sandbox for more details.\n\n\nConfiguration Options:\n----------------------\n\nConfiguration depends on the combination of board and CPU type; all\nsuch information is kept in a configuration file\n\"include/configs/\u003cboard_name\u003e.h\".\n\nExample: For a TQM823L module, all configuration settings are in\n\"include/configs/TQM823L.h\".\n\n\nMany of the options are named exactly as the corresponding Linux\nkernel configuration options. The intention is to make it easier to\nbuild a config tool - later.\n\n\nThe following options need to be configured:\n\n- CPU Type:\tDefine exactly one, e.g. CONFIG_MPC85XX.\n\n- Board Type:\tDefine exactly one, e.g. CONFIG_MPC8540ADS.\n\n- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)\n\t\tDefine exactly one, e.g. CONFIG_ATSTK1002\n\n- CPU Module Type: (if CONFIG_COGENT is defined)\n\t\tDefine exactly one of\n\t\tCONFIG_CMA286_60_OLD\n--- FIXME --- not tested yet:\n\t\tCONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,\n\t\tCONFIG_CMA287_23, CONFIG_CMA287_50\n\n- Motherboard Type: (if CONFIG_COGENT is defined)\n\t\tDefine exactly one of\n\t\tCONFIG_CMA101, CONFIG_CMA102\n\n- Motherboard I/O Modules: (if CONFIG_COGENT is defined)\n\t\tDefine one or more of\n\t\tCONFIG_CMA302\n\n- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)\n\t\tDefine one or more of\n\t\tCONFIG_LCD_HEARTBEAT\t- update a character position on\n\t\t\t\t\t the LCD display every second with\n\t\t\t\t\t a \"rotator\" |\\-/|\\-/\n\n- Marvell Family Member\n\t\tCONFIG_SYS_MVFS\t\t- define it if you want to enable\n\t\t\t\t\t multiple fs option at one time\n\t\t\t\t\t for marvell soc family\n\n- MPC824X Family Member (if CONFIG_MPC824X is defined)\n\t\tDefine exactly one of\n\t\tCONFIG_MPC8240, CONFIG_MPC8245\n\n- 8xx CPU Options: (if using an MPC8xx CPU)\n\t\tCONFIG_8xx_GCLK_FREQ\t- deprecated: CPU clock if\n\t\t\t\t\t get_gclk_freq() cannot work\n\t\t\t\t\t e.g. if there is no 32KHz\n\t\t\t\t\t reference PIT/RTC clock\n\t\tCONFIG_8xx_OSCLK\t- PLL input clock (either EXTCLK\n\t\t\t\t\t or XTAL/EXTAL)\n\n- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):\n\t\tCONFIG_SYS_8xx_CPUCLK_MIN\n\t\tCONFIG_SYS_8xx_CPUCLK_MAX\n\t\tCONFIG_8xx_CPUCLK_DEFAULT\n\t\t\tSee doc/README.MPC866\n\n\t\tCONFIG_SYS_MEASURE_CPUCLK\n\n\t\tDefine this to measure the actual CPU clock instead\n\t\tof relying on the correctness of the configured\n\t\tvalues. Mostly useful for board bringup to make sure\n\t\tthe PLL is locked at the intended frequency. Note\n\t\tthat this requires a (stable) reference clock (32 kHz\n\t\tRTC clock or CONFIG_SYS_8XX_XIN)\n\n\t\tCONFIG_SYS_DELAYED_ICACHE\n\n\t\tDefine this option if you want to enable the\n\t\tICache only when Code runs from RAM.\n\n- 85xx CPU Options:\n\t\tCONFIG_SYS_PPC64\n\n\t\tSpecifies that the core is a 64-bit PowerPC implementation (implements\n\t\tthe \"64\" category of the Power ISA). This is necessary for ePAPR\n\t\tcompliance, among other possible reasons.\n\n\t\tCONFIG_SYS_FSL_TBCLK_DIV\n\n\t\tDefines the core time base clock divider ratio compared to the\n\t\tsystem clock. On most PQ3 devices this is 8, on newer QorIQ\n\t\tdevices it can be 16 or 32. The ratio varies from SoC to Soc.\n\n\t\tCONFIG_SYS_FSL_PCIE_COMPAT\n\n\t\tDefines the string to utilize when trying to match PCIe device\n\t\ttree nodes for the given platform.\n\n\t\tCONFIG_SYS_PPC_E500_DEBUG_TLB\n\n\t\tEnables a temporary TLB entry to be used during boot to work\n\t\taround limitations in e500v1 and e500v2 external debugger\n\t\tsupport. This reduces the portions of the boot code where\n\t\tbreakpoints and single stepping do not work. The value of this\n\t\tsymbol should be set to the TLB1 entry to be used for this\n\t\tpurpose.\n\n\t\tCONFIG_SYS_FSL_ERRATUM_A004510\n\n\t\tEnables a workaround for erratum A004510. If set,\n\t\tthen CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and\n\t\tCONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.\n\n\t\tCONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV\n\t\tCONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)\n\n\t\tDefines one or two SoC revisions (low 8 bits of SVR)\n\t\tfor which the A004510 workaround should be applied.\n\n\t\tThe rest of SVR is either not relevant to the decision\n\t\tof whether the erratum is present (e.g. p2040 versus\n\t\tp2041) or is implied by the build target, which controls\n\t\twhether CONFIG_SYS_FSL_ERRATUM_A004510 is set.\n\n\t\tSee Freescale App Note 4493 for more information about\n\t\tthis erratum.\n\n\t\tCONFIG_A003399_NOR_WORKAROUND\n\t\tEnables a workaround for IFC erratum A003399. It is only\n\t\trequred during NOR boot.\n\n\t\tCONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY\n\n\t\tThis is the value to write into CCSR offset 0x18600\n\t\taccording to the A004510 workaround.\n\n\t\tCONFIG_SYS_FSL_DSP_DDR_ADDR\n\t\tThis value denotes start offset of DDR memory which is\n\t\tconnected exclusively to the DSP cores.\n\n\t\tCONFIG_SYS_FSL_DSP_M2_RAM_ADDR\n\t\tThis value denotes start offset of M2 memory\n\t\twhich is directly connected to the DSP core.\n\n\t\tCONFIG_SYS_FSL_DSP_M3_RAM_ADDR\n\t\tThis value denotes start offset of M3 memory which is directly\n\t\tconnected to the DSP core.\n\n\t\tCONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT\n\t\tThis value denotes start offset of DSP CCSR space.\n\n\t\tCONFIG_SYS_FSL_SINGLE_SOURCE_CLK\n\t\tSingle Source Clock is clocking mode present in some of FSL SoC's.\n\t\tIn this mode, a single differential clock is used to supply\n\t\tclocks to the sysclock, ddrclock and usbclock.\n\n\t\tCONFIG_SYS_CPC_REINIT_F\n\t\tThis CONFIG is defined when the CPC is configured as SRAM at the\n\t\ttime of U-boot entry and is required to be re-initialized.\n\n\t\tCONFIG_DEEP_SLEEP\n\t\tInidcates this SoC supports deep sleep feature. If deep sleep is\n\t\tsupported, core will start to execute uboot when wakes up.\n\n- Generic CPU options:\n\t\tCONFIG_SYS_GENERIC_GLOBAL_DATA\n\t\tDefines global data is initialized in generic board board_init_f().\n\t\tIf this macro is defined, global data is created and cleared in\n\t\tgeneric board board_init_f(). Without this macro, architecture/board\n\t\tshould initialize global data before calling board_init_f().\n\n\t\tCONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN\n\n\t\tDefines the endianess of the CPU. Implementation of those\n\t\tvalues is arch specific.\n\n\t\tCONFIG_SYS_FSL_DDR\n\t\tFreescale DDR driver in use. This type of DDR controller is\n\t\tfound in mpc83xx, mpc85xx, mpc86xx as well as some ARM core\n\t\tSoCs.\n\n\t\tCONFIG_SYS_FSL_DDR_ADDR\n\t\tFreescale DDR memory-mapped register base.\n\n\t\tCONFIG_SYS_FSL_DDR_EMU\n\t\tSpecify emulator support for DDR. Some DDR features such as\n\t\tdeskew training are not available.\n\n\t\tCONFIG_SYS_FSL_DDRC_GEN1\n\t\tFreescale DDR1 controller.\n\n\t\tCONFIG_SYS_FSL_DDRC_GEN2\n\t\tFreescale DDR2 controller.\n\n\t\tCONFIG_SYS_FSL_DDRC_GEN3\n\t\tFreescale DDR3 controller.\n\n\t\tCONFIG_SYS_FSL_DDRC_GEN4\n\t\tFreescale DDR4 controller.\n\n\t\tCONFIG_SYS_FSL_DDRC_ARM_GEN3\n\t\tFreescale DDR3 controller for ARM-based SoCs.\n\n\t\tCONFIG_SYS_FSL_DDR1\n\t\tBoard config to use DDR1. It can be enabled for SoCs with\n\t\tFreescale DDR1 or DDR2 controllers, depending on the board\n\t\timplemetation.\n\n\t\tCONFIG_SYS_FSL_DDR2\n\t\tBoard config to use DDR2. It can be eanbeld for SoCs with\n\t\tFreescale DDR2 or DDR3 controllers, depending on the board\n\t\timplementation.\n\n\t\tCONFIG_SYS_FSL_DDR3\n\t\tBoard config to use DDR3. It can be enabled for SoCs with\n\t\tFreescale DDR3 or DDR3L controllers.\n\n\t\tCONFIG_SYS_FSL_DDR3L\n\t\tBoard config to use DDR3L. It can be enabled for SoCs with\n\t\tDDR3L controllers.\n\n\t\tCONFIG_SYS_FSL_DDR4\n\t\tBoard config to use DDR4. It can be enabled for SoCs with\n\t\tDDR4 controllers.\n\n\t\tCONFIG_SYS_FSL_IFC_BE\n\t\tDefines the IFC controller register space as Big Endian\n\n\t\tCONFIG_SYS_FSL_IFC_LE\n\t\tDefines the IFC controller register space as Little Endian\n\n\t\tCONFIG_SYS_FSL_PBL_PBI\n\t\tIt enables addition of RCW (Power on reset configuration) in built image.\n\t\tPlease refer doc/README.pblimage for more details\n\n\t\tCONFIG_SYS_FSL_PBL_RCW\n\t\tIt adds PBI(pre-boot instructions) commands in u-boot build image.\n\t\tPBI commands can be used to configure SoC before it starts the execution.\n\t\tPlease refer doc/README.pblimage for more details\n\n\t\tCONFIG_SPL_FSL_PBL\n\t\tIt adds a target to create boot binary having SPL binary in PBI format\n\t\tconcatenated with u-boot binary.\n\n\t\tCONFIG_SYS_FSL_DDR_BE\n\t\tDefines the DDR controller register space as Big Endian\n\n\t\tCONFIG_SYS_FSL_DDR_LE\n\t\tDefines the DDR controller register space as Little Endian\n\n\t\tCONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY\n\t\tPhysical address from the view of DDR controllers. It is the\n\t\tsame as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But\n\t\tit could be different for ARM SoCs.\n\n\t\tCONFIG_SYS_FSL_DDR_INTLV_256B\n\t\tDDR controller interleaving on 256-byte. This is a special\n\t\tinterleaving mode, handled by Dickens for Freescale layerscape\n\t\tSoCs with ARM core.\n\n- Intel Monahans options:\n\t\tCONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO\n\n\t\tDefines the Monahans run mode to oscillator\n\t\tratio. Valid values are 8, 16, 24, 31. The core\n\t\tfrequency is this value multiplied by 13 MHz.\n\n\t\tCONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO\n\n\t\tDefines the Monahans turbo mode to oscillator\n\t\tratio. Valid values are 1 (default if undefined) and\n\t\t2. The core frequency as calculated above is multiplied\n\t\tby this value.\n\n- MIPS CPU options:\n\t\tCONFIG_SYS_INIT_SP_OFFSET\n\n\t\tOffset relative to CONFIG_SYS_SDRAM_BASE for initial stack\n\t\tpointer. This is needed for the temporary stack before\n\t\trelocation.\n\n\t\tCONFIG_SYS_MIPS_CACHE_MODE\n\n\t\tCache operation mode for the MIPS CPU.\n\t\tSee also arch/mips/include/asm/mipsregs.h.\n\t\tPossible values are:\n\t\t\tCONF_CM_CACHABLE_NO_WA\n\t\t\tCONF_CM_CACHABLE_WA\n\t\t\tCONF_CM_UNCACHED\n\t\t\tCONF_CM_CACHABLE_NONCOHERENT\n\t\t\tCONF_CM_CACHABLE_CE\n\t\t\tCONF_CM_CACHABLE_COW\n\t\t\tCONF_CM_CACHABLE_CUW\n\t\t\tCONF_CM_CACHABLE_ACCELERATED\n\n\t\tCONFIG_SYS_XWAY_EBU_BOOTCFG\n\n\t\tSpecial option for Lantiq XWAY SoCs for booting from NOR flash.\n\t\tSee also arch/mips/cpu/mips32/start.S.\n\n\t\tCONFIG_XWAY_SWAP_BYTES\n\n\t\tEnable compilation of tools/xway-swap-bytes needed for Lantiq\n\t\tXWAY SoCs for booting from NOR flash. The U-Boot image needs to\n\t\tbe swapped if a flash programmer is used.\n\n- ARM options:\n\t\tCONFIG_SYS_EXCEPTION_VECTORS_HIGH\n\n\t\tSelect high exception vectors of the ARM core, e.g., do not\n\t\tclear the V bit of the c1 register of CP15.\n\n\t\tCONFIG_SYS_THUMB_BUILD\n\n\t\tUse this flag to build U-Boot using the Thumb instruction\n\t\tset for ARM architectures. Thumb instruction set provides\n\t\tbetter code density. For ARM architectures that support\n\t\tThumb2 this flag will result in Thumb2 code generated by\n\t\tGCC.\n\n\t\tCONFIG_ARM_ERRATA_716044\n\t\tCONFIG_ARM_ERRATA_742230\n\t\tCONFIG_ARM_ERRATA_743622\n\t\tCONFIG_ARM_ERRATA_751472\n\t\tCONFIG_ARM_ERRATA_794072\n\t\tCONFIG_ARM_ERRATA_761320\n\n\t\tIf set, the workarounds for these ARM errata are applied early\n\t\tduring U-Boot startup. Note that these options force the\n\t\tworkarounds to be applied; no CPU-type/version detection\n\t\texists, unlike the similar options in the Linux kernel. Do not\n\t\tset these options unless they apply!\n\n- CPU timer options:\n\t\tCONFIG_SYS_HZ\n\n\t\tThe frequency of the timer returned by get_timer().\n\t\tget_timer() must operate in milliseconds and this CONFIG\n\t\toption must be set to 1000.\n\n- Linux Kernel Interface:\n\t\tCONFIG_CLOCKS_IN_MHZ\n\n\t\tU-Boot stores all clock information in Hz\n\t\tinternally. For binary compatibility with older Linux\n\t\tkernels (which expect the clocks passed in the\n\t\tbd_info data to be in MHz) the environment variable\n\t\t\"clocks_in_mhz\" can be defined so that U-Boot\n\t\tconverts clock data to MHZ before passing it to the\n\t\tLinux kernel.\n\t\tWhen CONFIG_CLOCKS_IN_MHZ is defined, a definition of\n\t\t\"clocks_in_mhz=1\" is automatically included in the\n\t\tdefault environment.\n\n\t\tCONFIG_MEMSIZE_IN_BYTES\t\t[relevant for MIPS only]\n\n\t\tWhen transferring memsize parameter to linux, some versions\n\t\texpect it to be in bytes, others in MB.\n\t\tDefine CONFIG_MEMSIZE_IN_BYTES to make it in bytes.\n\n\t\tCONFIG_OF_LIBFDT\n\n\t\tNew kernel versions are expecting firmware settings to be\n\t\tpassed using flattened device trees (based on open firmware\n\t\tconcepts).\n\n\t\tCONFIG_OF_LIBFDT\n\t\t * New libfdt-based support\n\t\t * Adds the \"fdt\" command\n\t\t * The bootm command automatically updates the fdt\n\n\t\tOF_CPU - The proper name of the cpus node (only required for\n\t\t\tMPC512X and MPC5xxx based boards).\n\t\tOF_SOC - The proper name of the soc node (only required for\n\t\t\tMPC512X and MPC5xxx based boards).\n\t\tOF_TBCLK - The timebase frequency.\n\t\tOF_STDOUT_PATH - The path to the console device\n\n\t\tboards with QUICC Engines require OF_QE to set UCC MAC\n\t\taddresses\n\n\t\tCONFIG_OF_BOARD_SETUP\n\n\t\tBoard code has addition modification that it wants to make\n\t\tto the flat device tree before handing it off to the kernel\n\n\t\tCONFIG_OF_BOOT_CPU\n\n\t\tThis define fills in the correct boot CPU in the boot\n\t\tparam header, the default value is zero if undefined.\n\n\t\tCONFIG_OF_IDE_FIXUP\n\n\t\tU-Boot can detect if an IDE device is present or not.\n\t\tIf not, and this new config option is activated, U-Boot\n\t\tremoves the ATA node from the DTS before booting Linux,\n\t\tso the Linux IDE driver does not probe the device and\n\t\tcrash. This is needed for buggy hardware (uc101) where\n\t\tno pull down resistor is connected to the signal IDE5V_DD7.\n\n\t\tCONFIG_MACH_TYPE\t[relevant for ARM only][mandatory]\n\n\t\tThis setting is mandatory for all boards that have only one\n\t\tmachine type and must be used to specify the machine type\n\t\tnumber as it appears in the ARM machine registry\n\t\t(see http://www.arm.linux.org.uk/developer/machines/).\n\t\tOnly boards that have multiple machine types supported\n\t\tin a single configuration file and the machine type is\n\t\truntime discoverable, do not have to use this setting.\n\n- vxWorks boot parameters:\n\n\t\tbootvx constructs a valid bootline using the following\n\t\tenvironments variables: bootfile, ipaddr, serverip, hostname.\n\t\tIt loads the vxWorks image pointed bootfile.\n\n\t\tCONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name\n\t\tCONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address\n\t\tCONFIG_SYS_VXWORKS_SERVERNAME - Name of the server\n\t\tCONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters\n\n\t\tCONFIG_SYS_VXWORKS_ADD_PARAMS\n\n\t\tAdd it at the end of the bootline. E.g \"u=username pw=secret\"\n\n\t\tNote: If a \"bootargs\" environment is defined, it will overwride\n\t\tthe defaults discussed just above.\n\n- Cache Configuration:\n\t\tCONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot\n\t\tCONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot\n\t\tCONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot\n\n- Cache Configuration for ARM:\n\t\tCONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache\n\t\t\t\t controller\n\t\tCONFIG_SYS_PL310_BASE - Physical base address of PL310\n\t\t\t\t\tcontroller register space\n\n- Serial Ports:\n\t\tCONFIG_PL010_SERIAL\n\n\t\tDefine this if you want support for Amba PrimeCell PL010 UARTs.\n\n\t\tCONFIG_PL011_SERIAL\n\n\t\tDefine this if you want support for Amba PrimeCell PL011 UARTs.\n\n\t\tCONFIG_PL011_CLOCK\n\n\t\tIf you have Amba PrimeCell PL011 UARTs, set this variable to\n\t\tthe clock speed of the UARTs.\n\n\t\tCONFIG_PL01x_PORTS\n\n\t\tIf you have Amba PrimeCell PL010 or PL011 UARTs on your board,\n\t\tdefine this to a list of base addresses for each (supported)\n\t\tport. See e.g. include/configs/versatile.h\n\n\t\tCONFIG_PL011_SERIAL_RLCR\n\n\t\tSome vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)\n\t\thave separate receive and transmit line control registers. Set\n\t\tthis variable to initialize the extra register.\n\n\t\tCONFIG_PL011_SERIAL_FLUSH_ON_INIT\n\n\t\tOn some platforms (e.g. U8500) U-Boot is loaded by a second stage\n\t\tboot loader that has already initialized the UART. Define this\n\t\tvariable to flush the UART at init time.\n\n\t\tCONFIG_SERIAL_HW_FLOW_CONTROL\n\n\t\tDefine this variable to enable hw flow control in serial driver.\n\t\tCurrent user of this option is drivers/serial/nsl16550.c driver\n\n- Console Interface:\n\t\tDepending on board, define exactly one serial port\n\t\t(like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,\n\t\tCONFIG_8xx_CONS_SCC1, ...), or switch off the serial\n\t\tconsole by defining CONFIG_8xx_CONS_NONE\n\n\t\tNote: if CONFIG_8xx_CONS_NONE is defined, the serial\n\t\tport routines must be defined elsewhere\n\t\t(i.e. serial_init(), serial_getc(), ...)\n\n\t\tCONFIG_CFB_CONSOLE\n\t\tEnables console device for a color framebuffer. Needs following\n\t\tdefines (cf. smiLynxEM, i8042)\n\t\t\tVIDEO_FB_LITTLE_ENDIAN\tgraphic memory organisation\n\t\t\t\t\t\t(default big endian)\n\t\t\tVIDEO_HW_RECTFILL\tgraphic chip supports\n\t\t\t\t\t\trectangle fill\n\t\t\t\t\t\t(cf. smiLynxEM)\n\t\t\tVIDEO_HW_BITBLT\t\tgraphic chip supports\n\t\t\t\t\t\tbit-blit (cf. smiLynxEM)\n\t\t\tVIDEO_VISIBLE_COLS\tvisible pixel columns\n\t\t\t\t\t\t(cols=pitch)\n\t\t\tVIDEO_VISIBLE_ROWS\tvisible pixel rows\n\t\t\tVIDEO_PIXEL_SIZE\tbytes per pixel\n\t\t\tVIDEO_DATA_FORMAT\tgraphic data format\n\t\t\t\t\t\t(0-5, cf. cfb_console.c)\n\t\t\tVIDEO_FB_ADRS\t\tframebuffer address\n\t\t\tVIDEO_KBD_INIT_FCT\tkeyboard int fct\n\t\t\t\t\t\t(i.e. i8042_kbd_init())\n\t\t\tVIDEO_TSTC_FCT\t\ttest char fct\n\t\t\t\t\t\t(i.e. i8042_tstc)\n\t\t\tVIDEO_GETC_FCT\t\tget char fct\n\t\t\t\t\t\t(i.e. i8042_getc)\n\t\t\tCONFIG_CONSOLE_CURSOR\tcursor drawing on/off\n\t\t\t\t\t\t(requires blink timer\n\t\t\t\t\t\tcf. i8042.c)\n\t\t\tCONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)\n\t\t\tCONFIG_CONSOLE_TIME\tdisplay time/date info in\n\t\t\t\t\t\tupper right corner\n\t\t\t\t\t\t(requires CONFIG_CMD_DATE)\n\t\t\tCONFIG_VIDEO_LOGO\tdisplay Linux logo in\n\t\t\t\t\t\tupper left corner\n\t\t\tCONFIG_VIDEO_BMP_LOGO\tuse bmp_logo.h instead of\n\t\t\t\t\t\tlinux_logo.h for logo.\n\t\t\t\t\t\tRequires CONFIG_VIDEO_LOGO\n\t\t\tCONFIG_CONSOLE_EXTRA_INFO\n\t\t\t\t\t\tadditional board info beside\n\t\t\t\t\t\tthe logo\n\n\t\tWhen CONFIG_CFB_CONSOLE_ANSI is defined, console will support\n\t\ta limited number of ANSI escape sequences (cursor control,\n\t\terase functions and limited graphics rendition control).\n\n\t\tWhen CONFIG_CFB_CONSOLE is defined, video console is\n\t\tdefault i/o. Serial console can be forced with\n\t\tenvironment 'console=serial'.\n\n\t\tWhen CONFIG_SILENT_CONSOLE is defined, all console\n\t\tmessages (by U-Boot and Linux!) can be silenced with\n\t\tthe \"silent\" environment variable. See\n\t\tdoc/README.silent for more information.\n\n\t\tCONFIG_SYS_CONSOLE_BG_COL: define the backgroundcolor, default\n\t\t\tis 0x00.\n\t\tCONFIG_SYS_CONSOLE_FG_COL: define the foregroundcolor, default\n\t\t\tis 0xa0.\n\n- Console Baudrate:\n\t\tCONFIG_BAUDRATE - in bps\n\t\tSelect one of the baudrates listed in\n\t\tCONFIG_SYS_BAUDRATE_TABLE, see below.\n\t\tCONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale\n\n- Console Rx buffer length\n\t\tWith CONFIG_SYS_SMC_RXBUFLEN it is possible to define\n\t\tthe maximum receive buffer length for the SMC.\n\t\tThis option is actual only for 82xx and 8xx possible.\n\t\tIf using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE\n\t\tmust be defined, to setup the maximum idle timeout for\n\t\tthe SMC.\n\n- Pre-Console Buffer:\n\t\tPrior to the console being initialised (i.e. serial UART\n\t\tinitialised etc) all console output is silently discarded.\n\t\tDefining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to\n\t\tbuffer any console messages prior to the console being\n\t\tinitialised to a buffer of size CONFIG_PRE_CON_BUF_SZ\n\t\tbytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is\n\t\ta circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ\n\t\tbytes are output before the console is initialised, the\n\t\tearlier bytes are discarded.\n\n\t\t'Sane' compilers will generate smaller code if\n\t\tCONFIG_PRE_CON_BUF_SZ is a power of 2\n\n- Safe printf() functions\n\t\tDefine CONFIG_SYS_VSNPRINTF to compile in safe versions of\n\t\tthe printf() functions. These are defined in\n\t\tinclude/vsprintf.h and include snprintf(), vsnprintf() and\n\t\tso on. Code size increase is approximately 300-500 bytes.\n\t\tIf this option is not given then these functions will\n\t\tsilently discard their buffer size argument - this means\n\t\tyou are not getting any overflow checking in this case.\n\n- Boot Delay:\tCONFIG_BOOTDELAY - in seconds\n\t\tDelay before automatically booting the default image;\n\t\tset to -1 to disable autoboot.\n\t\tset to -2 to autoboot with no delay and not check for abort\n\t\t(even when CONFIG_ZERO_BOOTDELAY_CHECK is defined).\n\n\t\tSee doc/README.autoboot for these options that\n\t\twork with CONFIG_BOOTDELAY. None are required.\n\t\tCONFIG_BOOT_RETRY_TIME\n\t\tCONFIG_BOOT_RETRY_MIN\n\t\tCONFIG_AUTOBOOT_KEYED\n\t\tCONFIG_AUTOBOOT_PROMPT\n\t\tCONFIG_AUTOBOOT_DELAY_STR\n\t\tCONFIG_AUTOBOOT_STOP_STR\n\t\tCONFIG_AUTOBOOT_DELAY_STR2\n\t\tCONFIG_AUTOBOOT_STOP_STR2\n\t\tCONFIG_ZERO_BOOTDELAY_CHECK\n\t\tCONFIG_RESET_TO_RETRY\n\n- Autoboot Command:\n\t\tCONFIG_BOOTCOMMAND\n\t\tOnly needed when CONFIG_BOOTDELAY is enabled;\n\t\tdefine a command string that is automatically executed\n\t\twhen no character is read on the console interface\n\t\twithin \"Boot Delay\" after reset.\n\n\t\tCONFIG_BOOTARGS\n\t\tThis can be used to pass arguments to the bootm\n\t\tcommand. The value of CONFIG_BOOTARGS goes into the\n\t\tenvironment value \"bootargs\".\n\n\t\tCONFIG_RAMBOOT and CONFIG_NFSBOOT\n\t\tThe value of these goes into the environment as\n\t\t\"ramboot\" and \"nfsboot\" respectively, and can be used\n\t\tas a convenience, when switching between booting from\n\t\tRAM and NFS.\n\n- Bootcount:\n\t\tCONFIG_BOOTCOUNT_LIMIT\n\t\tImplements a mechanism for detecting a repeating reboot\n\t\tcycle, see:\n\t\thttp://www.denx.de/wiki/view/DULG/UBootBootCountLimit\n\n\t\tCONFIG_BOOTCOUNT_ENV\n\t\tIf no softreset save registers are found on the hardware\n\t\t\"bootcount\" is stored in the environment. To prevent a\n\t\tsaveenv on all reboots, the environment variable\n\t\t\"upgrade_available\" is used. If \"upgrade_available\" is\n\t\t0, \"bootcount\" is always 0, if \"upgrade_available\" is\n\t\t1 \"bootcount\" is incremented in the environment.\n\t\tSo the Userspace Applikation must set the \"upgrade_available\"\n\t\tand \"bootcount\" variable to 0, if a boot was successfully.\n\n- Pre-Boot Commands:\n\t\tCONFIG_PREBOOT\n\n\t\tWhen this option is #defined, the existence of the\n\t\tenvironment variable \"preboot\" will be checked\n\t\timmediately before starting the CONFIG_BOOTDELAY\n\t\tcountdown and/or running the auto-boot command resp.\n\t\tentering interactive mode.\n\n\t\tThis feature is especially useful when \"preboot\" is\n\t\tautomatically generated or modified. For an example\n\t\tsee the LWMON board specific code: here \"preboot\" is\n\t\tmodified when the user holds down a certain\n\t\tcombination of keys on the (special) keyboard when\n\t\tbooting the systems\n\n- Serial Download Echo Mode:\n\t\tCONFIG_LOADS_ECHO\n\t\tIf defined to 1, all characters received during a\n\t\tserial download (using the \"loads\" command) are\n\t\techoed back. This might be needed by some terminal\n\t\temulations (like \"cu\"), but may as well just take\n\t\ttime on others. This setting #define's the initial\n\t\tvalue of the \"loads_echo\" environment variable.\n\n- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)\n\t\tCONFIG_KGDB_BAUDRATE\n\t\tSelect one of the baudrates listed in\n\t\tCONFIG_SYS_BAUDRATE_TABLE, see below.\n\n- Monitor Functions:\n\t\tMonitor commands can be included or excluded\n\t\tfrom the build by using the #include files\n\t\t\u003cconfig_cmd_all.h\u003e and #undef'ing unwanted\n\t\tcommands, or using \u003cconfig_cmd_default.h\u003e\n\t\tand augmenting with additional #define's\n\t\tfor wanted commands.\n\n\t\tThe default command configuration includes all commands\n\t\texcept those marked below with a \"*\".\n\n\t\tCONFIG_CMD_AES\t\t AES 128 CBC encrypt/decrypt\n\t\tCONFIG_CMD_ASKENV\t* ask for env variable\n\t\tCONFIG_CMD_BDI\t\t bdinfo\n\t\tCONFIG_CMD_BEDBUG\t* Include BedBug Debugger\n\t\tCONFIG_CMD_BMP\t\t* BMP support\n\t\tCONFIG_CMD_BSP\t\t* Board specific commands\n\t\tCONFIG_CMD_BOOTD\t bootd\n\t\tCONFIG_CMD_CACHE\t* icache, dcache\n\t\tCONFIG_CMD_CLK \t* clock command support\n\t\tCONFIG_CMD_CONSOLE\t coninfo\n\t\tCONFIG_CMD_CRC32\t* crc32\n\t\tCONFIG_CMD_DATE\t\t* support for RTC, date/time...\n\t\tCONFIG_CMD_DHCP\t\t* DHCP support\n\t\tCONFIG_CMD_DIAG\t\t* Diagnostics\n\t\tCONFIG_CMD_DS4510\t* ds4510 I2C gpio commands\n\t\tCONFIG_CMD_DS4510_INFO\t* ds4510 I2C info command\n\t\tCONFIG_CMD_DS4510_MEM\t* ds4510 I2C eeprom/sram commansd\n\t\tCONFIG_CMD_DS4510_RST\t* ds4510 I2C rst command\n\t\tCONFIG_CMD_DTT\t\t* Digital Therm and Thermostat\n\t\tCONFIG_CMD_ECHO\t\t echo arguments\n\t\tCONFIG_CMD_EDITENV\t edit env variable\n\t\tCONFIG_CMD_EEPROM\t* EEPROM read/write support\n\t\tCONFIG_CMD_ELF\t\t* bootelf, bootvx\n\t\tCONFIG_CMD_ENV_CALLBACK\t* display details about env callbacks\n\t\tCONFIG_CMD_ENV_FLAGS\t* display details about env flags\n\t\tCONFIG_CMD_ENV_EXISTS\t* check existence of env variable\n\t\tCONFIG_CMD_EXPORTENV\t* export the environment\n\t\tCONFIG_CMD_EXT2\t\t* ext2 command support\n\t\tCONFIG_CMD_EXT4\t\t* ext4 command support\n\t\tCONFIG_CMD_FS_GENERIC\t* filesystem commands (e.g. load, ls)\n\t\t\t\t\t that work for multiple fs types\n\t\tCONFIG_CMD_SAVEENV\t saveenv\n\t\tCONFIG_CMD_FDC\t\t* Floppy Disk Support\n\t\tCONFIG_CMD_FAT\t\t* FAT command support\n\t\tCONFIG_CMD_FLASH\t flinfo, erase, protect\n\t\tCONFIG_CMD_FPGA\t\t FPGA device initialization support\n\t\tCONFIG_CMD_FUSE\t\t* Device fuse support\n\t\tCONFIG_CMD_GETTIME\t* Get time since boot\n\t\tCONFIG_CMD_GO\t\t* the 'go' command (exec code)\n\t\tCONFIG_CMD_GREPENV\t* search environment\n\t\tCONFIG_CMD_HASH\t\t* calculate hash / digest\n\t\tCONFIG_CMD_HWFLOW\t* RTS/CTS hw flow control\n\t\tCONFIG_CMD_I2C\t\t* I2C serial bus support\n\t\tCONFIG_CMD_IDE\t\t* IDE harddisk support\n\t\tCONFIG_CMD_IMI\t\t iminfo\n\t\tCONFIG_CMD_IMLS\t\t List all images found in NOR flash\n\t\tCONFIG_CMD_IMLS_NAND\t* List all images found in NAND flash\n\t\tCONFIG_CMD_IMMAP\t* IMMR dump support\n\t\tCONFIG_CMD_IOTRACE\t* I/O tracing for debugging\n\t\tCONFIG_CMD_IMPORTENV\t* import an environment\n\t\tCONFIG_CMD_INI\t\t* import data from an ini file into the env\n\t\tCONFIG_CMD_IRQ\t\t* irqinfo\n\t\tCONFIG_CMD_ITEST\t Integer/string test of 2 values\n\t\tCONFIG_CMD_JFFS2\t* JFFS2 Support\n\t\tCONFIG_CMD_KGDB\t\t* kgdb\n\t\tCONFIG_CMD_LDRINFO\t* ldrinfo (display Blackfin loader)\n\t\tCONFIG_CMD_LINK_LOCAL\t* link-local IP address auto-configuration\n\t\t\t\t\t (169.254.*.*)\n\t\tCONFIG_CMD_LOADB\t loadb\n\t\tCONFIG_CMD_LOADS\t loads\n\t\tCONFIG_CMD_MD5SUM\t* print md5 message digest\n\t\t\t\t\t (requires CONFIG_CMD_MEMORY and CONFIG_MD5)\n\t\tCONFIG_CMD_MEMINFO\t* Display detailed memory information\n\t\tCONFIG_CMD_MEMORY\t md, mm, nm, mw, cp, cmp, crc, base,\n\t\t\t\t\t loop, loopw\n\t\tCONFIG_CMD_MEMTEST\t* mtest\n\t\tCONFIG_CMD_MISC\t\t Misc functions like sleep etc\n\t\tCONFIG_CMD_MMC\t\t* MMC memory mapped support\n\t\tCONFIG_CMD_MII\t\t* MII utility commands\n\t\tCONFIG_CMD_MTDPARTS\t* MTD partition support\n\t\tCONFIG_CMD_NAND\t\t* NAND support\n\t\tCONFIG_CMD_NET\t\t bootp, tftpboot, rarpboot\n\t\tCONFIG_CMD_NFS\t\t NFS support\n\t\tCONFIG_CMD_PCA953X\t* PCA953x I2C gpio commands\n\t\tCONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command\n\t\tCONFIG_CMD_PCI\t\t* pciinfo\n\t\tCONFIG_CMD_PCMCIA\t\t* PCMCIA support\n\t\tCONFIG_CMD_PING\t\t* send ICMP ECHO_REQUEST to network\n\t\t\t\t\t host\n\t\tCONFIG_CMD_PORTIO\t* Port I/O\n\t\tCONFIG_CMD_READ\t\t* Read raw data from partition\n\t\tCONFIG_CMD_REGINFO\t* Register dump\n\t\tCONFIG_CMD_RUN\t\t run command in env variable\n\t\tCONFIG_CMD_SANDBOX\t* sb command to access sandbox features\n\t\tCONFIG_CMD_SAVES\t* save S record dump\n\t\tCONFIG_CMD_SCSI\t\t* SCSI Support\n\t\tCONFIG_CMD_SDRAM\t* print SDRAM configuration information\n\t\t\t\t\t (requires CONFIG_CMD_I2C)\n\t\tCONFIG_CMD_SETGETDCR\t Support for DCR Register access\n\t\t\t\t\t (4xx only)\n\t\tCONFIG_CMD_SF\t\t* Read/write/erase SPI NOR flash\n\t\tCONFIG_CMD_SHA1SUM\t* print sha1 memory digest\n\t\t\t\t\t (requires CONFIG_CMD_MEMORY)\n\t\tCONFIG_CMD_SOFTSWITCH\t* Soft switch setting command for BF60x\n\t\tCONFIG_CMD_SOURCE\t \"source\" command Support\n\t\tCONFIG_CMD_SPI\t\t* SPI serial bus support\n\t\tCONFIG_CMD_TFTPSRV\t* TFTP transfer in server mode\n\t\tCONFIG_CMD_TFTPPUT\t* TFTP put command (upload)\n\t\tCONFIG_CMD_TIME\t\t* run command and report execution time (ARM specific)\n\t\tCONFIG_CMD_TIMER\t* access to the system tick timer\n\t\tCONFIG_CMD_USB\t\t* USB support\n\t\tCONFIG_CMD_CDP\t\t* Cisco Discover Protocol support\n\t\tCONFIG_CMD_MFSL\t\t* Microblaze FSL support\n\t\tCONFIG_CMD_XIMG\t\t Load part of Multi Image\n\t\tCONFIG_CMD_UUID\t\t* Generate random UUID or GUID string\n\n\t\tEXAMPLE: If you want all functions except of network\n\t\tsupport you can write:\n\n\t\t#include \"config_cmd_all.h\"\n\t\t#undef CONFIG_CMD_NET\n\n\tOther Commands:\n\t\tfdt (flattened device tree) command: CONFIG_OF_LIBFDT\n\n\tNote:\tDon't enable the \"icache\" and \"dcache\" commands\n\t\t(configuration option CONFIG_CMD_CACHE) unless you know\n\t\twhat you (and your U-Boot users) are doing. Data\n\t\tcache cannot be enabled on systems like the 8xx or\n\t\t8260 (where accesses to the IMMR region must be\n\t\tuncached), and it cannot be disabled on all other\n\t\tsystems where we (mis-) use the data cache to hold an\n\t\tinitial stack and some data.\n\n\n\t\tXXX - this list needs to get updated!\n\n- Regular expression support:\n\t\tCONFIG_REGEX\n\t\tIf this variable is defined, U-Boot is linked against\n\t\tthe SLRE (Super Light Regular Expression) library,\n\t\twhich adds regex support to some commands, as for\n\t\texample \"env grep\" and \"setexpr\".\n\n- Device tree:\n\t\tCONFIG_OF_CONTROL\n\t\tIf this variable is defined, U-Boot will use a device tree\n\t\tto configure its devices, instead of relying on statically\n\t\tcompiled #defines in the board file. This option is\n\t\texperimental and only available on a few boards. The device\n\t\ttree is available in the global data as gd-\u003efdt_blob.\n\n\t\tU-Boot needs to get its device tree from somewhere. This can\n\t\tbe done using one of the two options below:\n\n\t\tCONFIG_OF_EMBED\n\t\tIf this variable is defined, U-Boot will embed a device tree\n\t\tbinary in its image. This device tree file should be in the\n\t\tboard directory and called \u003csoc\u003e-\u003cboard\u003e.dts. The binary file\n\t\tis then picked up in board_init_f() and made available through\n\t\tthe global data structure as gd-\u003eblob.\n\n\t\tCONFIG_OF_SEPARATE\n\t\tIf this variable is defined, U-Boot will build a device tree\n\t\tbinary. It will be called u-boot.dtb. Architecture-specific\n\t\tcode will locate it at run-time. Generally this works by:\n\n\t\t\tcat u-boot.bin u-boot.dtb \u003eimage.bin\n\n\t\tand in fact, U-Boot does this for you, creating a file called\n\t\tu-boot-dtb.bin which is useful in the common case. You can\n\t\tstill use the individual files if you need something more\n\t\texotic.\n\n- Watchdog:\n\t\tCONFIG_WATCHDOG\n\t\tIf this variable is defined, it enables watchdog\n\t\tsupport for the SoC. There must be support in the SoC\n\t\tspecific code for a watchdog. For the 8xx and 8260\n\t\tCPUs, the SIU Watchdog feature is enabled in the SYPCR\n\t\tregister. When supported for a specific SoC is\n\t\tavailable, then no further board specific code should\n\t\tbe needed to use it.\n\n\t\tCONFIG_HW_WATCHDOG\n\t\tWhen using a watchdog circuitry external to the used\n\t\tSoC, then define this variable and provide board\n\t\tspecific code for the \"hw_watchdog_reset\" function.\n\n- U-Boot Version:\n\t\tCONFIG_VERSION_VARIABLE\n\t\tIf this variable is defined, an environment variable\n\t\tnamed \"ver\" is created by U-Boot showing the U-Boot\n\t\tversion as printed by the \"version\" command.\n\t\tAny change to this variable will be reverted at the\n\t\tnext reset.\n\n- Real-Time Clock:\n\n\t\tWhen CONFIG_CMD_DATE is selected, the type of the RTC\n\t\thas to be selected, too. Define exactly one of the\n\t\tfollowing options:\n\n\t\tCONFIG_RTC_MPC8xx\t- use internal RTC of MPC8xx\n\t\tCONFIG_RTC_PCF8563\t- use Philips PCF8563 RTC\n\t\tCONFIG_RTC_MC13XXX\t- use MC13783 or MC13892 RTC\n\t\tCONFIG_RTC_MC146818\t- use MC146818 RTC\n\t\tCONFIG_RTC_DS1307\t- use Maxim, Inc. DS1307 RTC\n\t\tCONFIG_RTC_DS1337\t- use Maxim, Inc. DS1337 RTC\n\t\tCONFIG_RTC_DS1338\t- use Maxim, Inc. DS1338 RTC\n\t\tCONFIG_RTC_DS164x\t- use Dallas DS164x RTC\n\t\tCONFIG_RTC_ISL1208\t- use Intersil ISL1208 RTC\n\t\tCONFIG_RTC_MAX6900\t- use Maxim, Inc. MAX6900 RTC\n\t\tCONFIG_SYS_RTC_DS1337_NOOSC\t- Turn off the OSC output for DS1337\n\t\tCONFIG_SYS_RV3029_TCR\t- enable trickle charger on\n\t\t\t\t\t RV3029 RTC.\n\n\t\tNote that if the RTC uses I2C, then the I2C interface\n\t\tmust also be configured. See I2C Support, below.\n\n- GPIO Support:\n\t\tCONFIG_PCA953X\t\t- use NXP's PCA953X series I2C GPIO\n\n\t\tThe CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of\n\t\tchip-ngpio pairs that tell the PCA953X driver the number of\n\t\tpins supported by a particular chip.\n\n\t\tNote that if the GPIO device uses I2C, then the I2C interface\n\t\tmust also be configured. See I2C Support, below.\n\n- I/O tracing:\n\t\tWhen CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O\n\t\taccesses and can checksum them or write a list of them out\n\t\tto memory. See the 'iotrace' command for details. This is\n\t\tuseful for testing device drivers since it can confirm that\n\t\tthe driver behaves the same way before and after a code\n\t\tchange. Currently this is supported on sandbox and arm. To\n\t\tadd support for your architecture, add '#include \u003ciotrace.h\u003e'\n\t\tto the bottom of arch/\u003carch\u003e/include/asm/io.h and test.\n\n\t\tExample output from the 'iotrace stats' command is below.\n\t\tNote that if the trace buffer is exhausted, the checksum will\n\t\tstill continue to operate.\n\n\t\t\tiotrace is enabled\n\t\t\tStart: 10000000\t(buffer start address)\n\t\t\tSize: 00010000\t(buffer size)\n\t\t\tOffset: 00000120\t(current buffer offset)\n\t\t\tOutput: 10000120\t(start + offset)\n\t\t\tCount: 00000018\t(number of trace records)\n\t\t\tCRC32: 9526fb66\t(CRC32 of all trace records)\n\n- Timestamp Support:\n\n\t\tWhen CONFIG_TIMESTAMP is selected, the timestamp\n\t\t(date and time) of an image is printed by image\n\t\tcommands like bootm or iminfo. This option is\n\t\tautomatically enabled when you select CONFIG_CMD_DATE .\n\n- Partition Labels (disklabels) Supported:\n\t\tZero or more of the following:\n\t\tCONFIG_MAC_PARTITION Apple's MacOS partition table.\n\t\tCONFIG_DOS_PARTITION MS Dos partition table, traditional on the\n\t\t\t\t Intel architecture, USB sticks, etc.\n\t\tCONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.\n\t\tCONFIG_EFI_PARTITION GPT partition table, common when EFI is the\n\t\t\t\t bootloader. Note 2TB partition limit; see\n\t\t\t\t disk/part_efi.c\n\t\tCONFIG_MTD_PARTITIONS Memory Technology Device partition table.\n\n\t\tIf IDE or SCSI support is enabled (CONFIG_CMD_IDE or\n\t\tCONFIG_CMD_SCSI) you must configure support for at\n\t\tleast one non-MTD partition type as well.\n\n- IDE Reset method:\n\t\tCONFIG_IDE_RESET_ROUTINE - this is defined in several\n\t\tboard configurations files but used nowhere!\n\n\t\tCONFIG_IDE_RESET - is this is defined, IDE Reset will\n\t\tbe performed by calling the function\n\t\t\tide_set_reset(int reset)\n\t\twhich has to be defined in a board specific file\n\n- ATAPI Support:\n\t\tCONFIG_ATAPI\n\n\t\tSet this to enable ATAPI support.\n\n- LBA48 Support\n\t\tCONFIG_LBA48\n\n\t\tSet this to enable support for disks larger than 137GB\n\t\tAlso look at CONFIG_SYS_64BIT_LBA.\n\t\tWhithout these , LBA48 support uses 32bit variables and will 'only'\n\t\tsupport disks up to 2.1TB.\n\n\t\tCONFIG_SYS_64BIT_LBA:\n\t\t\tWhen enabled, makes the IDE subsystem use 64bit sector addresses.\n\t\t\tDefault is 32bit.\n\n- SCSI Support:\n\t\tAt the moment only there is only support for the\n\t\tSYM53C8XX SCSI controller; define\n\t\tCONFIG_SCSI_SYM53C8XX to enable it.\n\n\t\tCONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and\n\t\tCONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *\n\t\tCONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the\n\t\tmaximum numbers of LUNs, SCSI ID's and target\n\t\tdevices.\n\t\tCONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)\n\n\t\tThe environment variable 'scsidevs' is set to the number of\n\t\tSCSI devices found during the last scan.\n\n- NETWORK Support (PCI):\n\t\tCONFIG_E1000\n\t\tSupport for Intel 8254x/8257x gigabit chips.\n\n\t\tCONFIG_E1000_SPI\n\t\tUtility code for direct access to the SPI bus on Intel 8257x.\n\t\tThis does not do anything useful unless you set at least one\n\t\tof CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.\n\n\t\tCONFIG_E1000_SPI_GENERIC\n\t\tAllow generic access to the SPI bus on the Intel 8257x, for\n\t\texample with the \"sspi\" command.\n\n\t\tCONFIG_CMD_E1000\n\t\tManagement command for E1000 devices. When used on devices\n\t\twith SPI support you can reprogram the EEPROM from U-Boot.\n\n\t\tCONFIG_E1000_FALLBACK_MAC\n\t\tdefault MAC for empty EEPROM after production.\n\n\t\tCONFIG_EEPRO100\n\t\tSupport for Intel 82557/82559/82559ER chips.\n\t\tOptional CONFIG_EEPRO100_SROM_WRITE enables EEPROM\n\t\twrite routine for first time initialisation.\n\n\t\tCONFIG_TULIP\n\t\tSupport for Digital 2114x chips.\n\t\tOptional CONFIG_TULIP_SELECT_MEDIA for board specific\n\t\tmodem chip initialisation (KS8761/QS6611).\n\n\t\tCONFIG_NATSEMI\n\t\tSupport for National dp83815 chips.\n\n\t\tCONFIG_NS8382X\n\t\tSupport for National dp8382[01] gigabit chips.\n\n- NETWORK Support (other):\n\n\t\tCONFIG_DRIVER_AT91EMAC\n\t\tSupport for AT91RM9200 EMAC.\n\n\t\t\tCONFIG_RMII\n\t\t\tDefine this to use reduced MII inteface\n\n\t\t\tCONFIG_DRIVER_AT91EMAC_QUIET\n\t\t\tIf this defined, the driver is quiet.\n\t\t\tThe driver doen't show link status messages.\n\n\t\tCONFIG_CALXEDA_XGMAC\n\t\tSupport for the Calxeda XGMAC device\n\n\t\tCONFIG_LAN91C96\n\t\tSupport for SMSC's LAN91C96 chips.\n\n\t\t\tCONFIG_LAN91C96_BASE\n\t\t\tDefine this to hold the physical address\n\t\t\tof the LAN91C96's I/O space\n\n\t\t\tCONFIG_LAN91C96_USE_32_BIT\n\t\t\tDefine this to enable 32 bit addressing\n\n\t\tCONFIG_SMC91111\n\t\tSupport for SMSC's LAN91C111 chip\n\n\t\t\tCONFIG_SMC91111_BASE\n\t\t\tDefine this to hold the physical address\n\t\t\tof the device (I/O space)\n\n\t\t\tCONFIG_SMC_USE_32_BIT\n\t\t\tDefine this if data bus is 32 bits\n\n\t\t\tCONFIG_SMC_USE_IOFUNCS\n\t\t\tDefine this to use i/o functions instead of macros\n\t\t\t(some hardware wont work with macros)\n\n\t\tCONFIG_DRIVER_TI_EMAC\n\t\tSupport for davinci emac\n\n\t\t\tCONFIG_SYS_DAVINCI_EMAC_PHY_COUNT\n\t\t\tDefine this if you have more then 3 PHYs.\n\n\t\tCONFIG_FTGMAC100\n\t\tSupport for Faraday's FTGMAC100 Gigabit SoC Ethernet\n\n\t\t\tCONFIG_FTGMAC100_EGIGA\n\t\t\tDefine this to use GE link update with gigabit PHY.\n\t\t\tDefine this if FTGMAC100 is connected to gigabit PHY.\n\t\t\tIf your system has 10/100 PHY only, it might not occur\n\t\t\twrong behavior. Because PHY usually return timeout or\n\t\t\tuseless data when polling gigabit status and gigabit\n\t\t\tcontrol registers. This behavior won't affect the\n\t\t\tcorrectnessof 10/100 link speed update.\n\n\t\tCONFIG_SMC911X\n\t\tSupport for SMSC's LAN911x and LAN921x chips\n\n\t\t\tCONFIG_SMC911X_BASE\n\t\t\tDefine this to hold the physical address\n\t\t\tof the device (I/O space)\n\n\t\t\tCONFIG_SMC911X_32_BIT\n\t\t\tDefine this if data bus is 32 bits\n\n\t\t\tCONFIG_SMC911X_16_BIT\n\t\t\tDefine this if data bus is 16 bits. If your processor\n\t\t\tautomatically converts one 32 bit word to two 16 bit\n\t\t\twords you may also try CONFIG_SMC911X_32_BIT.\n\n\t\tCONFIG_SH_ETHER\n\t\tSupport for Renesas on-chip Ethernet controller\n\n\t\t\tCONFIG_SH_ETHER_USE_PORT\n\t\t\tDefine the number of ports to be used\n\n\t\t\tCONFIG_SH_ETHER_PHY_ADDR\n\t\t\tDefine the ETH PHY's address\n\n\t\t\tCONFIG_SH_ETHER_CACHE_WRITEBACK\n\t\t\tIf this option is set, the driver enables cache flush.\n\n- TPM Support:\n\t\tCONFIG_TPM\n\t\tSupport TPM devices.\n\n\t\tCONFIG_TPM_TIS_I2C\n\t\tSupport for i2c bus TPM devices. Only one device\n\t\tper system is supported at this time.\n\n\t\t\tCONFIG_TPM_TIS_I2C_BUS_NUMBER\n\t\t\tDefine the the i2c bus number for the TPM device\n\n\t\t\tCONFIG_TPM_TIS_I2C_SLAVE_ADDRESS\n\t\t\tDefine the TPM's address on the i2c bus\n\n\t\t\tCONFIG_TPM_TIS_I2C_BURST_LIMITATION\n\t\t\tDefine the burst count bytes upper limit\n\n\t\tCONFIG_TPM_ATMEL_TWI\n\t\tSupport for Atmel TWI TPM device. Requires I2C support.\n\n\t\tCONFIG_TPM_TIS_LPC\n\t\tSupport for generic parallel port TPM devices. Only one device\n\t\tper system is supported at this time.\n\n\t\t\tCONFIG_TPM_TIS_BASE_ADDRESS\n\t\t\tBase address where the generic TPM device is mapped\n\t\t\tto. Contemporary x86 systems usually map it at\n\t\t\t0xfed40000.\n\n\t\tCONFIG_CMD_TPM\n\t\tAdd tpm monitor functions.\n\t\tRequires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also\n\t\tprovides monitor access to authorized functions.\n\n\t\tCONFIG_TPM\n\t\tDefine this to enable the TPM support library which provides\n\t\tfunctional interfaces to some TPM commands.\n\t\tRequires support for a TPM device.\n\n\t\tCONFIG_TPM_AUTH_SESSIONS\n\t\tDefine this to enable authorized functions in the TPM library.\n\t\tRequires CONFIG_TPM and CONFIG_SHA1.\n\n- USB Support:\n\t\tAt the moment only the UHCI host controller is\n\t\tsupported (PIP405, MIP405, MPC5200); define\n\t\tCONFIG_USB_UHCI to enable it.\n\t\tdefine CONFIG_USB_KEYBOARD to enable the USB Keyboard\n\t\tand define CONFIG_USB_STORAGE to enable the USB\n\t\tstorage devices.\n\t\tNote:\n\t\tSupported are USB Keyboards and USB Floppy drives\n\t\t(TEAC FD-05PUB).\n\t\tMPC5200 USB requires additional defines:\n\t\t\tCONFIG_USB_CLOCK\n\t\t\t\tfor 528 MHz Clock: 0x0001bbbb\n\t\t\tCONFIG_PSC3_USB\n\t\t\t\tfor USB on PSC3\n\t\t\tCONFIG_USB_CONFIG\n\t\t\t\tfor differential drivers: 0x00001000\n\t\t\t\tfor single ended drivers: 0x00005000\n\t\t\t\tfor differential drivers on PSC3: 0x00000100\n\t\t\t\tfor single ended drivers on PSC3: 0x00004100\n\t\t\tCONFIG_SYS_USB_EVENT_POLL\n\t\t\t\tMay be defined to allow interrupt polling\n\t\t\t\tinstead of using asynchronous interrupts\n\n\t\tCONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the\n\t\ttxfilltuning field in the EHCI controller on reset.\n\n- USB Device:\n\t\tDefine the below if you wish to use the USB console.\n\t\tOnce firmware is rebuilt from a serial console issue the\n\t\tcommand \"setenv stdin usbtty; setenv stdout usbtty\" and\n\t\tattach your USB cable. The Unix command \"dmesg\" should print\n\t\tit has found a new device. The environment variable usbtty\n\t\tcan be set to gserial or cdc_acm to enable your device to\n\t\tappear to a USB host as a Linux gserial device or a\n\t\tCommon Device Class Abstract Control Model serial device.\n\t\tIf you select usbtty = gserial you should be able to enumerate\n\t\ta Linux host by\n\t\t# modprobe usbserial vendor=0xVendorID product=0xProductID\n\t\telse if using cdc_acm, simply setting the environment\n\t\tvariable usbtty to be cdc_acm should suffice. The following\n\t\tmight be defined in YourBoardName.h\n\n\t\t\tCONFIG_USB_DEVICE\n\t\t\tDefine this to build a UDC device\n\n\t\t\tCONFIG_USB_TTY\n\t\t\tDefine this to have a tty type of device available to\n\t\t\ttalk to the UDC device\n\n\t\t\tCONFIG_USBD_HS\n\t\t\tDefine this to enable the high speed support for usb\n\t\t\tdevice and usbtty. If this feature is enabled, a routine\n\t\t\tint is_usbd_high_speed(void)\n\t\t\talso needs to be defined by the driver to dynamically poll\n\t\t\twhether the enumeration has succeded at high speed or full\n\t\t\tspeed.\n\n\t\t\tCONFIG_SYS_CONSOLE_IS_IN_ENV\n\t\t\tDefine this if you want stdin, stdout \u0026/or stderr to\n\t\t\tbe set to usbtty.\n\n\t\t\tmpc8xx:\n\t\t\t\tCONFIG_SYS_USB_EXTC_CLK 0xBLAH\n\t\t\t\tDerive USB clock from external clock \"blah\"\n\t\t\t\t- CONFIG_SYS_USB_EXTC_CLK 0x02\n\n\t\t\t\tCONFIG_SYS_USB_BRG_CLK 0xBLAH\n\t\t\t\tDerive USB clock from brgclk\n\t\t\t\t- CONFIG_SYS_USB_BRG_CLK 0x04\n\n\t\tIf you have a USB-IF assigned VendorID then you may wish to\n\t\tdefine your own vendor specific values either in BoardName.h\n\t\tor directly in usbd_vendor_info.h. If you don't define\n\t\tCONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,\n\t\tCONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot\n\t\tshould pretend to be a Linux device to it's target host.\n\n\t\t\tCONFIG_USBD_MANUFACTURER\n\t\t\tDefine this string as the name of your company for\n\t\t\t- CONFIG_USBD_MANUFACTURER \"my company\"\n\n\t\t\tCONFIG_USBD_PRODUCT_NAME\n\t\t\tDefine this string as the name of your product\n\t\t\t- CONFIG_USBD_PRODUCT_NAME \"acme usb device\"\n\n\t\t\tCONFIG_USBD_VENDORID\n\t\t\tDefine this as your assigned Vendor ID from the USB\n\t\t\tImplementors Forum. This *must* be a genuine Vendor ID\n\t\t\tto avoid polluting the USB namespace.\n\t\t\t- CONFIG_USBD_VENDORID 0xFFFF\n\n\t\t\tCONFIG_USBD_PRODUCTID\n\t\t\tDefine this as the unique Product ID\n\t\t\tfor your device\n\t\t\t- CONFIG_USBD_PRODUCTID 0xFFFF\n\n- ULPI Layer Support:\n\t\tThe ULPI (UTMI Low Pin (count) Interface) PHYs are supported via\n\t\tthe generic ULPI layer. The generic layer accesses the ULPI PHY\n\t\tvia the platform viewport, so you need both the genric layer and\n\t\tthe viewport enabled. Currently only Chipidea/ARC based\n\t\tviewport is supported.\n\t\tTo enable the ULPI layer support, define CONFIG_USB_ULPI and\n\t\tCONFIG_USB_ULPI_VIEWPORT in your board configuration file.\n\t\tIf your ULPI phy needs a different reference clock than the\n\t\tstandard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to\n\t\tthe appropriate value in Hz.\n\n- MMC Support:\n\t\tThe MMC controller on the Intel PXA is supported. To\n\t\tenable this define CONFIG_MMC. The MMC can be\n\t\taccessed from the boot prompt by mapping the device\n\t\tto physical memory similar to flash. Command line is\n\t\tenabled with CONFIG_CMD_MMC. The MMC driver also works with\n\t\tthe FAT fs. This is enabled with CONFIG_CMD_FAT.\n\n\t\tCONFIG_SH_MMCIF\n\t\tSupport for Renesas on-chip MMCIF controller\n\n\t\t\tCONFIG_SH_MMCIF_ADDR\n\t\t\tDefine the base address of MMCIF registers\n\n\t\t\tCONFIG_SH_MMCIF_CLK\n\t\t\tDefine the clock frequency for MMCIF\n\n\t\tCONFIG_GENERIC_MMC\n\t\tEnable the generic MMC driver\n\n\t\tCONFIG_SUPPORT_EMMC_BOOT\n\t\tEnable some additional features of the eMMC boot partitions.\n\n\t\tCONFIG_SUPPORT_EMMC_RPMB\n\t\tEnable the commands for reading, writing and programming the\n\t\tkey for the Replay Protection Memory Block partition in eMMC.\n\n- USB Device Firmware Update (DFU) class support:\n\t\tCONFIG_DFU_FUNCTION\n\t\tThis enables the USB portion of the DFU USB class\n\n\t\tCONFIG_CMD_DFU\n\t\tThis enables the command \"dfu\" which is used to have\n\t\tU-Boot create a DFU class device via USB. This command\n\t\trequires that the \"dfu_alt_info\" environment variable be\n\t\tset and define the alt settings to expose to the host.\n\n\t\tCONFIG_DFU_MMC\n\t\tThis enables support for exposing (e)MMC devices via DFU.\n\n\t\tCONFIG_DFU_NAND\n\t\tThis enables support for exposing NAND devices via DFU.\n\n\t\tCONFIG_DFU_RAM\n\t\tThis enables support for exposing RAM via DFU.\n\t\tNote: DFU spec refer to non-volatile memory usage, but\n\t\tallow usages beyond the scope of spec - here RAM usage,\n\t\tone that would help mostly the developer.\n\n\t\tCONFIG_SYS_DFU_DATA_BUF_SIZE\n\t\tDfu transfer uses a buffer before writing data to the\n\t\traw storage device. Make the size (in bytes) of this buffer\n\t\tconfigurable. The size of this buffer is also configurable\n\t\tthrough the \"dfu_bufsiz\" environment variable.\n\n\t\tCONFIG_SYS_DFU_MAX_FILE_SIZE\n\t\tWhen updating files rather than the raw storage device,\n\t\twe use a static buffer to copy the file into and then write\n\t\tthe buffer once we've been given the whole file. Define\n\t\tthis to the maximum filesize (in bytes) for the buffer.\n\t\tDefault is 4 MiB if undefined.\n\n\t\tDFU_DEFAULT_POLL_TIMEOUT\n\t\tPoll timeout [ms], is the timeout a device can send to the\n\t\thost. The host must wait for this timeout before sending\n\t\ta subsequent DFU_GET_STATUS request to the device.\n\n\t\tDFU_MANIFEST_POLL_TIMEOUT\n\t\tPoll timeout [ms], which the device sends to the host when\n\t\tentering dfuMANIFEST state. Host waits this timeout, before\n\t\tsending again an USB request to the device.\n\n- USB Device Android Fastboot support:\n\t\tCONFIG_CMD_FASTBOOT\n\t\tThis enables the command \"fastboot\" which enables the Android\n\t\tfastboot mode for the platform's USB device. Fastboot is a USB\n\t\tprotocol for downloading images, flashing and device control\n\t\tused on Android devices.\n\t\tSee doc/README.android-fastboot for more information.\n\n\t\tCONFIG_ANDROID_BOOT_IMAGE\n\t\tThis enables support for booting images which use the Android\n\t\timage format header.\n\n\t\tCONFIG_USB_FASTBOOT_BUF_ADDR\n\t\tThe fastboot protocol requires a large memory buffer for\n\t\tdownloads. Define this to the starting RAM address to use for\n\t\tdownloaded images.\n\n\t\tCONFIG_USB_FASTBOOT_BUF_SIZE\n\t\tThe fastboot protocol requires a large memory buffer for\n\t\tdownloads. This buffer should be as large as possible for a\n\t\tplatform. Define this to the size available RAM for fastboot.\n\n- Journaling Flash filesystem support:\n\t\tCONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,\n\t\tCONFIG_JFFS2_NAND_DEV\n\t\tDefine these for a default partition on a NAND device\n\n\t\tCONFIG_SYS_JFFS2_FIRST_SECTOR,\n\t\tCONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS\n\t\tDefine these for a default partition on a NOR device\n\n\t\tCONFIG_SYS_JFFS_CUSTOM_PART\n\t\tDefine this to create an own partition. You have to provide a\n\t\tfunction struct part_info* jffs2_part_info(int part_num)\n\n\t\tIf you define only one JFFS2 partition you may also want to\n\t\t#define CONFIG_SYS_JFFS_SINGLE_PART\t1\n\t\tto disable the command chpart. This is the default when you\n\t\thave not defined a custom partition\n\n- FAT(File Allocation Table) filesystem write function support:\n\t\tCONFIG_FAT_WRITE\n\n\t\tDefine this to enable support for saving memory data as a\n\t\tfile in FAT formatted partition.\n\n\t\tThis will also enable the command \"fatwrite\" enabling the\n\t\tuser to write files to FAT.\n\nCBFS (Coreboot Filesystem) support\n\t\tCONFIG_CMD_CBFS\n\n\t\tDefine this to enable support for reading from a Coreboot\n\t\tfilesystem. Available commands are cbfsinit, cbfsinfo, cbfsls\n\t\tand cbfsload.\n\n- FAT(File Allocation Table) filesystem cluster size:\n\t\tCONFIG_FS_FAT_MAX_CLUSTSIZE\n\n\t\tDefine the max cluster size for fat operations else\n\t\ta default value of 65536 will be defined.\n\n- Keyboard Support:\n\t\tCONFIG_ISA_KEYBOARD\n\n\t\tDefine this to enable standard (PC-Style) keyboard\n\t\tsupport\n\n\t\tCONFIG_I8042_KBD\n\t\tStandard PC keyboard driver with US (is default) and\n\t\tGERMAN key layout (switch via environment 'keymap=de') support.\n\t\tExport function i8042_kbd_init, i8042_tstc and i8042_getc\n\t\tfor cfb_console. Supports cursor blinking.\n\n\t\tCONFIG_CROS_EC_KEYB\n\t\tEnables a Chrome OS keyboard using the CROS_EC interface.\n\t\tThis uses CROS_EC to communicate with a second microcontroller\n\t\twhich provides key scans on request.\n\n- Video support:\n\t\tCONFIG_VIDEO\n\n\t\tDefine this to enable video support (for output to\n\t\tvideo).\n\n\t\tCONFIG_VIDEO_CT69000\n\n\t\tEnable Chips \u0026 Technologies 69000 Video chip\n\n\t\tCONFIG_VIDEO_SMI_LYNXEM\n\t\tEnable Silicon Motion SMI 712/710/810 Video chip. The\n\t\tvideo output is selected via environment 'videoout'\n\t\t(1 = LCD and 2 = CRT). If videoout is undefined, CRT is\n\t\tassumed.\n\n\t\tFor the CT69000 and SMI_LYNXEM drivers, videomode is\n\t\tselected via environment 'videomode'. Two different ways\n\t\tare possible:\n\t\t- \"videomode=num\" 'num' is a standard LiLo mode numbers.\n\t\tFollowing standard modes are supported\t(* is default):\n\n\t\t Colors\t640x480 800x600 1024x768 1152x864 1280x1024\n\t\t-------------+---------------------------------------------\n\t\t 8 bits |\t0x301*\t0x303\t 0x305\t 0x161\t 0x307\n\t\t 15 bits |\t0x310\t0x313\t 0x316\t 0x162\t 0x319\n\t\t 16 bits |\t0x311\t0x314\t 0x317\t 0x163\t 0x31A\n\t\t 24 bits |\t0x312\t0x315\t 0x318\t ?\t 0x31B\n\t\t-------------+---------------------------------------------\n\t\t(i.e. setenv videomode 317; saveenv; reset;)\n\n\t\t- \"videomode=bootargs\" all the video parameters are parsed\n\t\tfrom the bootargs. (See drivers/video/videomodes.c)\n\n\n\t\tCONFIG_VIDEO_SED13806\n\t\tEnable Epson SED13806 driver. This driver supports 8bpp\n\t\tand 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP\n\t\tor CONFIG_VIDEO_SED13806_16BPP\n\n\t\tCONFIG_FSL_DIU_FB\n\t\tEnable the Freescale DIU video driver.\tReference boards for\n\t\tSOCs that have a DIU should define this macro to enable DIU\n\t\tsupport, and should also define these other macros:\n\n\t\t\tCONFIG_SYS_DIU_ADDR\n\t\t\tCONFIG_VIDEO\n\t\t\tCONFIG_CMD_BMP\n\t\t\tCONFIG_CFB_CONSOLE\n\t\t\tCONFIG_VIDEO_SW_CURSOR\n\t\t\tCONFIG_VGA_AS_SINGLE_DEVICE\n\t\t\tCONFIG_VIDEO_LOGO\n\t\t\tCONFIG_VIDEO_BMP_LOGO\n\n\t\tThe DIU driver will look for the 'video-mode' environment\n\t\tvariable, and if defined, enable the DIU as a console during\n\t\tboot. See the documentation file README.video for a\n\t\tdescription of this variable.\n\n\t\tCONFIG_VIDEO_VGA\n\n\t\tEnable the VGA video / BIOS for x86. The alternative if you\n\t\tare using coreboot is to use the coreboot frame buffer\n\t\tdriver.\n\n\n- Keyboard Support:\n\t\tCONFIG_KEYBOARD\n\n\t\tDefine this to enable a custom keyboard support.\n\t\tThis simply calls drv_keyboard_init() which must be\n\t\tdefined in your board-specific files.\n\t\tThe only board using this so far is RBC823.\n\n- LCD Support:\tCONFIG_LCD\n\n\t\tDefine this to enable LCD support (for output to LCD\n\t\tdisplay); also select one of the supported displays\n\t\tby defining one of these:\n\n\t\tCONFIG_ATMEL_LCD:\n\n\t\t\tHITACHI TX09D70VM1CCA, 3.5\", 240x320.\n\n\t\tCONFIG_NEC_NL6448AC33:\n\n\t\t\tNEC NL6448AC33-18. Active, color, single scan.\n\n\t\tCONFIG_NEC_NL6448BC20\n\n\t\t\tNEC NL6448BC20-08. 6.5\", 640x480.\n\t\t\tActive, color, single scan.\n\n\t\tCONFIG_NEC_NL6448BC33_54\n\n\t\t\tNEC NL6448BC33-54. 10.4\", 640x480.\n\t\t\tActive, color, single scan.\n\n\t\tCONFIG_SHARP_16x9\n\n\t\t\tSharp 320x240. Active, color, single scan.\n\t\t\tIt isn't 16x9, and I am not sure what it is.\n\n\t\tCONFIG_SHARP_LQ64D341\n\n\t\t\tSharp LQ64D341 display, 640x480.\n\t\t\tActive, color, single scan.\n\n\t\tCONFIG_HLD1045\n\n\t\t\tHLD1045 display, 640x480.\n\t\t\tActive, color, single scan.\n\n\t\tCONFIG_OPTREX_BW\n\n\t\t\tOptrex\t CBL50840-2 NF-FW 99 22 M5\n\t\t\tor\n\t\t\tHitachi\t LMG6912RPFC-00T\n\t\t\tor\n\t\t\tHitachi\t SP14Q002\n\n\t\t\t320x240. Black \u0026 white.\n\n\t\tNormally display is black on white background; define\n\t\tCONFIG_SYS_WHITE_ON_BLACK to get it inverted.\n\n\t\tCONFIG_LCD_ALIGNMENT\n\n\t\tNormally the LCD is page-aligned (tyically 4KB). If this is\n\t\tdefined then the LCD will be aligned to this value instead.\n\t\tFor ARM it is sometimes useful to use MMU_SECTION_SIZE\n\t\there, since it is cheaper to change data cache settings on\n\t\ta per-section basis.\n\n\t\tCONFIG_CONSOLE_SCROLL_LINES\n\n\t\tWhen the console need to be scrolled, this is the number of\n\t\tlines to scroll by. It defaults to 1. Increasing this makes\n\t\tthe console jump but can help speed up operation when scrolling\n\t\tis slow.\n\n\t\tCONFIG_LCD_BMP_RLE8\n\n\t\tSupport drawing of RLE8-compressed bitmaps on the LCD.\n\n\t\tCONFIG_I2C_EDID\n\n\t\tEnables an 'i2c edid' command which can read EDID\n\t\tinformation over I2C from an attached LCD display.\n\n- Splash Screen Support: CONFIG_SPLASH_SCREEN\n\n\t\tIf this option is set, the environment is checked for\n\t\ta variable \"splashimage\". If found, the usual display\n\t\tof logo, copyright and system information on the LCD\n\t\tis suppressed and the BMP image at the address\n\t\tspecified in \"splashimage\" is loaded instead. The\n\t\tconsole is redirected to the \"nulldev\", too. This\n\t\tallows for a \"silent\" boot where a splash screen is\n\t\tloaded very quickly after power-on.\n\n\t\tCONFIG_SPLASHIMAGE_GUARD\n\n\t\tIf this option is set, then U-Boot will prevent the environment\n\t\tvariable \"splashimage\" from being set to a problematic address\n\t\t(see README.displaying-bmps).\n\t\tThis option is useful for targets where, due to alignment\n\t\trestrictions, an improperly aligned BMP image will cause a data\n\t\tabort. If you think you will not have problems with unaligned\n\t\taccesses (for example because your toolchain prevents them)\n\t\tthere is no need to set this option.\n\n\t\tCONFIG_SPLASH_SCREEN_ALIGN\n\n\t\tIf this option is set the splash image can be freely positioned\n\t\ton the screen. Environment variable \"splashpos\" specifies the\n\t\tposition as \"x,y\". If a positive number is given it is used as\n\t\tnumber of pixel from left/top. If a negative number is given it\n\t\tis used as number of pixel from right/bottom. You can also\n\t\tspecify 'm' for centering the image.\n\n\t\tExample:\n\t\tsetenv splashpos m,m\n\t\t\t=\u003e image at center of screen\n\n\t\tsetenv splashpos 30,20\n\t\t\t=\u003e image at x = 30 and y = 20\n\n\t\tsetenv splashpos -10,m\n\t\t\t=\u003e vertically centered image\n\t\t\t at x = dspWidth - bmpWidth - 9\n\n- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP\n\n\t\tIf this option is set, additionally to standard BMP\n\t\timages, gzipped BMP images can be displayed via the\n\t\tsplashscreen support or the bmp command.\n\n- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8\n\n\t\tIf this option is set, 8-bit RLE compressed BMP images\n\t\tcan be displayed via the splashscreen support or the\n\t\tbmp command.\n\n- Do compresssing for memory range:\n\t\tCONFIG_CMD_ZIP\n\n\t\tIf this option is set, it would use zlib deflate method\n\t\tto compress the specified memory at its best effort.\n\n- Compression support:\n\t\tCONFIG_GZIP\n\n\t\tEnabled by default to support gzip compressed images.\n\n\t\tCONFIG_BZIP2\n\n\t\tIf this option is set, support for bzip2 compressed\n\t\timages is included. If not, only uncompressed and gzip\n\t\tcompressed images are supported.\n\n\t\tNOTE: the bzip2 algorithm requires a lot of RAM, so\n\t\tthe malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should\n\t\tbe at least 4MB.\n\n\t\tCONFIG_LZMA\n\n\t\tIf this option is set, support for lzma compressed\n\t\timages is included.\n\n\t\tNote: The LZMA algorithm adds between 2 and 4KB of code and it\n\t\trequires an amount of dynamic memory that is given by the\n\t\tformula:\n\n\t\t\t(1846 + 768 \u003c\u003c (lc + lp)) * sizeof(uint16)\n\n\t\tWhere lc and lp stand for, respectively, Literal context bits\n\t\tand Literal pos bits.\n\n\t\tThis value is upper-bounded by 14MB in the worst case. Anyway,\n\t\tfor a ~4MB large kernel image, we have lc=3 and lp=0 for a\n\t\ttotal amount of (1846 + 768 \u003c\u003c (3 + 0)) * 2 = ~41KB... that is\n\t\ta very small buffer.\n\n\t\tUse the lzmainfo tool to determinate the lc and lp values and\n\t\tthen calculate the amount of needed dynamic memory (ensuring\n\t\tthe appropriate CONFIG_SYS_MALLOC_LEN value).\n\n\t\tCONFIG_LZO\n\n\t\tIf this option is set, support for LZO compressed images\n\t\tis included.\n\n- MII/PHY support:\n\t\tCONFIG_PHY_ADDR\n\n\t\tThe address of PHY on MII bus.\n\n\t\tCONFIG_PHY_CLOCK_FREQ (ppc4xx)\n\n\t\tThe clock frequency of the MII bus\n\n\t\tCONFIG_PHY_GIGE\n\n\t\tIf this option is set, support for speed/duplex\n\t\tdetection of gigabit PHY is included.\n\n\t\tCONFIG_PHY_RESET_DELAY\n\n\t\tSome PHY like Intel LXT971A need extra delay after\n\t\treset before any MII register access is possible.\n\t\tFor such PHY, set this option to the usec delay\n\t\trequired. (minimum 300usec for LXT971A)\n\n\t\tCONFIG_PHY_CMD_DELAY (ppc4xx)\n\n\t\tSome PHY like Intel LXT971A need extra delay after\n\t\tcommand issued before MII status register can be read\n\n- Ethernet address:\n\t\tCONFIG_ETHADDR\n\t\tCONFIG_ETH1ADDR\n\t\tCONFIG_ETH2ADDR\n\t\tCONFIG_ETH3ADDR\n\t\tCONFIG_ETH4ADDR\n\t\tCONFIG_ETH5ADDR\n\n\t\tDefine a default value for Ethernet address to use\n\t\tfor the respective Ethernet interface, in case this\n\t\tis not determined automatically.\n\n- IP address:\n\t\tCONFIG_IPADDR\n\n\t\tDefine a default value for the IP address to use for\n\t\tthe default Ethernet interface, in case this is not\n\t\tdetermined through e.g. bootp.\n\t\t(Environment variable \"ipaddr\")\n\n- Server IP address:\n\t\tCONFIG_SERVERIP\n\n\t\tDefines a default value for the IP address of a TFTP\n\t\tserver to contact when using the \"tftboot\" command.\n\t\t(Environment variable \"serverip\")\n\n\t\tCONFIG_KEEP_SERVERADDR\n\n\t\tKeeps the server's MAC address, in the env 'serveraddr'\n\t\tfor passing to bootargs (like Linux's netconsole option)\n\n- Gateway IP address:\n\t\tCONFIG_GATEWAYIP\n\n\t\tDefines a default value for the IP address of the\n\t\tdefault router where packets to other networks are\n\t\tsent to.\n\t\t(Environment variable \"gatewayip\")\n\n- Subnet mask:\n\t\tCONFIG_NETMASK\n\n\t\tDefines a default value for the subnet mask (or\n\t\trouting prefix) which is used to determine if an IP\n\t\taddress belongs to the local subnet or needs to be\n\t\tforwarded through a router.\n\t\t(Environment variable \"netmask\")\n\n- Multicast TFTP Mode:\n\t\tCONFIG_MCAST_TFTP\n\n\t\tDefines whether you want to support multicast TFTP as per\n\t\trfc-2090; for example to work with atftp. Lets lots of targets\n\t\ttftp down the same boot image concurrently. Note: the Ethernet\n\t\tdriver in use must provide a function: mcast() to join/leave a\n\t\tmulticast group.\n\n- BOOTP Recovery Mode:\n\t\tCONFIG_BOOTP_RANDOM_DELAY\n\n\t\tIf you have many targets in a network that try to\n\t\tboot using BOOTP, you may want to avoid that all\n\t\tsystems send out BOOTP requests at precisely the same\n\t\tmoment (which would happen for instance at recovery\n\t\tfrom a power failure, when all systems will try to\n\t\tboot, thus flooding the BOOTP server. Defining\n\t\tCONFIG_BOOTP_RANDOM_DELAY causes a random delay to be\n\t\tinserted before sending out BOOTP requests. The\n\t\tfollowing delays are inserted then:\n\n\t\t1st BOOTP request:\tdelay 0 ... 1 sec\n\t\t2nd BOOTP request:\tdelay 0 ... 2 sec\n\t\t3rd BOOTP request:\tdelay 0 ... 4 sec\n\t\t4th and following\n\t\tBOOTP requests:\t\tdelay 0 ... 8 sec\n\n- DHCP Advanced Options:\n\t\tYou can fine tune the DHCP functionality by defining\n\t\tCONFIG_BOOTP_* symbols:\n\n\t\tCONFIG_BOOTP_SUBNETMASK\n\t\tCONFIG_BOOTP_GATEWAY\n\t\tCONFIG_BOOTP_HOSTNAME\n\t\tCONFIG_BOOTP_NISDOMAIN\n\t\tCONFIG_BOOTP_BOOTPATH\n\t\tCONFIG_BOOTP_BOOTFILESIZE\n\t\tCONFIG_BOOTP_DNS\n\t\tCONFIG_BOOTP_DNS2\n\t\tCONFIG_BOOTP_SEND_HOSTNAME\n\t\tCONFIG_BOOTP_NTPSERVER\n\t\tCONFIG_BOOTP_TIMEOFFSET\n\t\tCONFIG_BOOTP_VENDOREX\n\t\tCONFIG_BOOTP_MAY_FAIL\n\n\t\tCONFIG_BOOTP_SERVERIP - TFTP server will be the serverip\n\t\tenvironment variable, not the BOOTP server.\n\n\t\tCONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found\n\t\tafter the configured retry count, the call will fail\n\t\tinstead of starting over. This can be used to fail over\n\t\tto Link-local IP address configuration if the DHCP server\n\t\tis not available.\n\n\t\tCONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS\n\t\tserverip from a DHCP server, it is possible that more\n\t\tthan one DNS serverip is offered to the client.\n\t\tIf CONFIG_BOOTP_DNS2 is enabled, the secondary DNS\n\t\tserverip will be stored in the additional environment\n\t\tvariable \"dnsip2\". The first DNS serverip is always\n\t\tstored in the variable \"dnsip\", when CONFIG_BOOTP_DNS\n\t\tis defined.\n\n\t\tCONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable\n\t\tto do a dynamic update of a DNS server. To do this, they\n\t\tneed the hostname of the DHCP requester.\n\t\tIf CONFIG_BOOTP_SEND_HOSTNAME is defined, the content\n\t\tof the \"hostname\" environment variable is passed as\n\t\toption 12 to the DHCP server.\n\n\t\tCONFIG_BOOTP_DHCP_REQUEST_DELAY\n\n\t\tA 32bit value in microseconds for a delay between\n\t\treceiving a \"DHCP Offer\" and sending the \"DHCP Request\".\n\t\tThis fixes a problem with certain DHCP servers that don't\n\t\trespond 100% of the time to a \"DHCP request\". E.g. On an\n\t\tAT91RM9200 processor running at 180MHz, this delay needed\n\t\tto be *at least* 15,000 usec before a Windows Server 2003\n\t\tDHCP server would reply 100% of the time. I recommend at\n\t\tleast 50,000 usec to be safe. The alternative is to hope\n\t\tthat one of the retries will be successful but note that\n\t\tthe DHCP timeout and retry process takes a longer than\n\t\tthis delay.\n\n - Link-local IP address negotiation:\n\t\tNegotiate with other link-local clients on the local network\n\t\tfor an address that doesn't require explicit configuration.\n\t\tThis is especially useful if a DHCP server cannot be guaranteed\n\t\tto exist in all environments that the device must operate.\n\n\t\tSee doc/README.link-local for more information.\n\n - CDP Options:\n\t\tCONFIG_CDP_DEVICE_ID\n\n\t\tThe device id used in CDP trigger frames.\n\n\t\tCONFIG_CDP_DEVICE_ID_PREFIX\n\n\t\tA two character string which is prefixed to the MAC address\n\t\tof the device.\n\n\t\tCONFIG_CDP_PORT_ID\n\n\t\tA printf format string which contains the ascii name of\n\t\tthe port. Normally is set to \"eth%d\" which sets\n\t\teth0 for the first Ethernet, eth1 for the second etc.\n\n\t\tCONFIG_CDP_CAPABILITIES\n\n\t\tA 32bit integer which indicates the device capabilities;\n\t\t0x00000010 for a normal host which does not forwards.\n\n\t\tCONFIG_CDP_VERSION\n\n\t\tAn ascii string containing the version of the software.\n\n\t\tCONFIG_CDP_PLATFORM\n\n\t\tAn ascii string containing the name of the platform.\n\n\t\tCONFIG_CDP_TRIGGER\n\n\t\tA 32bit integer sent on the trigger.\n\n\t\tCONFIG_CDP_POWER_CONSUMPTION\n\n\t\tA 16bit integer containing the power consumption of the\n\t\tdevice in .1 of milliwatts.\n\n\t\tCONFIG_CDP_APPLIANCE_VLAN_TYPE\n\n\t\tA byte containing the id of the VLAN.\n\n- Status LED:\tCONFIG_STATUS_LED\n\n\t\tSeveral configurations allow to display the current\n\t\tstatus using a LED. For instance, the LED will blink\n\t\tfast while running U-Boot code, stop blinking as\n\t\tsoon as a reply to a BOOTP request was received, and\n\t\tstart blinking slow once the Linux kernel is running\n\t\t(supported by a status LED driver in the Linux\n\t\tkernel). Defining CONFIG_STATUS_LED enables this\n\t\tfeature in U-Boot.\n\n\t\tAdditional options:\n\n\t\tCONFIG_GPIO_LED\n\t\tThe status LED can be connected to a GPIO pin.\n\t\tIn such cases, the gpio_led driver can be used as a\n\t\tstatus LED backend implementation. Define CONFIG_GPIO_LED\n\t\tto include the gpio_led driver in the U-Boot binary.\n\n\t\tCONFIG_GPIO_LED_INVERTED_TABLE\n\t\tSome GPIO connected LEDs may have inverted polarity in which\n\t\tcase the GPIO high value corresponds to LED off state and\n\t\tGPIO low value corresponds to LED on state.\n\t\tIn such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined\n\t\twith a list of GPIO LEDs that have inverted polarity.\n\n- CAN Support:\tCONFIG_CAN_DRIVER\n\n\t\tDefining CONFIG_CAN_DRIVER enables CAN driver support\n\t\ton those systems that support this (optional)\n\t\tfeature, like the TQM8xxL modules.\n\n- I2C Support:\tCONFIG_SYS_I2C\n\n\t\tThis enable the NEW i2c subsystem, and will allow you to use\n\t\ti2c commands at the u-boot command line (as long as you set\n\t\tCONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c\n\t\tbased realtime clock chips or other i2c devices. See\n\t\tcommon/cmd_i2c.c for a description of the command line\n\t\tinterface.\n\n\t\tported i2c driver to the new framework:\n\t\t- drivers/i2c/soft_i2c.c:\n\t\t - activate first bus with CONFIG_SYS_I2C_SOFT define\n\t\t CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE\n\t\t for defining speed and slave address\n\t\t - activate second bus with I2C_SOFT_DECLARATIONS2 define\n\t\t CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2\n\t\t for defining speed and slave address\n\t\t - activate third bus with I2C_SOFT_DECLARATIONS3 define\n\t\t CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3\n\t\t for defining speed and slave address\n\t\t - activate fourth bus with I2C_SOFT_DECLARATIONS4 define\n\t\t CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4\n\t\t for defining speed and slave address\n\n\t\t- drivers/i2c/fsl_i2c.c:\n\t\t - activate i2c driver with CONFIG_SYS_I2C_FSL\n\t\t define CONFIG_SYS_FSL_I2C_OFFSET for setting the register\n\t\t offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and\n\t\t CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first\n\t\t bus.\n\t\t - If your board supports a second fsl i2c bus, define\n\t\t CONFIG_SYS_FSL_I2C2_OFFSET for the register offset\n\t\t CONFIG_SYS_FSL_I2C2_SPEED for the speed and\n\t\t CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the\n\t\t second bus.\n\n\t\t- drivers/i2c/tegra_i2c.c:\n\t\t - activate this driver with CONFIG_SYS_I2C_TEGRA\n\t\t - This driver adds 4 i2c buses with a fix speed from\n\t\t 100000 and the slave addr 0!\n\n\t\t- drivers/i2c/ppc4xx_i2c.c\n\t\t - activate this driver with CONFIG_SYS_I2C_PPC4XX\n\t\t - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0\n\t\t - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1\n\n\t\t- drivers/i2c/i2c_mxc.c\n\t\t - activate this driver with CONFIG_SYS_I2C_MXC\n\t\t - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED\n\t\t - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE\n\t\t - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED\n\t\t - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE\n\t\t - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED\n\t\t - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE\n\t\tIf thoses defines are not set, default value is 100000\n\t\tfor speed, and 0 for slave.\n\n\t\t- drivers/i2c/rcar_i2c.c:\n\t\t - activate this driver with CONFIG_SYS_I2C_RCAR\n\t\t - This driver adds 4 i2c buses\n\n\t\t - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0\n\t\t - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0\n\t\t - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1\n\t\t - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1\n\t\t - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2\n\t\t - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2\n\t\t - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3\n\t\t - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3\n\t\t - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses\n\n\t\t- drivers/i2c/sh_i2c.c:\n\t\t - activate this driver with CONFIG_SYS_I2C_SH\n\t\t - This driver adds from 2 to 5 i2c buses\n\n\t\t - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0\n\t\t - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0\n\t\t - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1\n\t\t - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1\n\t\t - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2\n\t\t - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2\n\t\t - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3\n\t\t - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3\n\t\t - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4\n\t\t - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4\n\t\t - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5\n\t\t - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5\n\t\t - CONFIF_SYS_I2C_SH_NUM_CONTROLLERS for nummber of i2c buses\n\n\t\t- drivers/i2c/omap24xx_i2c.c\n\t\t - activate this driver with CONFIG_SYS_I2C_OMAP24XX\n\t\t - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0\n\t\t - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0\n\t\t - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1\n\t\t - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1\n\t\t - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2\n\t\t - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2\n\t\t - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3\n\t\t - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3\n\t\t - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4\n\t\t - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4\n\n\t\t- drivers/i2c/zynq_i2c.c\n\t\t - activate this driver with CONFIG_SYS_I2C_ZYNQ\n\t\t - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting\n\t\t - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr\n\n\t\t- drivers/i2c/s3c24x0_i2c.c:\n\t\t - activate this driver with CONFIG_SYS_I2C_S3C24X0\n\t\t - This driver adds i2c buses (11 for Exynos5250, Exynos5420\n\t\t 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)\n\t\t with a fix speed from 100000 and the slave addr 0!\n\n\t\t- drivers/i2c/ihs_i2c.c\n\t\t - activate this driver with CONFIG_SYS_I2C_IHS\n\t\t - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0\n\t\t - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0\n\t\t - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0\n\t\t - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1\n\t\t - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1\n\t\t - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1\n\t\t - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2\n\t\t - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2\n\t\t - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2\n\t\t - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3\n\t\t - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3\n\t\t - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3\n\n\t\tadditional defines:\n\n\t\tCONFIG_SYS_NUM_I2C_BUSES\n\t\tHold the number of i2c busses you want to use. If you\n\t\tdon't use/have i2c muxes on your i2c bus, this\n\t\tis equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can\n\t\tomit this define.\n\n\t\tCONFIG_SYS_I2C_DIRECT_BUS\n\t\tdefine this, if you don't use i2c muxes on your hardware.\n\t\tif CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can\n\t\tomit this define.\n\n\t\tCONFIG_SYS_I2C_MAX_HOPS\n\t\tdefine how many muxes are maximal consecutively connected\n\t\ton one i2c bus. If you not use i2c muxes, omit this\n\t\tdefine.\n\n\t\tCONFIG_SYS_I2C_BUSES\n\t\thold a list of busses you want to use, only used if\n\t\tCONFIG_SYS_I2C_DIRECT_BUS is not defined, for example\n\t\ta board with CONFIG_SYS_I2C_MAX_HOPS = 1 and\n\t\tCONFIG_SYS_NUM_I2C_BUSES = 9:\n\n\t\t CONFIG_SYS_I2C_BUSES\t{{0, {I2C_NULL_HOP}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \\\n\t\t\t\t\t{0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \\\n\t\t\t\t\t{1, {I2C_NULL_HOP}}, \\\n\t\t\t\t\t{1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \\\n\t\t\t\t\t{1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \\\n\t\t\t\t\t}\n\n\t\twhich defines\n\t\t\tbus 0 on adapter 0 without a mux\n\t\t\tbus 1 on adapter 0 with a PCA9547 on address 0x70 port 1\n\t\t\tbus 2 on adapter 0 with a PCA9547 on address 0x70 port 2\n\t\t\tbus 3 on adapter 0 with a PCA9547 on address 0x70 port 3\n\t\t\tbus 4 on adapter 0 with a PCA9547 on address 0x70 port 4\n\t\t\tbus 5 on adapter 0 with a PCA9547 on address 0x70 port 5\n\t\t\tbus 6 on adapter 1 without a mux\n\t\t\tbus 7 on adapter 1 with a PCA9544 on address 0x72 port 1\n\t\t\tbus 8 on adapter 1 with a PCA9544 on address 0x72 port 2\n\n\t\tIf you do not have i2c muxes on your board, omit this define.\n\n- Legacy I2C Support:\tCONFIG_HARD_I2C\n\n\t\tNOTE: It is intended to move drivers to CONFIG_SYS_I2C which\n\t\tprovides the following compelling advantages:\n\n\t\t- more than one i2c adapter is usable\n\t\t- approved multibus support\n\t\t- better i2c mux support\n\n\t\t** Please consider updating your I2C driver now. **\n\n\t\tThese enable legacy I2C serial bus commands. Defining\n\t\tCONFIG_HARD_I2C will include the appropriate I2C driver\n\t\tfor the selected CPU.\n\n\t\tThis will allow you to use i2c commands at the u-boot\n\t\tcommand line (as long as you set CONFIG_CMD_I2C in\n\t\tCONFIG_COMMANDS) and communicate with i2c based realtime\n\t\tclock chips. See common/cmd_i2c.c for a description of the\n\t\tcommand line interface.\n\n\t\tCONFIG_HARD_I2C selects a hardware I2C controller.\n\n\t\tThere are several other quantities that must also be\n\t\tdefined when you define CONFIG_HARD_I2C.\n\n\t\tIn both cases you will need to define CONFIG_SYS_I2C_SPEED\n\t\tto be the frequency (in Hz) at which you wish your i2c bus\n\t\tto run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie\n\t\tthe CPU's i2c node address).\n\n\t\tNow, the u-boot i2c code for the mpc8xx\n\t\t(arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node\n\t\tand so its address should therefore be cleared to 0 (See,\n\t\teg, MPC823e User's Manual p.16-473). So, set\n\t\tCONFIG_SYS_I2C_SLAVE to 0.\n\n\t\tCONFIG_SYS_I2C_INIT_MPC5XXX\n\n\t\tWhen a board is reset during an i2c bus transfer\n\t\tchips might think that the current transfer is still\n\t\tin progress. Reset the slave devices by sending start\n\t\tcommands until the slave device responds.\n\n\t\tThat's all that's required for CONFIG_HARD_I2C.\n\n\t\tIf you use the software i2c interface (CONFIG_SYS_I2C_SOFT)\n\t\tthen the following macros need to be defined (examples are\n\t\tfrom include/configs/lwmon.h):\n\n\t\tI2C_INIT\n\n\t\t(Optional). Any commands necessary to enable the I2C\n\t\tcontroller or configure ports.\n\n\t\teg: #define I2C_INIT (immr-\u003eim_cpm.cp_pbdir |=\tPB_SCL)\n\n\t\tI2C_PORT\n\n\t\t(Only for MPC8260 CPU). The I/O port to use (the code\n\t\tassumes both bits are on the same port). Valid values\n\t\tare 0..3 for ports A..D.\n\n\t\tI2C_ACTIVE\n\n\t\tThe code necessary to make the I2C data line active\n\t\t(driven). If the data line is open collector, this\n\t\tdefine can be null.\n\n\t\teg: #define I2C_ACTIVE (immr-\u003eim_cpm.cp_pbdir |= PB_SDA)\n\n\t\tI2C_TRISTATE\n\n\t\tThe code necessary to make the I2C data line tri-stated\n\t\t(inactive). If the data line is open collector, this\n\t\tdefine can be null.\n\n\t\teg: #define I2C_TRISTATE (immr-\u003eim_cpm.cp_pbdir \u0026= ~PB_SDA)\n\n\t\tI2C_READ\n\n\t\tCode that returns true if the I2C data line is high,\n\t\tfalse if it is low.\n\n\t\teg: #define I2C_READ ((immr-\u003eim_cpm.cp_pbdat \u0026 PB_SDA) != 0)\n\n\t\tI2C_SDA(bit)\n\n\t\tIf \u003cbit\u003e is true, sets the I2C data line high. If it\n\t\tis false, it clears it (low).\n\n\t\teg: #define I2C_SDA(bit) \\\n\t\t\tif(bit) immr-\u003eim_cpm.cp_pbdat |= PB_SDA; \\\n\t\t\telse\timmr-\u003eim_cpm.cp_pbdat \u0026= ~PB_SDA\n\n\t\tI2C_SCL(bit)\n\n\t\tIf \u003cbit\u003e is true, sets the I2C clock line high. If it\n\t\tis false, it clears it (low).\n\n\t\teg: #define I2C_SCL(bit) \\\n\t\t\tif(bit) immr-\u003eim_cpm.cp_pbdat |= PB_SCL; \\\n\t\t\telse\timmr-\u003eim_cpm.cp_pbdat \u0026= ~PB_SCL\n\n\t\tI2C_DELAY\n\n\t\tThis delay is invoked four times per clock cycle so this\n\t\tcontrols the rate of data transfer. The data rate thus\n\t\tis 1 / (I2C_DELAY * 4). Often defined to be something\n\t\tlike:\n\n\t\t#define I2C_DELAY udelay(2)\n\n\t\tCONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA\n\n\t\tIf your arch supports the generic GPIO framework (asm/gpio.h),\n\t\tthen you may alternatively define the two GPIOs that are to be\n\t\tused as SCL / SDA. Any of the previous I2C_xxx macros will\n\t\thave GPIO-based defaults assigned to them as appropriate.\n\n\t\tYou should define these to the GPIO value as given directly to\n\t\tthe generic GPIO functions.\n\n\t\tCONFIG_SYS_I2C_INIT_BOARD\n\n\t\tWhen a board is reset during an i2c bus transfer\n\t\tchips might think that the current transfer is still\n\t\tin progress. On some boards it is possible to access\n\t\tthe i2c SCLK line directly, either by using the\n\t\tprocessor pin as a GPIO or by having a second pin\n\t\tconnected to the bus. If this option is defined a\n\t\tcustom i2c_init_board() routine in boards/xxx/board.c\n\t\tis run early in the boot sequence.\n\n\t\tCONFIG_SYS_I2C_BOARD_LATE_INIT\n\n\t\tAn alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is\n\t\tdefined a custom i2c_board_late_init() routine in\n\t\tboards/xxx/board.c is run AFTER the operations in i2c_init()\n\t\tis completed. This callpoint can be used to unreset i2c bus\n\t\tusing CPU i2c controller register accesses for CPUs whose i2c\n\t\tcontroller provide such a method. It is called at the end of\n\t\ti2c_init() to allow i2c_init operations to setup the i2c bus\n\t\tcontroller on the CPU (e.g. setting bus speed \u0026 slave address).\n\n\t\tCONFIG_I2CFAST (PPC405GP|PPC405EP only)\n\n\t\tThis option enables configuration of bi_iic_fast[] flags\n\t\tin u-boot bd_info structure based on u-boot environment\n\t\tvariable \"i2cfast\". (see also i2cfast)\n\n\t\tCONFIG_I2C_MULTI_BUS\n\n\t\tThis option allows the use of multiple I2C buses, each of which\n\t\tmust have a controller.\t At any point in time, only one bus is\n\t\tactive.\t To switch to a different bus, use the 'i2c dev' command.\n\t\tNote that bus numbering is zero-based.\n\n\t\tCONFIG_SYS_I2C_NOPROBES\n\n\t\tThis option specifies a list of I2C devices that will be skipped\n\t\twhen the 'i2c probe' command is issued.\t If CONFIG_I2C_MULTI_BUS\n\t\tis set, specify a list of bus-device pairs. Otherwise, specify\n\t\ta 1D array of device addresses\n\n\t\te.g.\n\t\t\t#undef\tCONFIG_I2C_MULTI_BUS\n\t\t\t#define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}\n\n\t\twill skip addresses 0x50 and 0x68 on a board with one I2C bus\n\n\t\t\t#define CONFIG_I2C_MULTI_BUS\n\t\t\t#define CONFIG_SYS_I2C_MULTI_NOPROBES\t{{0,0x50},{0,0x68},{1,0x54}}\n\n\t\twill skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1\n\n\t\tCONFIG_SYS_SPD_BUS_NUM\n\n\t\tIf defined, then this indicates the I2C bus number for DDR SPD.\n\t\tIf not defined, then U-Boot assumes that SPD is on I2C bus 0.\n\n\t\tCONFIG_SYS_RTC_BUS_NUM\n\n\t\tIf defined, then this indicates the I2C bus number for the RTC.\n\t\tIf not defined, then U-Boot assumes that RTC is on I2C bus 0.\n\n\t\tCONFIG_SYS_DTT_BUS_NUM\n\n\t\tIf defined, then this indicates the I2C bus number for the DTT.\n\t\tIf not defined, then U-Boot assumes that DTT is on I2C bus 0.\n\n\t\tCONFIG_SYS_I2C_DTT_ADDR:\n\n\t\tIf defined, specifies the I2C address of the DTT device.\n\t\tIf not defined, then U-Boot uses predefined value for\n\t\tspecified DTT device.\n\n\t\tCONFIG_SOFT_I2C_READ_REPEATED_START\n\n\t\tdefining this will force the i2c_read() function in\n\t\tthe soft_i2c driver to perform an I2C repeated start\n\t\tbetween writing the address pointer and reading the\n\t\tdata. If this define is omitted the default behaviour\n\t\tof doing a stop-start sequence will be used. Most I2C\n\t\tdevices can use either method, but some require one or\n\t\tthe other.\n\n- SPI Support:\tCONFIG_SPI\n\n\t\tEnables SPI driver (so far only tested with\n\t\tSPI EEPROM, also an instance works with Crystal A/D and\n\t\tD/As on the SACSng board)\n\n\t\tCONFIG_SH_SPI\n\n\t\tEnables the driver for SPI controller on SuperH. Currently\n\t\tonly SH7757 is supported.\n\n\t\tCONFIG_SPI_X\n\n\t\tEnables extended (16-bit) SPI EEPROM addressing.\n\t\t(symmetrical to CONFIG_I2C_X)\n\n\t\tCONFIG_SOFT_SPI\n\n\t\tEnables a software (bit-bang) SPI driver rather than\n\t\tusing hardware support. This is a general purpose\n\t\tdriver that only requires three general I/O port pins\n\t\t(two outputs, one input) to function. If this is\n\t\tdefined, the board configuration must define several\n\t\tSPI configuration items (port pins to use, etc). For\n\t\tan example, see include/configs/sacsng.h.\n\n\t\tCONFIG_HARD_SPI\n\n\t\tEnables a hardware SPI driver for general-purpose reads\n\t\tand writes. As with CONFIG_SOFT_SPI, the board configuration\n\t\tmust define a list of chip-select function pointers.\n\t\tCurrently supported on some MPC8xxx processors.\t For an\n\t\texample, see include/configs/mpc8349emds.h.\n\n\t\tCONFIG_MXC_SPI\n\n\t\tEnables the driver for the SPI controllers on i.MX and MXC\n\t\tSoCs. Currently i.MX31/35/51 are supported.\n\n\t\tCONFIG_SYS_SPI_MXC_WAIT\n\t\tTimeout for waiting until spi transfer completed.\n\t\tdefault: (CONFIG_SYS_HZ/100) /* 10 ms */\n\n- FPGA Support: CONFIG_FPGA\n\n\t\tEnables FPGA subsystem.\n\n\t\tCONFIG_FPGA_\u003cvendor\u003e\n\n\t\tEnables support for specific chip vendors.\n\t\t(ALTERA, XILINX)\n\n\t\tCONFIG_FPGA_\u003cfamily\u003e\n\n\t\tEnables support for FPGA family.\n\t\t(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)\n\n\t\tCONFIG_FPGA_COUNT\n\n\t\tSpecify the number of FPGA devices to support.\n\n\t\tCONFIG_CMD_FPGA_LOADMK\n\n\t\tEnable support for fpga loadmk command\n\n\t\tCONFIG_CMD_FPGA_LOADP\n\n\t\tEnable support for fpga loadp command - load partial bitstream\n\n\t\tCONFIG_CMD_FPGA_LOADBP\n\n\t\tEnable support for fpga loadbp command - load partial bitstream\n\t\t(Xilinx only)\n\n\t\tCONFIG_SYS_FPGA_PROG_FEEDBACK\n\n\t\tEnable printing of hash marks during FPGA configuration.\n\n\t\tCONFIG_SYS_FPGA_CHECK_BUSY\n\n\t\tEnable checks on FPGA configuration interface busy\n\t\tstatus by the configuration function. This option\n\t\twill require a board or device specific function to\n\t\tbe written.\n\n\t\tCONFIG_FPGA_DELAY\n\n\t\tIf defined, a function that provides delays in the FPGA\n\t\tconfiguration driver.\n\n\t\tCONFIG_SYS_FPGA_CHECK_CTRLC\n\t\tAllow Control-C to interrupt FPGA configuration\n\n\t\tCONFIG_SYS_FPGA_CHECK_ERROR\n\n\t\tCheck for configuration errors during FPGA bitfile\n\t\tloading. For example, abort during Virtex II\n\t\tconfiguration if the INIT_B line goes low (which\n\t\tindicated a CRC error).\n\n\t\tCONFIG_SYS_FPGA_WAIT_INIT\n\n\t\tMaximum time to wait for the INIT_B line to deassert\n\t\tafter PROB_B has been deasserted during a Virtex II\n\t\tFPGA configuration sequence. The default time is 500\n\t\tms.\n\n\t\tCONFIG_SYS_FPGA_WAIT_BUSY\n\n\t\tMaximum time to wait for BUSY to deassert during\n\t\tVirtex II FPGA configuration. The default is 5 ms.\n\n\t\tCONFIG_SYS_FPGA_WAIT_CONFIG\n\n\t\tTime to wait after FPGA configuration. The default is\n\t\t200 ms.\n\n- Configuration Management:\n\t\tCONFIG_IDENT_STRING\n\n\t\tIf defined, this string will be added to the U-Boot\n\t\tversion information (U_BOOT_VERSION)\n\n- Vendor Parameter Protection:\n\n\t\tU-Boot considers the values of the environment\n\t\tvariables \"serial#\" (Board Serial Number) and\n\t\t\"ethaddr\" (Ethernet Address) to be parameters that\n\t\tare set once by the board vendor / manufacturer, and\n\t\tprotects these variables from casual modification by\n\t\tthe user. Once set, these variables are read-only,\n\t\tand write or delete attempts are rejected. You can\n\t\tchange this behaviour:\n\n\t\tIf CONFIG_ENV_OVERWRITE is #defined in your config\n\t\tfile, the write protection for vendor parameters is\n\t\tcompletely disabled. Anybody can change or delete\n\t\tthese parameters.\n\n\t\tAlternatively, if you #define _both_ CONFIG_ETHADDR\n\t\t_and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default\n\t\tEthernet address is installed in the environment,\n\t\twhich can be changed exactly ONCE by the user. [The\n\t\tserial# is unaffected by this, i. e. it remains\n\t\tread-only.]\n\n\t\tThe same can be accomplished in a more flexible way\n\t\tfor any variable by configuring the type of access\n\t\tto allow for those variables in the \".flags\" variable\n\t\tor define CONFIG_ENV_FLAGS_LIST_STATIC.\n\n- Protected RAM:\n\t\tCONFIG_PRAM\n\n\t\tDefine this variable to enable the reservation of\n\t\t\"protected RAM\", i. e. RAM which is not overwritten\n\t\tby U-Boot. Define CONFIG_PRAM to hold the number of\n\t\tkB you want to reserve for pRAM. You can overwrite\n\t\tthis default value by defining an environment\n\t\tvariable \"pram\" to the number of kB you want to\n\t\treserve. Note that the board info structure will\n\t\tstill show the full amount of RAM. If pRAM is\n\t\treserved, a new environment variable \"mem\" will\n\t\tautomatically be defined to hold the amount of\n\t\tremaining RAM in a form that can be passed as boot\n\t\targument to Linux, for instance like that:\n\n\t\t\tsetenv bootargs ... mem=\\${mem}\n\t\t\tsaveenv\n\n\t\tThis way you can tell Linux not to use this memory,\n\t\teither, which results in a memory region that will\n\t\tnot be affected by reboots.\n\n\t\t*WARNING* If your board configuration uses automatic\n\t\tdetection of the RAM size, you must make sure that\n\t\tthis memory test is non-destructive. So far, the\n\t\tfollowing board configurations are known to be\n\t\t\"pRAM-clean\":\n\n\t\t\tIVMS8, IVML24, SPD8xx, TQM8xxL,\n\t\t\tHERMES, IP860, RPXlite, LWMON,\n\t\t\tFLAGADM, TQM8260\n\n- Access to physical memory region (\u003e 4GB)\n\t\tSome basic support is provided for operations on memory not\n\t\tnormally accessible to U-Boot - e.g. some architectures\n\t\tsupport access to more than 4GB of memory on 32-bit\n\t\tmachines using physical address extension or similar.\n\t\tDefine CONFIG_PHYSMEM to access this basic support, which\n\t\tcurrently only supports clearing the memory.\n\n- Error Recovery:\n\t\tCONFIG_PANIC_HANG\n\n\t\tDefine this variable to stop the system in case of a\n\t\tfatal error, so that you have to reset it manually.\n\t\tThis is probably NOT a good idea for an embedded\n\t\tsystem where you want the system to reboot\n\t\tautomatically as fast as possible, but it may be\n\t\tuseful during development since you can try to debug\n\t\tthe conditions that lead to the situation.\n\n\t\tCONFIG_NET_RETRY_COUNT\n\n\t\tThis variable defines the number of retries for\n\t\tnetwork operations like ARP, RARP, TFTP, or BOOTP\n\t\tbefore giving up the operation. If not defined, a\n\t\tdefault value of 5 is used.\n\n\t\tCONFIG_ARP_TIMEOUT\n\n\t\tTimeout waiting for an ARP reply in milliseconds.\n\n\t\tCONFIG_NFS_TIMEOUT\n\n\t\tTimeout in milliseconds used in NFS protocol.\n\t\tIf you encounter \"ERROR: Cannot umount\" in nfs command,\n\t\ttry longer timeout such as\n\t\t#define CONFIG_NFS_TIMEOUT 10000UL\n\n- Command Interpreter:\n\t\tCONFIG_AUTO_COMPLETE\n\n\t\tEnable auto completion of commands using TAB.\n\n\t\tNote that this feature has NOT been implemented yet\n\t\tfor the \"hush\" shell.\n\n\n\t\tCONFIG_SYS_HUSH_PARSER\n\n\t\tDefine this variable to enable the \"hush\" shell (from\n\t\tBusybox) as command line interpreter, thus enabling\n\t\tpowerful command line syntax like\n\t\tif...then...else...fi conditionals or `\u0026\u0026' and '||'\n\t\tconstructs (\"shell scripts\").\n\n\t\tIf undefined, you get the old, much simpler behaviour\n\t\twith a somewhat smaller memory footprint.\n\n\n\t\tCONFIG_SYS_PROMPT_HUSH_PS2\n\n\t\tThis defines the secondary prompt string, which is\n\t\tprinted when the command interpreter needs more input\n\t\tto complete a command. Usually \"\u003e \".\n\n\tNote:\n\n\t\tIn the current implementation, the local variables\n\t\tspace and global environment variables space are\n\t\tseparated. Local variables are those you define by\n\t\tsimply typing `name=value'. To access a local\n\t\tvariable later on, you have write `$name' or\n\t\t`${name}'; to execute the contents of a variable\n\t\tdirectly type `$name' at the command prompt.\n\n\t\tGlobal environment variables are those you use\n\t\tsetenv/printenv to work with. To run a command stored\n\t\tin such a variable, you need to use the run command,\n\t\tand you must not use the '$' sign to access them.\n\n\t\tTo store commands and special characters in a\n\t\tvariable, please use double quotation marks\n\t\tsurrounding the whole text of the variable, instead\n\t\tof the backslashes before semicolons and special\n\t\tsymbols.\n\n- Commandline Editing and History:\n\t\tCONFIG_CMDLINE_EDITING\n\n\t\tEnable editing and History functions for interactive\n\t\tcommandline input operations\n\n- Default Environment:\n\t\tCONFIG_EXTRA_ENV_SETTINGS\n\n\t\tDefine this to contain any number of null terminated\n\t\tstrings (variable = value pairs) that will be part of\n\t\tthe default environment compiled into the boot image.\n\n\t\tFor example, place something like this in your\n\t\tboard's config file:\n\n\t\t#define CONFIG_EXTRA_ENV_SETTINGS \\\n\t\t\t\"myvar1=value1\\0\" \\\n\t\t\t\"myvar2=value2\\0\"\n\n\t\tWarning: This method is based on knowledge about the\n\t\tinternal format how the environment is stored by the\n\t\tU-Boot code. This is NOT an official, exported\n\t\tinterface! Although it is unlikely that this format\n\t\twill change soon, there is no guarantee either.\n\t\tYou better know what you are doing here.\n\n\t\tNote: overly (ab)use of the default environment is\n\t\tdiscouraged. Make sure to check other ways to preset\n\t\tthe environment like the \"source\" command or the\n\t\tboot command first.\n\n\t\tCONFIG_ENV_VARS_UBOOT_CONFIG\n\n\t\tDefine this in order to add variables describing the\n\t\tU-Boot build configuration to the default environment.\n\t\tThese will be named arch, cpu, board, vendor, and soc.\n\n\t\tEnabling this option will cause the following to be defined:\n\n\t\t- CONFIG_SYS_ARCH\n\t\t- CONFIG_SYS_CPU\n\t\t- CONFIG_SYS_BOARD\n\t\t- CONFIG_SYS_VENDOR\n\t\t- CONFIG_SYS_SOC\n\n\t\tCONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG\n\n\t\tDefine this in order to add variables describing certain\n\t\trun-time determined information about the hardware to the\n\t\tenvironment. These will be named board_name, board_rev.\n\n\t\tCONFIG_DELAY_ENVIRONMENT\n\n\t\tNormally the environment is loaded when the board is\n\t\tintialised so that it is available to U-Boot. This inhibits\n\t\tthat so that the environment is not available until\n\t\texplicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL\n\t\tthis is instead controlled by the value of\n\t\t/config/load-environment.\n\n- DataFlash Support:\n\t\tCONFIG_HAS_DATAFLASH\n\n\t\tDefining this option enables DataFlash features and\n\t\tallows to read/write in Dataflash via the standard\n\t\tcommands cp, md...\n\n- Serial Flash support\n\t\tCONFIG_CMD_SF\n\n\t\tDefining this option enables SPI flash commands\n\t\t'sf probe/read/write/erase/update'.\n\n\t\tUsage requires an initial 'probe' to define the serial\n\t\tflash parameters, followed by read/write/erase/update\n\t\tcommands.\n\n\t\tThe following defaults may be provided by the platform\n\t\tto handle the common case when only a single serial\n\t\tflash is present on the system.\n\n\t\tCONFIG_SF_DEFAULT_BUS\t\tBus identifier\n\t\tCONFIG_SF_DEFAULT_CS\t\tChip-select\n\t\tCONFIG_SF_DEFAULT_MODE \t\t(see include/spi.h)\n\t\tCONFIG_SF_DEFAULT_SPEED\t\tin Hz\n\n\t\tCONFIG_CMD_SF_TEST\n\n\t\tDefine this option to include a destructive SPI flash\n\t\ttest ('sf test').\n\n\t\tCONFIG_SPI_FLASH_BAR\t\tBan/Extended Addr Reg\n\n\t\tDefine this option to use the Bank addr/Extended addr\n\t\tsupport on SPI flashes which has size \u003e 16Mbytes.\n\n\t\tCONFIG_SF_DUAL_FLASH\t\tDual flash memories\n\n\t\tDefine this option to use dual flash support where two flash\n\t\tmemories can be connected with a given cs line.\n\t\tcurrently Xilinx Zynq qspi support these type of connections.\n\n- SystemACE Support:\n\t\tCONFIG_SYSTEMACE\n\n\t\tAdding this option adds support for Xilinx SystemACE\n\t\tchips attached via some sort of local bus. The address\n\t\tof the chip must also be defined in the\n\t\tCONFIG_SYS_SYSTEMACE_BASE macro. For example:\n\n\t\t#define CONFIG_SYSTEMACE\n\t\t#define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000\n\n\t\tWhen SystemACE support is added, the \"ace\" device type\n\t\tbecomes available to the fat commands, i.e. fatls.\n\n- TFTP Fixed UDP Port:\n\t\tCONFIG_TFTP_PORT\n\n\t\tIf this is defined, the environment variable tftpsrcp\n\t\tis used to supply the TFTP UDP source port value.\n\t\tIf tftpsrcp isn't defined, the normal pseudo-random port\n\t\tnumber generator is used.\n\n\t\tAlso, the environment variable tftpdstp is used to supply\n\t\tthe TFTP UDP destination port ","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fbufferoverflow%2Fu-boot","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fbufferoverflow%2Fu-boot","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fbufferoverflow%2Fu-boot/lists"}