{"id":15060252,"url":"https://github.com/canardconfit/cc-compiler","last_synced_at":"2026-01-20T11:32:41.807Z","repository":{"id":237786952,"uuid":"795244441","full_name":"CanardConfit/cc-compiler","owner":"CanardConfit","description":"A custom compiler project for HEPIA students to compile C-like for their own processor.","archived":false,"fork":false,"pushed_at":"2024-06-14T15:40:24.000Z","size":122,"stargazers_count":2,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"master","last_synced_at":"2025-04-07T18:56:38.837Z","etag":null,"topics":["assembler","c-like","nuxt","processor"],"latest_commit_sha":null,"homepage":"https://cc-compiler.canardconfit.ch/","language":"TypeScript","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mpl-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/CanardConfit.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2024-05-02T21:47:22.000Z","updated_at":"2024-06-14T15:40:21.000Z","dependencies_parsed_at":"2025-02-13T20:40:03.914Z","dependency_job_id":"52c02247-3f08-46d5-b905-532001e46ce9","html_url":"https://github.com/CanardConfit/cc-compiler","commit_stats":null,"previous_names":["canardconfit/cc-compiler-python","canardconfit/cc-compiler"],"tags_count":14,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/CanardConfit%2Fcc-compiler","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/CanardConfit%2Fcc-compiler/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/CanardConfit%2Fcc-compiler/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/CanardConfit%2Fcc-compiler/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/CanardConfit","download_url":"https://codeload.github.com/CanardConfit/cc-compiler/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":247713311,"owners_count":20983683,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["assembler","c-like","nuxt","processor"],"created_at":"2024-09-24T22:55:10.551Z","updated_at":"2026-01-20T11:32:41.800Z","avatar_url":"https://github.com/CanardConfit.png","language":"TypeScript","funding_links":[],"categories":[],"sub_categories":[],"readme":"# CC Processor Compiler\n\n![Docker Pulls](https://img.shields.io/docker/pulls/canardconfit/cc-compiler)\n![GitHub Release](https://img.shields.io/github/v/release/CanardConfit/cc-compiler)\n![GitHub Repo stars](https://img.shields.io/github/stars/CanardConfit/cc-compiler)\n\n## Description\n\nThe cc-compiler project is developed as part of an exercise at [HEPIA in Geneva](https://www.hesge.ch/hepia/), where students are tasked with creating their own processor using [Logisim](https://github.com/logisim-evolution/logisim-evolution). This project aims to provide a Node.js-based compiler that can translate high-level language instructions into machine code compatible with the custom processor designed in Logisim.\n\n## C-Like Syntax\n\n| Syntax                       | Arguments                              | Example          | Description                                                                       |\n|------------------------------|----------------------------------------|------------------|-----------------------------------------------------------------------------------|\n| `R[0-7] = x`                 | x = Any int number (8 bits)            | `R0 = 0`         | Assignation                                                                       |\n| `R[0-7] = R[0-7] + R[0-7]`   |                                        | `R0 = R1 + R2`   | Addition                                                                          |\n| `R[0-7] = R[0-7] - R[0-7]`   |                                        | `R0 = R1 - R2`   | Substraction                                                                      |\n| `R[0-7] = R[0-7] \u003e\u003e 1`       |                                        | `R0 = R1 \u003e\u003e 1`   | Shift right by 1                                                                  |\n| `R[0-7] = R[0-7] \u003c\u003c 1`       |                                        | `R0 = R1 \u003c\u003c 1`   | Shift left by 1                                                                   |\n| `R[0-7] = R[0-7] ASR R[0-7]` |                                        | `R0 = R1 ASR R2` | ASR shift                                                                         |\n| `R[0-7] = R[0-7] and R[0-7]` |                                        | `R0 = R1 and R2` | And operation                                                                     |\n| `R[0-7] = R[0-7] or R[0-7]`  |                                        | `R0 = R1 or R2`  | Or operation                                                                      |\n| `R[0-7] = not R[0-7]`        |                                        | `R0 = not R1`    | Not operation                                                                     |\n| `while x y`                  | x = (`not`)\u003cbr/\u003e y = `N,Z,C,V`, `True` | `while True`     | While                                                                             |\n| `if R[0-7] x R[0-7]`         | x = `==, !=, \u003c=, \u003e=, \u003c, \u003e`             | `if R0 == R1`    | If                                                                                |\n| `{`                          |                                        | `                | Brace to start if or while block                                                  |\n| `}`                          |                                        | `                | Brace to end if or while block                                                    |\n| `STORE R[0-7] R[0-7] x`      | x = offset int                         | `STORE R0 R1 0`  | Store from value into R[0-7] to RAM or peripheral (R[0-7] value pointer + offset) |\n| `LOAD R[0-7] R[0-7] x`       | x = offset int                         | `LOAD R1 R2 0`   | Store from RAM or peripheral (R[0-7] value pointer + offset) to R[0-7] variable   |\n| `JMP x`                      | x = Any int number (signed)            | `JMP 2`          | Jump unconditional relative.                                                      |\n\n\n## Assembler instructions\n\n### ALU instructions\n\n| Operation        | Opcode        | Result     | Source 0   | Source 1   | Reserved   |\n|------------------|---------------|------------|------------|------------|------------|\n| *Bits*           | *15 14 13 12* | *11 10 09* | *08 07 06* | *05 04 03* | *02 01 00* |\n| RD = RS0 + RS1   | 0000          | RD         | RS0        | RS1        | —          |\n| RD = RS0 - RS1   | 0001          | RD         | RS0        | RS1        | —          |\n| RD = RS0 \u003c\u003c 1    | 0010          | RD         | RS0        | —          | —          |\n| RD = RS0 \u003e\u003e 1    | 0011          | RD         | RS0        | —          | —          |\n| RD = ASR(RS0)    | 0100          | RD         | RS0        | —          | —          |\n| RD = RS0 AND RS1 | 0101          | RD         | RS0        | RS1        | —          |\n| RD = RS0 OR RS1  | 0110          | RD         | RS0        | RS1        | —          |\n| RD = NOT (RS0)   | 0111          | RD         | RS0        | —          | —          |\n\n### Initialization with constant instructions\n\n| Operation | Opcode        | Result     | Reserved | Constant                  |\n|-----------|---------------|------------|----------|---------------------------|\n| *Bits*    | *15 14 13 12* | *11 10 09* | *08*     | *07 06 05 04 03 02 01 00* |\n| RD = val  | 1000          | RD         | -        | val                       |\n\n### Unconditional jump instructions\n\n| Operation             | Opcode        | Reserved      | Number of jump (signed)   |\n|-----------------------|---------------|---------------|---------------------------|\n| *Bits*                | *15 14 13 12* | *11 10 09 08* | *07 06 05 04 03 02 01 00* |\n| **B** : PC = PC + val | 1011          | -             | val                       |\n\n### Conditional jump instructions\n\n| Operation                       | Opcode        | Condition     | Number of jump (signed)   |\n|---------------------------------|---------------|---------------|---------------------------|\n| *Bits*                          | *15 14 13 12* | *11 10 09 08* | *07 06 05 04 03 02 01 00* |\n| **BC**: If(cond), PC = PC + val | 1010          | COND          | val                       |\n\n\u003e COND = Z,N,C,V.\n\n### Branch instructions (TODO)\n\n| Operation                       | Opcode        | Reg Link      | Reserved | Address to the function   |\n|---------------------------------|---------------|---------------|----------|---------------------------|\n| *Bits*                          | *15 14 13 12* | *11 10 09 08* | *08*     | *07 06 05 04 03 02 01 00* |\n| **BL** : PC = val ; RL = PC + 1 | 1110          | RL            | -        | val                       |\n| **BR** : PC = [RL]              | 1111          | RL            | -        | -                         |\n\n### Memory access instructions (TODO)\n\n| Instruction       | Opcode        | Result     | Pointer    | offset              |\n|-------------------|---------------|------------|------------|---------------------|\n| *Bits*            | *15 14 13 12* | *11 10 09* | *08 07 06* | *05 04 03 02 01 00* |\n| LD RD, offset[RP] | 1100          | RD         | RP         | offset              |\n| ST RS, offset[RP] | 1101          | RS         | RP         | offset              |\n\n### Peripheral access table\n\n| Description           | Pointer value | Access | Pointer | offset |\n| --------------------- | ------------- | ------ | ------- | ------ |\n| **Leds**              | 128           | R / W  | 128     | 0      |\n| Bit 0 - LED0          |               |        |         |        |\n| Bit 1 - LED1          |               |        |         |        |\n| Bit 2 - LED2          |               |        |         |        |\n| Bit 3 - LED3          |               |        |         |        |\n| Bit 4 - LED4          |               |        |         |        |\n| Bit 5 - LED5          |               |        |         |        |\n| Bit 6 - LED6          |               |        |         |        |\n| Bit 7 - LED7          |               |        |         |        |\n| **Buttons**           | 129           | R      | 128     | 1      |\n| Bit 0 - BTN0          |               |        |         |        |\n| Bit 1 - BTN1          |               |        |         |        |\n| Bit 2 - BTN2          |               |        |         |        |\n| Bit 3 - BTN3          |               |        |         |        |\n| Bit 4 - BTN4          |               |        |         |        |\n| Bit 5 - BTN5          |               |        |         |        |\n| Bit 6 - BTN6          |               |        |         |        |\n| Bit 7 - BTN7          |               |        |         |        |\n| **UART**              |               |        |         |        |\n| Registry Address      | 130           | R / W  | 128     | 2      |\n| *Bit 0 - Addr bit 0*  |               |        |         |        |\n| *Bit 1 - Addr bit 1*  |               |        |         |        |\n| *Bit 2 - Addr bit 2*  |               |        |         |        |\n| *Bit 3 - Addr bit 3*  |               |        |         |        |\n| *Bit 4 - Reserved*    |               |        |         |        |\n| *Bit 5 - Reserved*    |               |        |         |        |\n| *Bit 6 - Reserved*    |               |        |         |        |\n| *Bit 7 - Reserved*    |               |        |         |        |\n| DataL                 | 131           | R      | 128     | 3      |\n| *Bit 0*               |               |        |         |        |\n| *Bit 1*               |               |        |         |        |\n| *Bit 2*               |               |        |         |        |\n| *Bit 3*               |               |        |         |        |\n| *Bit 4*               |               |        |         |        |\n| *Bit 5*               |               |        |         |        |\n| *Bit 6*               |               |        |         |        |\n| *Bit 7*               |               |        |         |        |\n| DataH                 | 132           | R      | 128     | 4      |\n| *Bit 8*               |               |        |         |        |\n| *Bit 9*               |               |        |         |        |\n| *Bit 10*              |               |        |         |        |\n| *Bit 11*              |               |        |         |        |\n| *Bit 12*              |               |        |         |        |\n| *Bit 13*              |               |        |         |        |\n| *Bit 14*              |               |        |         |        |\n| *Bit 15*              |               |        |         |        |\n| **PWM**               |               |        |         |        |\n| V1                    | 133           | W      | 128     | 5      |\n| V2                    | 134           | W      | 128     | 6      |\n| **Other**             |               |        |         |        |\n| Valve                 | 135           | R / W  | 128     | 7      |\n| *Bit 0 - Valve bit 0* |               |        |         |        |\n| *Bit 1 - Reserved*    |               |        |         |        |\n| *Bit 2 - Reserved*    |               |        |         |        |\n| *Bit 3 - Reserved*    |               |        |         |        |\n| *Bit 4 - Reserved*    |               |        |         |        |\n| *Bit 5 - Reserved*    |               |        |         |        |\n| *Bit 6 - Reserved*    |               |        |         |        |\n| *Bit 7 - Reserved*    |               |        |         |        |\n| **SPI1**              |               |        |         |        |\n| DataL                 | 136           | R      | 128     | 8      |\n| *Bit 0*               |               |        |         |        |\n| *Bit 1*               |               |        |         |        |\n| *Bit 2*               |               |        |         |        |\n| *Bit 3*               |               |        |         |        |\n| *Bit 4*               |               |        |         |        |\n| *Bit 5*               |               |        |         |        |\n| *Bit 6*               |               |        |         |        |\n| *Bit 7*               |               |        |         |        |\n| DataH                 | 137           | R      | 128     | 9      |\n| *Bit 8*               |               |        |         |        |\n| *Bit 9*               |               |        |         |        |\n| *Bit 10*              |               |        |         |        |\n| *Bit 11*              |               |        |         |        |\n| *Bit 12*              |               |        |         |        |\n| *Bit 13*              |               |        |         |        |\n| *Bit 14*              |               |        |         |        |\n| *Bit 15*              |               |        |         |        |\n\n### UART Registries Table\n\n| Address | Value | Name         | Description                                                   |\n| ------- | ----- | ------------ | ------------------------------------------------------------- |\n| `0000`  | `0x0` | Version      | Firmware version of the RobotMyLab                            |\n| `0001`  | `0x1` | Right Dist   | Distance measured by the front right sensor                   |\n| `0010`  | `0x2` | Front Dist   | Distance measured by the front sensor                         |\n| `0011`  | `0x3` | Left Dist    | Distance measured by the front left sensor                    |\n| `0100`  | `0x4` | Accel X      | X-axis of the accelerometer (front-back axis)                 |\n| `0101`  | `0x5` | Accel Y      | Y-axis of the accelerometer (left-right axis)                 |\n| `0110`  | `0x6` | Accel Z      | Z-axis of the accelerometer (up-down axis)                    |\n| `0111`  | `0x7` | Gyro X       | Angular velocity around the X-axis                            |\n| `1000`  | `0x8` | Gyro Y       | Angular velocity around the Y-axis                            |\n| `1001`  | `0x9` | Gyro Z       | Angular velocity around the Z-axis                            |\n| `1010`  | `0xA` | Battery      | Charge state of the rechargeable batteries                    |\n| `1011`  | `0xB` | Left IR      | Value measured by the left ground IR sensor                   |\n| `1100`  | `0xC` | Right IR     | Value measured by the right ground IR sensor                  |\n| `1101`  | `0xD` | Left Odom    | Cumulative distance measured by the left odometric sensor     |\n| `1110`  | `0xE` | Right Odom   | Cumulative distance measured by the right odometric sensor    |\n| `1111`  | `0xF` | IR RX        | Value measured by the IR communication receiver               |\n\n\n## Examples\n\n```c\nR0 = 0\nwhile true\n{\n    R1 = 0\n    R2 = 1\n    while not N\n    {\n        R3 = R1 + R0\n        R1 = R2 + R0\n        R2 = R2 + R3\n    }\n}\n```\n\nCompiled to:\n\n```bash\n0 0x8000\n1 0x8200\n2 0x8401\n3 0x0640\n4 0x0280\n5 0x0498\n6 0xA402\n7 0xB0FC\n8 0xB0F9\n```\n\nAnother example:\n\n```c\n// -----\n// Test whether the value of a peripheral variable is 30\n// -----\nR1 = 127\n\n// Load data from R1 pointer with offset 5 into R2 var\nLOAD R2 R1 5\n\n// Test variable\nR3 = 30\n\nif R2 == R3\n{\n    R4 = 1\n}\n// Else\nif R2 != R3\n{\n    R4 = 0\n}\n\n// Reassign pointer to store\nR1 = 0\n\n// Store result into RAM at 0x0\nSTORE R4 R1 0\n\n```\n\nCompiled to:\n\n```bash\n0x827F\n0xC445\n0x861E\n0x2D0\n0xA802\n0xB002\n0x8801\n0x2D0\n0xA803\n0xB001\n0x8800\n0x8200\n0xD840\n```\n\nAnother example:\n\n```c\n// -----\n// Get Value from UART\n// -----\n\n// Pointer to Perihperal part\nR1 = 128\n\n// Address of the wanted UART registry\nR2 = 2\n\n// Store address wanted into UART address peripheral\nSTORE R2 R1 2\n\nwhile true\n{\n    // Load data incoming from UART registry selected\n    LOAD R0 R1 3\n\n    // Display value from UART to Leds\n    STORE R0 R1 0\n}\n```\n\nCompiled to:\n\n```bash\n0x8280\n0x8402\n0xD442\n0xC043\n0xD040\n0xB0FE\n```\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fcanardconfit%2Fcc-compiler","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fcanardconfit%2Fcc-compiler","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fcanardconfit%2Fcc-compiler/lists"}