{"id":20664269,"url":"https://github.com/casualcodersprojects/digital-logic-design","last_synced_at":"2026-03-07T22:05:35.200Z","repository":{"id":224152692,"uuid":"762558298","full_name":"CasualCodersProjects/Digital-Logic-Design","owner":"CasualCodersProjects","description":"Repo associated with our Custom ASIC video. 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You're better off going towards VLSI and creating dedicated Pull-Up networks and Pull-Down Networks (PUN/PDN)s though. That'll dramatically slash transistor count and thus board space.\n\nLet us know if you do anything using this. It's a pain to work with, but it can be made to work. You have to use the modern kicad `append board` feature to place each logic gate where it goes on the board, then manually set each mesh. That's the best way I could come up with to do this.\n\nThere are schematics associated with each of these gates in their respecitve folders. They're full kicad projects. That should provide enough context for what the circuit does. For immediate reference, the footprints are provided below.\n\n## The full board\n![Decoder](./Images/Full%20Decoder.png)\n\n### It's associated logic experssions.\n![Logic Expressions](./Images/Good%20Expressions.png)\n\n## The Inverter\n![inverter](./Images/Inverter.png)\n\n## 2 Input And Gate\n![2 input AND gate](./Images/AND-2.png)\n\n## 2 Input Or Gate\n![2 input OR gate](./Images/OR-2.png)\n\n## 3 Input And Gate\n![3 input AND gate](./Images/AND-3.png)\n\n## 3 Input Or Gate\n![3 input OR gate](./Images/OR-3.png)\n\n## 4 Input And Gate\n![4 input AND gate](./Images/AND-4.png)\n\n## 4 Input Or Gate\nNot Implemented.  \nNever will be.  \nFollow the pattern.","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fcasualcodersprojects%2Fdigital-logic-design","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fcasualcodersprojects%2Fdigital-logic-design","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fcasualcodersprojects%2Fdigital-logic-design/lists"}