{"id":13648149,"url":"https://github.com/chipsalliance/f4pga","last_synced_at":"2025-04-08T09:08:46.873Z","repository":{"id":37927402,"uuid":"162174233","full_name":"chipsalliance/f4pga","owner":"chipsalliance","description":"FOSS Flow For FPGA","archived":false,"fork":false,"pushed_at":"2025-01-06T00:22:00.000Z","size":2475,"stargazers_count":379,"open_issues_count":26,"forks_count":50,"subscribers_count":18,"default_branch":"main","last_synced_at":"2025-04-01T08:33:04.323Z","etag":null,"topics":["documentation","sphinx","symbiflow"],"latest_commit_sha":null,"homepage":"https://f4pga.org","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/chipsalliance.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2018-12-17T18:36:59.000Z","updated_at":"2025-03-28T03:49:50.000Z","dependencies_parsed_at":"2023-09-24T02:31:25.494Z","dependency_job_id":"9efc6480-3e72-4783-ab55-22abf0aa88de","html_url":"https://github.com/chipsalliance/f4pga","commit_stats":{"total_commits":686,"total_committers":24,"mean_commits":"28.583333333333332","dds":0.587463556851312,"last_synced_commit":"0723f9ca4ea4b686ff9c2e32c9cec56d40de1a62"},"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/chipsalliance%2Ff4pga","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/chipsalliance%2Ff4pga/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/chipsalliance%2Ff4pga/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/chipsalliance%2Ff4pga/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/chipsalliance","download_url":"https://codeload.github.com/chipsalliance/f4pga/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":247809962,"owners_count":20999816,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["documentation","sphinx","symbiflow"],"created_at":"2024-08-02T01:04:00.430Z","updated_at":"2025-04-08T09:08:46.844Z","avatar_url":"https://github.com/chipsalliance.png","language":"Python","funding_links":[],"categories":["Python","FPGA Design"],"sub_categories":[],"readme":"\u003cp align=\"center\"\u003e\n  \u003ca title=\"Website\" href=\"https://f4pga.org\"\u003e\u003cimg src=\"https://img.shields.io/website?longCache=true\u0026style=flat-square\u0026label=f4pga.org\u0026up_color=10cfc9\u0026url=https%3A%2F%2Ff4pga.org%2Findex.html\u0026labelColor=fff\"\u003e\u003c/a\u003e\u003c!--\n  --\u003e\n  \u003ca title=\"Documentation\" href=\"https://f4pga.readthedocs.io\"\u003e\u003cimg src=\"https://img.shields.io/website?longCache=true\u0026style=flat-square\u0026label=Documentation\u0026up_color=1226aa\u0026up_message=%E2%9E%9A\u0026url=https%3A%2F%2Ff4pga.readthedocs.io%2Fen%2Flatest%2Findex.html\u0026labelColor=fff\"\u003e\u003c/a\u003e\u003c!--\n  --\u003e\n  \u003ca title=\"Community\" href=\"https://f4pga.readthedocs.io/en/latest/community.html#communication\"\u003e\u003cimg src=\"https://img.shields.io/badge/Chat-IRC%20%7C%20Slack-white?longCache=true\u0026style=flat-square\u0026logo=Slack\u0026logoColor=fff\"\u003e\u003c/a\u003e\u003c!--\n  --\u003e\n\u003c/p\u003e\n\n# FOSS Flows For FPGA (F4PGA) project\n\n\u003cp align=\"center\"\u003e\n  \u003ca title=\"'Automerge' workflow status\" href=\"https://github.com/chipsalliance/f4pga/actions/workflows/Doc.yml\"\u003e\u003cimg alt=\"'Automerge' workflow status\" src=\"https://img.shields.io/github/actions/workflow/status/chipsalliance/f4pga/Automerge.yml?branch=main\u0026longCache=true\u0026style=flat-square\u0026label=Tests\u0026logo=Github%20Actions\u0026logoColor=fff\"\u003e\u003c/a\u003e\u003c!--\n  --\u003e\n\u003c/p\u003e\n\nThis is the top-level repository for the [F4PGA](https://f4pga.org/) project, which is a Workgroup under the [CHIPS Alliance](https://chipsalliance.org); consisting of members from different backgrounds, including FPGA vendors, industrial users and academia (see [Documentation \u003e Community](https://f4pga.readthedocs.io/en/latest/community.html));\nwho collaborate to build a more open source and software-driven FPGA ecosystem (IP, tools and workflows) to drive the\nadoption of FPGAs in existing and new use cases, and eliminate barriers of entry.\n\n* [Documentation \u003e Getting started](https://f4pga.readthedocs.io) (for everyone)\n* [F4PGA Examples](https://f4pga-examples.readthedocs.io) (for users)\n* [F4PGA Architecture Definitions](https://f4pga.readthedocs.io/projects/arch-defs) (for developers)\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fchipsalliance%2Ff4pga","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fchipsalliance%2Ff4pga","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fchipsalliance%2Ff4pga/lists"}