{"id":13645155,"url":"https://github.com/chipsalliance/verible","last_synced_at":"2026-03-13T17:02:05.926Z","repository":{"id":37749478,"uuid":"220114000","full_name":"chipsalliance/verible","owner":"chipsalliance","description":"Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server","archived":false,"fork":false,"pushed_at":"2025-05-02T15:45:57.000Z","size":14332,"stargazers_count":1528,"open_issues_count":529,"forks_count":233,"subscribers_count":49,"default_branch":"master","last_synced_at":"2025-05-02T16:31:57.502Z","etag":null,"topics":["analysis","formatter","hacktoberfest","language-server-protocol","lexer","linter","lsp-server","parser","productivity","style-linter","sv-lrm","syntax-tree","systemverilog","systemverilog-developer","systemverilog-parser","verible","yacc"],"latest_commit_sha":null,"homepage":"https://chipsalliance.github.io/verible/","language":"C++","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/chipsalliance.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":"CONTRIBUTING.md","funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":"AUTHORS","dei":null,"publiccode":null,"codemeta":null,"zenodo":null}},"created_at":"2019-11-07T00:04:47.000Z","updated_at":"2025-05-02T15:28:37.000Z","dependencies_parsed_at":"2023-11-13T21:29:47.570Z","dependency_job_id":"c11ef088-d69d-4055-92c6-951dd1c076a4","html_url":"https://github.com/chipsalliance/verible","commit_stats":null,"previous_names":[],"tags_count":1055,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/chipsalliance%2Fverible","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/chipsalliance%2Fverible/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/chipsalliance%2Fverible/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/chipsalliance%2Fverible/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/chipsalliance","download_url":"https://codeload.github.com/chipsalliance/verible/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":254129481,"owners_count":22019628,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["analysis","formatter","hacktoberfest","language-server-protocol","lexer","linter","lsp-server","parser","productivity","style-linter","sv-lrm","syntax-tree","systemverilog","systemverilog-developer","systemverilog-parser","verible","yacc"],"created_at":"2024-08-02T01:02:29.826Z","updated_at":"2026-03-13T17:02:00.904Z","avatar_url":"https://github.com/chipsalliance.png","language":"C++","funding_links":[],"categories":["C++","Linters"],"sub_categories":[],"readme":"# ![](./img/verible-logo-headline.png)Verible\n\n\n\n[![License](https://img.shields.io/badge/License-Apache%202.0-blue.svg)](https://opensource.org/licenses/Apache-2.0)\n[![Continuous Integration](https://github.com/chipsalliance/verible/workflows/ci/badge.svg)](https://github.com/chipsalliance/verible/actions/workflows/verible-ci.yml)\n[![codecov](https://codecov.io/gh/chipsalliance/verible/branch/master/graph/badge.svg?token=5f656dpmDT)](https://codecov.io/gh/chipsalliance/verible)\n\n\u003c!--*\nfreshness: { owner: 'hzeller' reviewed: '2022-08-31' }\n*--\u003e\n\nThe Verible project's main mission is to parse SystemVerilog (IEEE 1800-2017)\n(as standardized in the [SV-LRM]) for a wide variety of applications, including\ndeveloper tools.\n\nIt was born out of a need to parse *un-preprocessed* source files, which is\nsuitable for single-file applications like style-linting and formatting. In\ndoing so, it can be adapted to parse *preprocessed* source files, which is what\nreal compilers and toolchains require.\n\nThe spirit of the project is that no-one should ever have to develop a\nSystemVerilog parser for their own application, because developing a\nstandard-compliant parser is an enormous task due to the syntactic complexity of\nthe language. Verible's parser is also regularly tested against an ever-growing\nsuite of (tool-independent) language compliance tests at\nhttps://symbiflow.github.io/sv-tests/.\n\nA lesser (but notable) objective is that the language-agnostic components of\nVerible be usable for rapidly developing language support tools for other\nlanguages.\n\n### Installation\n\nFor simple installation, we provide regular [binary releases] for Linux and\nWindows, including statically linked binaries for x86 and Arm to run on almost\nany Linux distribution.\n\nThere are also some distributions that include Verible\n\n  * [Nix] has binaries for Linux x86 and Arm.\n  * There is a [homebrew] package for MacOS.\n\nIf you prefer to build and install the binaries locally yourself, see\ndetails below in the [Developers](#developers-welcome) section.\n\n## SystemVerilog Developer Tools\n\n### Parser\n\n[Learn more about the parser implementation here](./verible/verilog/parser).\n\nWe provide a standalone [`verible-verilog-syntax`](./verible/verilog/tools/syntax) tool\nto help with visualizing the syntax structure as understood by the lexer and\nparser. This is very useful for troubleshooting and understand the internal\nrepresentations seen by the other tools.\n\nThe tool has an ability of exporting a concrete syntax tree in JSON format,\nmaking use of it in external tools easy. There is also a\n[Python wrapper module and a few example scripts](./verible/verilog/tools/syntax/export_json_examples).\n\n### Style Linter\n\n[`verible-verilog-lint`](./verible/verilog/tools/lint) identifies constructs or patterns\nin code that are deemed undesirable according to a style guide. The main goal is\nto relieve humans the burden of reviewing code for style compliance. Many\n[lint rules][lint-rule-list] use syntax tree pattern matching to find style\nviolations.\n\nFeatures:\n\n * Style guide citations in diagnostics\n * Rule deck configurability\n * Waiver mechanisms: in-file, external waiver file\n * [Github SystemVerilog linter action][github-lint-action] available.\n\n![Integrating Verible Linter in Github screenshot](./img/example-github-integration.png)\n\nDocumentation:\n\n*   [Style linter user documentation](./verible/verilog/tools/lint)\n*   [Generated lint rule documentation][lint-rule-list]\n\n### Formatter\n\nThe [`verible-verilog-format`](./verible/verilog/tools/formatter) formatter manages\nwhitespace in accordance with a particular style. The main goal is to relieve\nhumans of having to manually manage whitespace, wrapping, and indentation, and\nto provide a tool that can be integrated into any editor to enable\neditor-independent consistency.\n\nFeatures (various degress of work-in-progress):\n\n * Corrects indentation\n * Corrects inter-token spacing, with syntax context awareness\n * Line-wrapping to a column limit\n * Support for incremental formatting, only touched changed lines.\n * Interactive formatting: accept or decline formatting changes\n * Tabular alignment\n * [Github SystemVerilog formatter action][github-format-action] available.\n\n\u003c!--\nTODO(fangism): a demo GIF animation here.\nSee https://github.com/chipsalliance/verible/issues/528\n--\u003e\n\n### Language Server\n\nThe [`verible-verilog-ls`](./verible/verilog/tools/ls) is a language server that\nprovides the functionalities that come with the Verible command line tools\nalso directly in your editor.\n\nIt implements the standardized [language server protocol] that is supported\nby a myriad of editors and IDEs.\n\nThe language server provides formatting and linting. If possible, it also\nprovides quick-fixes\n\n![Showing a lint message with quick-fix in vscode screenshot](./img/language-server-demo-vscode.png)\n\n### Lexical Diff\n\n[`verible-verilog-diff`](./verible/verilog/tools/diff) compares two input files for\nequivalence.\n\n### Verible project tool\n\n[`verible-verilog-project`](./verible/verilog/tools/project) is a multi-tool that\noperates on whole Verilog projects, consisting of a file list and related\nconfigurations. This serves as a diagnostic tool for analyzing (and potentially\ntransforming) project-level sources.\n\n### Code Obfuscator\n\n[`verible-verilog-obfuscate`](./verible/verilog/tools/obfuscator) transforms Verilog\ncode by replacing identifiers with obfuscated names of equal length, and\npreserving all other text, including spaces. Output is written to stdout. The\nresulting file size is the same as the original. This is useful for preparing\npotentially sensitive test cases with tool vendors.\n\n\u003c!--\nTODO(fangism): a short demo GIF animation here.\nSee https://github.com/chipsalliance/verible/issues/528\n--\u003e\n\n### Preprocessor\n\n[`verible-verilog-preprocessor`](./verible/verilog/tools/preprocessor) is a collection\nof preprocessor-like tools, (but does not include a fully-featured Verilog\npreprocessor yet.)\n\n### Source Code Indexer\n\n[`verible-verilog-kythe-extractor`](./verible/verilog/tools/kythe) extracts indexing\nfacts from SV source code using the [Kythe](http://kythe.io) schema, which can\nthen enhance IDEs with linked cross-references for ease of source code\nnavigation.\n\n\u003c!--\nTODO(minatoma): short animation of hover/navigation features\n--\u003e\n\n## Developers, Welcome\n\nFor source code browsing, we recommend using the fully-indexed and searchable\nmirror at https://cs.opensource.google/verible/verible.\n\nIf you'd like to contribute, check out the [contributing](./CONTRIBUTING.md)\nguide and the [development resources](./doc/development.md).\n\n### Build\n\nVerible's code base is written in C++.\n\nTo build, you need the [bazel] build system and a C++17\ncompatible compiler (e.g. \u003e= g++-10), as well as python3.\nA lot of users of Verible have to work on pretty old installations,\nso we try to keep the requirements as minimal as possible.\n\nUse your package manager to install the dependencies; on a system with\nthe nix package manager simply run `nix-shell` to get a build environment.\n\n```bash\n# Build all tools and libraries\nbazel build -c opt //...\n```\n\nYou can access the generated artifacts under `bazel-bin/`. For instance the\nsyntax checker will be at\n`bazel-bin/verible/verilog/tools/syntax/verible-verilog-syntax` (corresponding to the\ntarget name `//verible/verilog/tools/syntax:verible-verilog-syntax`).\n\nMoreover, if you need statically linked executables that don't depend on your\nshared libraries, you can use custom config\n`create_static_linked_executables` (with this setting `bfd` linker will be used,\ninstead of default `gold` linker).\n\n```bash\n# Generate statically linked executables.\n# Uses bfd linker and needs static system libs available.\nbazel build -c opt --config=create_static_linked_executables //...\n```\n\n### Optionally using local flex/bison for build\n\nFlex and Bison, that are needed for the parser generation, are compiled as part\nof the build process. But if for any reason you want or need local tools (e.g.\nif you encounter a compile problem with them - please file a bug then)\ncan choose so by adding `--//bazel:use_local_flex_bison` to your bazel\ncommand line:\n\n```bash\n# Also append the option '--//bazel:use_local_flex_bison' to test/install commands\nbazel build -c opt  --//bazel:use_local_flex_bison //...\n```\n\n### Building on Windows\n\nBuilding on Windows requires LLVM, WinFlexBison 3 and Git-bash to be installed. Using package manager [chocolatey], this can be done with\n\n```powershell\nchoco install git llvm winflexbison3\n```\n\nBazel may also require environment variable to use git-bash and LLVM, on powershell\n\n```powershell\n$env:BAZEL_SH=\"C:\\Program Files\\Git\\git-bash.exe\"\n$env:BAZEL_LLVM=\"C:\\Program Files\\LLVM\"\n```\n\n### Installation\n\nFor simple installation, we provide regular [binary releases].\n\nIf you prefer to build and install the binaries locally yourself:\n\n```bash\nbazel build -c opt :install-binaries\n\n# Install in your home directory\n.github/bin/simple-install.sh ~/bin\n\n# For a system directory that requires root-access, call scfript with sudo.\nsudo .github/bin/simple-install.sh /usr/local/bin\n```\n\n(this requies a compliant `install` utility, otherwise simply copy\nthe binaries from `bazel-bin/` to your desired location)\n\n### Test\n\nWe strongly encourage running the test suite using [bazel]:\n\n```bash\n# Run all tests\nbazel test -c opt //...\n```\n\nWhenever adding new features in file, say, `foo.cc` always make sure to also\nupdate (or add) the corresponding `foo_test.cc`. Once you've written the\ntest, you can use `.github/bin/generate-coverage-html.sh` to double-check\nthat you have covered all code-paths in your test; narrow the coverage\nrun to your test to make sure coverage is not accidentally coming from\nunrelated tests that happen to use the library:\n\n```bash\nMODE=coverage .github/bin/build-and-test.sh //foo/bar:foo_test\n.github/bin/generate-coverage-html.sh\n```\n\n## Mailing Lists\n\nJoin the Verible community!\n\n*   Developers: verible-dev@googlegroups.com\n    ([join](https://groups.google.com/forum/#!forum/verible-dev/join))\n*   Users: verible-users@googlegroups.com\n    ([join](https://groups.google.com/forum/#!forum/verible-users/join))\n\n### Future\n\nThe Verible team is interested in exploring how it can help other tool\ndevelopers in providing a SystemVerilog front end, for example, emitting an\nabstract syntax tree (AST) or possibly even provide more higher-level\n[UHDM] format. If you are interested in collaborating, contact us.\n\n[bazel]: https://bazel.build/\n[SV-LRM]: https://ieeexplore.ieee.org/document/8299595\n[lint-rule-list]: https://chipsalliance.github.io/verible/lint.html\n[github-lint-action]: https://github.com/chipsalliance/verible-linter-action\n[github-format-action]: https://github.com/chipsalliance/verible-formatter-action\n[binary releases]: https://github.com/chipsalliance/verible/releases\n[language server protocol]: https://microsoft.github.io/language-server-protocol/\n[UHDM]: https://github.com/chipsalliance/UHDM\n[homebrew]: https://github.com/chipsalliance/homebrew-verible\n[Nix]: https://search.nixos.org/packages?channel=unstable\u0026query=verible\n[chocolatey]: https://chocolatey.org/\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fchipsalliance%2Fverible","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fchipsalliance%2Fverible","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fchipsalliance%2Fverible/lists"}