{"id":19499829,"url":"https://github.com/clarkfieseln/fpga_hw_sim_fwk","last_synced_at":"2025-04-25T22:34:34.056Z","repository":{"id":51491752,"uuid":"482016397","full_name":"ClarkFieseln/FPGA_HW_SIM_FWK","owner":"ClarkFieseln","description":"FPGA Hardware Simulation Framework","archived":false,"fork":false,"pushed_at":"2023-01-01T17:17:13.000Z","size":2290,"stargazers_count":12,"open_issues_count":1,"forks_count":1,"subscribers_count":3,"default_branch":"main","last_synced_at":"2023-04-25T01:34:13.835Z","etag":null,"topics":["api","emulation","emulator","fpga","fpga-programming","hdl","pyqt","pyqt5","python","python-3","python3","simulation","simulator","vhdl","vhdl-code"],"latest_commit_sha":null,"homepage":"","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/ClarkFieseln.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2022-04-15T16:19:26.000Z","updated_at":"2023-03-08T05:06:39.000Z","dependencies_parsed_at":"2023-01-31T23:50:33.745Z","dependency_job_id":null,"html_url":"https://github.com/ClarkFieseln/FPGA_HW_SIM_FWK","commit_stats":null,"previous_names":[],"tags_count":null,"template":null,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ClarkFieseln%2FFPGA_HW_SIM_FWK","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ClarkFieseln%2FFPGA_HW_SIM_FWK/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ClarkFieseln%2FFPGA_HW_SIM_FWK/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ClarkFieseln%2FFPGA_HW_SIM_FWK/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/ClarkFieseln","download_url":"https://codeload.github.com/ClarkFieseln/FPGA_HW_SIM_FWK/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":224019605,"owners_count":17242177,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["api","emulation","emulator","fpga","fpga-programming","hdl","pyqt","pyqt5","python","python-3","python3","simulation","simulator","vhdl","vhdl-code"],"created_at":"2024-11-10T22:06:25.158Z","updated_at":"2024-11-10T22:06:25.814Z","avatar_url":"https://github.com/ClarkFieseln.png","language":"Python","funding_links":[],"categories":[],"sub_categories":[],"readme":"# FPGA_HW_SIM_FWK\nFPGA Hardware Simulation Framework\n\n[Article in Code Project](https://www.codeproject.com/Articles/5329919/FPGA-Hardware-Simulation-Framework-FPGA-HW-SIM-FWK \"FPGA_HW_SIM_FWK Article in Code Project\")\n\n[New GitHub Project with improved performance](https://github.com/ClarkFieseln/FPGA_HW_SIM_FWK_2)\n\n## Simulate hardware containing an FPGA programmed in VHDL interactively!\n\n![plot](./img/simulation.png)\n\n## Architecture overview\n\n![plot](./img/architecture_overview.png)\n\n## FPGA GUI\n\n![plot](./img/fpga_gui.png)\n\n## FPGA_HW_SIM_FWK (demo video)\n\n[Demo Video](https://www.youtube.com/watch?v=Yqu1DDGK04c \"FPGA_HW_SIM_FWK Demo Video\")\n\n## Summary\nThis tool provides the following features, usually not supported by standard simulation methods:\n- GUI\n- concurrent input / output (up to 330Hz)\n- interactive experience with emulated HW\n\nAlthough no \"real-time\" is supported, with simulation rates of up to 330Hz the stimulus and results are fast enough\nto produce a realistic HW behavior.\n\nFor a project with improved performance, with up to 40kHz simulation rates, please refer to\n[FPGA_HW_SIM_FWK_2](https://github.com/ClarkFieseln/FPGA_HW_SIM_FWK_2)\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fclarkfieseln%2Ffpga_hw_sim_fwk","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fclarkfieseln%2Ffpga_hw_sim_fwk","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fclarkfieseln%2Ffpga_hw_sim_fwk/lists"}