{"id":13417007,"url":"https://github.com/dalance/sv-parser","last_synced_at":"2025-10-17T12:47:52.022Z","repository":{"id":35120677,"uuid":"195226023","full_name":"dalance/sv-parser","owner":"dalance","description":"SystemVerilog parser library fully compliant with IEEE 1800-2017","archived":false,"fork":false,"pushed_at":"2025-03-04T00:41:11.000Z","size":50568,"stargazers_count":438,"open_issues_count":35,"forks_count":58,"subscribers_count":18,"default_branch":"master","last_synced_at":"2025-05-10T02:24:29.098Z","etag":null,"topics":["parser","rust","rust-crate","systemverilog","verilog"],"latest_commit_sha":null,"homepage":"","language":"Rust","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/dalance.png","metadata":{"files":{"readme":"README.md","changelog":"CHANGELOG.md","contributing":null,"funding":".github/FUNDING.yml","license":"LICENSE-APACHE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null},"funding":{"github":"dalance"}},"created_at":"2019-07-04T11:05:37.000Z","updated_at":"2025-05-08T16:56:02.000Z","dependencies_parsed_at":"2023-01-15T14:14:43.056Z","dependency_job_id":"1c2bb963-d24c-42b1-87f4-75f55e1524cd","html_url":"https://github.com/dalance/sv-parser","commit_stats":{"total_commits":548,"total_committers":13,"mean_commits":42.15384615384615,"dds":"0.16788321167883213","last_synced_commit":"2f6e404c89920d7aa219209993784d0420f513fa"},"previous_names":[],"tags_count":59,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/dalance%2Fsv-parser","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/dalance%2Fsv-parser/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/dalance%2Fsv-parser/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/dalance%2Fsv-parser/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/dalance","download_url":"https://codeload.github.com/dalance/sv-parser/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":254337612,"owners_count":22054253,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["parser","rust","rust-crate","systemverilog","verilog"],"created_at":"2024-07-30T22:00:31.111Z","updated_at":"2025-10-17T12:47:51.912Z","avatar_url":"https://github.com/dalance.png","language":"Rust","funding_links":["https://github.com/sponsors/dalance"],"categories":["HDL parsers","Rust","Circuit Compilers","Hardware Description Language","Frameworks","Hardware Verification"],"sub_categories":["Tools"],"readme":"# sv-parser\nSystemVerilog parser library fully compliant with [IEEE 1800-2017](https://standards.ieee.org/standard/1800-2017.html).\n\n[![Actions Status](https://github.com/dalance/sv-parser/workflows/Regression/badge.svg)](https://github.com/dalance/sv-parser/actions)\n[![Crates.io](https://img.shields.io/crates/v/sv-parser.svg)](https://crates.io/crates/sv-parser)\n[![Docs.rs](https://docs.rs/sv-parser/badge.svg)](https://docs.rs/sv-parser)\n\n## Tools using sv-parser\n\n* [morty](https://github.com/zarubaf/morty): A SystemVerilog source file pickler\n* [svinst](https://github.com/sgherbst/svinst): Determines the modules declared and instantiated in a SystemVerilog file\n* [svlint](https://github.com/dalance/svlint): SystemVerilog linter\n* [svls](https://github.com/dalance/svls): SystemVerilog language server\n\n## Usage\n\n```Cargo.toml\n[dependencies]\nsv-parser = \"0.13.3\"\n```\n\nsv-parser provides [`parse_sv`](https://docs.rs/sv-parser/latest/sv_parser/fn.parse_sv.html) function which returns [`SyntaxTree`](https://docs.rs/sv-parser/latest/sv_parser/struct.SyntaxTree.html).\n`SyntaxTree` shows Concrete Syntax Tree. It has the preprocessed string and the parsed tree.\n\n[`RefNode`](https://docs.rs/sv-parser/latest/sv_parser/any_node/enum.RefNode.html) shows a reference to any node of `SyntaxTree`.\nYou can get `RefNode` through an iterator of `SyntaxTree`.\nVariant names of `RefNode` follows \"Annex A Formal syntax\" of IEEE 1800-2017.\n\n[`Locate`](https://docs.rs/sv-parser/latest/sv_parser/struct.Locate.html) shows a position of token. All leaf node of `SyntaxTree` is `Locate`.\nYou can get string from `Locate` by [`get_str`](https://docs.rs/sv-parser/latest/sv_parser/struct.SyntaxTree.html#method.get_str).\n\n## Example\n\nThe following example parses a SystemVerilog source file and shows module names.\n\n```rust\nuse std::collections::HashMap;\nuse std::env;\nuse std::path::PathBuf;\nuse sv_parser::{parse_sv, unwrap_node, Locate, RefNode};\n\nfn main() {\n    let args: Vec\u003cString\u003e = env::args().collect();\n\n    // The path of SystemVerilog source file\n    let path = PathBuf::from(\u0026args[1]);\n    // The list of defined macros\n    let defines = HashMap::new();\n    // The list of include paths\n    let includes: Vec\u003cPathBuf\u003e = Vec::new();\n\n    // Parse\n    let result = parse_sv(\u0026path, \u0026defines, \u0026includes, false, false);\n\n    if let Ok((syntax_tree, _)) = result {\n        // \u0026SyntaxTree is iterable\n        for node in \u0026syntax_tree {\n            // The type of each node is RefNode\n            match node {\n                RefNode::ModuleDeclarationNonansi(x) =\u003e {\n                    // unwrap_node! gets the nearest ModuleIdentifier from x\n                    let id = unwrap_node!(x, ModuleIdentifier).unwrap();\n\n                    let id = get_identifier(id).unwrap();\n\n                    // Original string can be got by SyntaxTree::get_str(self, locate: \u0026Locate)\n                    let id = syntax_tree.get_str(\u0026id).unwrap();\n                    println!(\"module: {}\", id);\n                }\n                RefNode::ModuleDeclarationAnsi(x) =\u003e {\n                    let id = unwrap_node!(x, ModuleIdentifier).unwrap();\n                    let id = get_identifier(id).unwrap();\n                    let id = syntax_tree.get_str(\u0026id).unwrap();\n                    println!(\"module: {}\", id);\n                }\n                _ =\u003e (),\n            }\n        }\n    } else {\n        println!(\"Parse failed\");\n    }\n}\n\nfn get_identifier(node: RefNode) -\u003e Option\u003cLocate\u003e {\n    // unwrap_node! can take multiple types\n    match unwrap_node!(node, SimpleIdentifier, EscapedIdentifier) {\n        Some(RefNode::SimpleIdentifier(x)) =\u003e {\n            return Some(x.nodes.0);\n        }\n        Some(RefNode::EscapedIdentifier(x)) =\u003e {\n            return Some(x.nodes.0);\n        }\n        _ =\u003e None,\n    }\n}\n```\n\n## License\n\nLicensed under either of\n\n * Apache License, Version 2.0, ([LICENSE-APACHE](LICENSE-APACHE) or http://www.apache.org/licenses/LICENSE-2.0)\n * MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)\n\nat your option.\n\n### Contribution\n\nUnless you explicitly state otherwise, any contribution intentionally\nsubmitted for inclusion in the work by you, as defined in the Apache-2.0\nlicense, shall be dual licensed as above, without any additional terms or\nconditions.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdalance%2Fsv-parser","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fdalance%2Fsv-parser","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdalance%2Fsv-parser/lists"}