{"id":15396425,"url":"https://github.com/de3ph/a-simple-8-bit-processor","last_synced_at":"2026-02-25T00:31:59.323Z","repository":{"id":154359075,"uuid":"383204719","full_name":"De3ph/A-Simple-8-Bit-Processor","owner":"De3ph","description":null,"archived":false,"fork":false,"pushed_at":"2021-07-09T20:31:45.000Z","size":281,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"main","last_synced_at":"2024-12-30T20:23:52.519Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"SystemVerilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/De3ph.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2021-07-05T16:37:09.000Z","updated_at":"2024-01-19T20:05:38.000Z","dependencies_parsed_at":"2023-05-31T03:00:30.158Z","dependency_job_id":null,"html_url":"https://github.com/De3ph/A-Simple-8-Bit-Processor","commit_stats":{"total_commits":10,"total_committers":2,"mean_commits":5.0,"dds":"0.30000000000000004","last_synced_commit":"fb2cdc1fbdfd7e510487b45a05b6f5982e6fd71b"},"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/De3ph%2FA-Simple-8-Bit-Processor","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/De3ph%2FA-Simple-8-Bit-Processor/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/De3ph%2FA-Simple-8-Bit-Processor/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/De3ph%2FA-Simple-8-Bit-Processor/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/De3ph","download_url":"https://codeload.github.com/De3ph/A-Simple-8-Bit-Processor/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":239800428,"owners_count":19699128,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-10-01T15:33:33.352Z","updated_at":"2025-10-30T20:52:46.409Z","avatar_url":"https://github.com/De3ph.png","language":"SystemVerilog","funding_links":[],"categories":[],"sub_categories":[],"readme":"# A-Simple-8-Bit-Processor\n\nThe objective of this project is to design a simple microprocessor with a custom\ninstruction set. The processor should consist of the following four main components: \n\n  * A register file\n  * An *Arithmetic and Logic Unit* (*ALU*)\n  * A *Read-Only Instruction Memory* (*IMEM*)\n  * A *Read/Write Data Memory* (*DMEM*)\n\n## Instruction Set and Format\nYour processor should implement the following basic instruction set:\n\n    \nInstruction | Opcode/Function | Operation \n---- | ---- | ----  \nadd rd, ra, rb | 0000 / 000 | rd = ra + rb\nsub rd, ra, rb | 0000 / 010 | rd = ra - rb \nand rd, ra, rb | 0000 / 100 | rd = ra AND rb \nor rd, ra, rb | 0000 / 101 | rd = ra OR rb \naddi rd, ra, imm | 0100 | rd = ra + imm \nlw rd, imm(ra) | 1011 | rd = DMEM[ra + imm] \nsw rd, imm(ra) | 1111 | DMEM[ra + imm] = rd \nbeq rd, ra, imm | 1000 | If(ra == rd) pc = pc + imm \nj addr | 0010 | pc = pc + addr \n\n    \nThe program code is stored as 16-bit instructions in the IMEM. The processor\nimplements three types of instruction:\n\n\nType | 15-12 | 11-9 | 8-6 | 5-3 | 2-0 \n---- | ----- | ---- |---- | --- | ---\nR (Register) | Opcode | Rd | Ra | Rb | Func\nI (Immediate) | Opcode | Rd | Ra | Imm[5:0] \nJ (Jumpp) | Opcode | Don’t care | Addr[7-0]\n\nData Path Components:\n * **Program Counter**: One 8-bit register\n * **Register File**: Holds 8-bit 8 register\n * **Instruction Memory**: 8-bit address input, and outputs 16-bit\n * **Data Memory**: 8-bit read/write memory\n * **ALU**: Performs arithmetic and logical operations\n\nControl Unit: Generates necessary signals to the data-path. Check single-cycle ARM\nprocessor design in the lecture slides to design the signals and implement the control\nunit.\n\nHint: The signals can be defined as **MemToReg**, **MemWrite**, **RegWrite**, **ALUSrc**,\n**Branch**, **Jump**…\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fde3ph%2Fa-simple-8-bit-processor","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fde3ph%2Fa-simple-8-bit-processor","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fde3ph%2Fa-simple-8-bit-processor/lists"}