{"id":29305652,"url":"https://github.com/defano/digital-design","last_synced_at":"2026-02-02T09:36:56.240Z","repository":{"id":76611526,"uuid":"66210945","full_name":"defano/digital-design","owner":"defano","description":"An introduction to integrated circuit design with Verilog and the Papilio Pro development board.","archived":false,"fork":false,"pushed_at":"2025-01-05T20:06:12.000Z","size":36791,"stargazers_count":14,"open_issues_count":0,"forks_count":7,"subscribers_count":4,"default_branch":"master","last_synced_at":"2025-07-07T05:48:56.907Z","etag":null,"topics":["digital-design","papilio","papilio-board","papilio-hardware","verilog","xilinx"],"latest_commit_sha":null,"homepage":"","language":"Verilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/defano.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE.txt","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2016-08-21T17:19:07.000Z","updated_at":"2025-01-05T20:06:16.000Z","dependencies_parsed_at":null,"dependency_job_id":"43d51bd4-f8cd-4ac6-b08a-597f1ff74c6b","html_url":"https://github.com/defano/digital-design","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/defano/digital-design","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/defano%2Fdigital-design","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/defano%2Fdigital-design/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/defano%2Fdigital-design/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/defano%2Fdigital-design/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/defano","download_url":"https://codeload.github.com/defano/digital-design/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/defano%2Fdigital-design/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":29009633,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-02-02T08:40:12.472Z","status":"ssl_error","status_checked_at":"2026-02-02T08:40:10.926Z","response_time":58,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.6:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["digital-design","papilio","papilio-board","papilio-hardware","verilog","xilinx"],"created_at":"2025-07-07T05:40:25.326Z","updated_at":"2026-02-02T09:36:56.228Z","avatar_url":"https://github.com/defano.png","language":"Verilog","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Introduction to Digital Design\n\nAn introduction to designing, simulating and synthesizing digital hardware designs using the Verilog hardware description language with open-sourced tools and hardware. This tutorial consists of several hardware designs which can be implemented (synthesized) and loaded onto [GadgetFactory's Papilio Pro](http://papilio.cc) hardware.\n\nSee the [Introduction to Digital Design](introduction-to-digital-design.pdf) slides from the 2017 Chicago Coder Conference for a refresher on chip design using Verilog.\n\n**Updated** October 2018 with installation instructions for current tools and 64-bit Ubuntu 18.04 (Bionic Beaver).\n\n**Updated** January 2025 with a few updates to installation instructions. Note that GadgetFactory has shuttered and that the Papilio hardware is sadly no longer for sale. Alchitry Au (or Cu) with the SparkFun Qwiic Connect System offers a modern alternative to Papilio. While the general concepts described here are very much transferrable to Alchitry or other FPGA hobbyist tools, they will not work verbatim. \n\n## Hardware\n\nNo special hardware is needed to simulate circuit designs, but to fully realize your work in electronic form you'll want your own [Papilio Pro](http://papilio.cc/index.php?n=Papilio.PapilioPro) and [Papilio LogicStart Megawing](http://papilio.cc/index.php?n=Papilio.LogicStartMegaWing) development boards. I recommend purchasing them together as a kit [for about $100.00 online](http://store.gadgetfactory.net/logicstart-megawing-papilio-bundle/).\n\nThe Papilio Pro contains a [Xilinx Spartan 6  FPGA](https://www.xilinx.com/products/silicon-devices/fpga/spartan-6.html) that will accept our circuit designs. The LogicStart Megawing is a daughter board that plugs into the Papilio Pro and provides various buttons, switches, LEDs, and seven-segment displays to experiment with.\n\nA detailed description (and schematics) of both boards can be found on GadgetFactory's website. ([Papilio Pro ](http://papilio.cc/index.php?n=Papilio.PapilioPro) | [LogicStart Megawing](http://papilio.cc/index.php?n=Papilio.LogicStartMegaWing))\n\n#### Looking to test a brand new Papilio Pro?\n\nLooking for a known-good example with which to verify your setup? Each of the example projects include a pre-built `.bit` file that's ready to be programmed onto the Papilio Pro's Spartan 6 FPGA.\n\nInstall the `papilio-prog` programmer ([instructions here](docs/install-instructions.md)), then program the device following [these instructions](docs/papilio-instructions.md).\n\n## Getting Started\n\nI find that the best way to learn a new language or technology is to experiment with a working example. Each of the example projects (below) offers a sandbox to play in. Simulate the design; view the waveforms; figure out what's happening; and see if you can make the recommended modifications. You'll be ready to create your own from scratch in no time!\n\nSee each of the instruction guides to learn how to install the toolchain, simulate and synthesize the designs, and load them onto the Papilio development boards:\n\n* [Instructions for installing open source tools](docs/install-instructions.md)\n* [Instructions for simulating designs and viewing waveforms](docs/simulation-instructions.md)\n* [Instructions for synthesizing designs for Xilinx chips on the Papilio hardware](docs/synthesis-instructions.md)\n* [Instructions for loading synthesized designs onto the Papilio board](docs/papilio-instructions.md)\n\n## Example Projects\n\nEach of these projects represents a working design that includes RTL source code, a simulation testbench, a user-constraints file (that provides a mapping of Verilog inputs/outputs to physical pins on the chip), scripts to synthesize the design to hardware, and a pre-built `.bit` programming file that you can load onto the Papilio without having to install or run Xilinx' ISE software.\n\nProjects are listed in ascending order of complexity.\n\nProject | Description\n--------|---------------------------\n[Knight Rider](knight-rider/) | A starter project that does nothing but cycle the Papilio LogicStart Megawing's eight LEDs in a pattern reminiscent of Kit from the 80s TV show Knight Rider. This is a good starting point for testing your toolchain and hardware.\n[Breathing LEDs](breathing-led/) | Drives all the LEDs on the LogicStart MegaWing in a breathing pattern, slowly modulating their brightness from 0 to 100% and back again.\n[Seven Segment Counter](seven-segment-counter/) | A somewhat more complicated project that drives all four seven-segment digits on the LogicStart with a rapidly incrementing decimal count.\n[Konami Acceptor](konami-acceptor/) | A simple state machine that listens to d-pad inputs on the LogicStart MegaWing to detect the famous Konami sequence, up-up-down-down-left-right-left-right.\n[Serial Communications UART](uart/) | Implementation of a serial communications UART; allows the Papilio to communicate with a host PC using a serial communications terminal like PuTTY or minicom.\n[MicroBlaze Microcontroller](microblaze/) | Instructions for creating a basic \"system on a chip\" design that includes the Xilinx Microblaze CPU, 16KB of internal \"block\" RAM, a general purpose output module for controlling LEDs and an embedded software project to drive it.\n[LogicStart Microcontroller](lsuc/) | A demonstration of controlling custom hardware components in software using a MicroBlaze CPU with IO bus integration to the UART, 7-segment displays, d-pad, toggle switches and LEDs. Provides hardware control via a terminal interface.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdefano%2Fdigital-design","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fdefano%2Fdigital-design","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdefano%2Fdigital-design/lists"}