{"id":29027475,"url":"https://github.com/devl/ensemble","last_synced_at":"2025-06-26T06:05:41.360Z","repository":{"id":34937627,"uuid":"39009723","full_name":"DevL/Ensemble","owner":"DevL","description":"Assembler of CAVEAT bytecode","archived":false,"fork":false,"pushed_at":"2015-07-27T12:14:15.000Z","size":120,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"master","last_synced_at":"2023-03-24T12:20:56.295Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":"","language":"Elixir","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/DevL.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2015-07-13T12:06:31.000Z","updated_at":"2015-07-13T12:08:37.000Z","dependencies_parsed_at":"2022-09-18T11:21:04.825Z","dependency_job_id":null,"html_url":"https://github.com/DevL/Ensemble","commit_stats":null,"previous_names":[],"tags_count":null,"template":null,"template_full_name":null,"purl":"pkg:github/DevL/Ensemble","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/DevL%2FEnsemble","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/DevL%2FEnsemble/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/DevL%2FEnsemble/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/DevL%2FEnsemble/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/DevL","download_url":"https://codeload.github.com/DevL/Ensemble/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/DevL%2FEnsemble/sbom","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":262010858,"owners_count":23244414,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2025-06-26T06:05:40.794Z","updated_at":"2025-06-26T06:05:41.353Z","avatar_url":"https://github.com/DevL.png","language":"Elixir","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Ensemble\n\nAssembler of CAVEAT bytecode\n\n```assembly\nset.high r1, #0, #00A0 ; set the upper 16 bits of register 1 to #00A0, clear the lower 16 bits\nset.low r1, #1, #5600 ; set the lower 16 bits of register 1 to #5600, keep the upper 16 bits\nload r2, r1, -16 ; load the contents of memory address #00A055F0 (#00A05600 - #10) into register 2\nadd.u r3, r2, 1 ; add 1 to register 2 and store it in register 3\nstore r1, r3 ; store the contents of register 3 at the memory address contained in register 1 (#00A05600)\n```\n\n## Instructions\n\n* opcode (8 bits)\n* operands (24 bits)\n* for `set.high` and `set.low`, the second operand, `mode`, determines what happens to the other 16 bits of the register.\n * 0000 = clear all\n * 1111 = set all\n * 0001 = keep unaltered\n* in general an instruction suffix determines how operands are treated.\n * instructions with the suffix `.s` treats all their operands as signed.\n * instructions with the suffix `.u` treats all their operands as unsigned.\n * instructions with the suffix `.f` treats all their operands as float (32 bits).\n* address and memory manipulation (load, store, branch) treats the registers as unsigned, but the offset immediate value as signed. \n\n| Mnemonic | Opcode | Operands | Comment |\n|:---------|:---------------|:-------------------------------|:----------------------------------------------------|\n| hcf | 00000000 (0) | ignored | Halt and catch fire |\n| | 00000001 (1) | | Reserved |\n| ... | ... | ... | ... |\n| | 00001111 (15) | | Reserved |\n| set.high | 00010000 (16) | Rd, mode, C (16-bit) | Rd (upper 16 bits) = C, mode affects the other bits |\n| set.low | 00010001 (17) | Rd, mode, C (16-bit) | Rd (lower 16 bits) = C, mode affects the other bits |\n| copy | 00010010 (18) | Rd, Ra, 0000000000000000 | Rd = Ra |\n| | 00010011 (19) | | Reserved |\n| load | 00010100 (20) | Rd, Ra, C (16-bit, signed) | Load Rd with the four bytes addressed by Ra + C |\n| | 00010101 (21) | | Reserved |\n| | 00010110 (22) | | Reserved |\n| | 00010111 (23) | | Reserved |\n| store | 00011000 (24) | Rd, Ra, C (16-bit, signed) | Store the contents of Rd at the address Ra + C |\n| | 00011001 (25) | | Reserved |\n| ... | ... | ... | ... |\n| | 00011111 (31) | | Reserved |\n| add.s | 00100000 (32) | Rd, Ra, Rb, C (12-bit) | Rd = Ra + Rb + C (signed) |\n| add.u | 00100001 (33) | Rd, Ra, Rb, C (12-bit) | Rd = Ra + Rb + C (unsigned) |\n| sub.s | 00100010 (34) | Rd, Ra, Rb, C (12-bit) | Rd = Ra - Rb - C (signed) |\n| sub.u | 00100011 (35) | Rd, Ra, Rb, C (12-bit) | Rd = Ra - Rb - C (unsigned) |\n| mul.s | 00100100 (36) | RdHi, RdLo, Ra, Rb, 00000000 | RdHi, RdLo = Ra * Rb (signed) |\n| mul.u | 00100101 (37) | RdHi, RdLo, Ra, Rb, 00000000 | RdHi, RdLo = Ra * Rb (unsigned) |\n| div.s | 00100110 (38) | RdQu, RdRe, Ra, Rb, 00000000 | RdQu, RdRe = Ra / Rb (signed) |\n| div.u | 00100111 (39) | RdQu, RdRe, Ra, Rb, 00000000 | RdQu, RdRe = Ra / Rb (unsigned) |\n| | 00101000 (40) | | Reserved |\n| ... | ... | ... | ... |\n| | 00101111 (47) | | Reserved |\n| add.f | 00110000 (48) | | Rd = Ra + Rb (float) |\n| sub.f | 00110001 (49) | | Rd = Ra - Rb (float) |\n| mul.f | 00110010 (50) | | Rd = Ra * Rb (float) |\n| div.f | 00110011 (51) | | Rd = Ra / Rb (float) |\n| | 00110100 (52) | | Reserved |\n| ... | ... | ... | ... |\n| | 00111111 (63) | | Reserved |\n| and | 01000000 (64) | Rd, Ra, Rb, 000000000000 | Rd = Ra AND Rb (bitwise) |\n| or | 01000001 (65) | Rd, Ra, Rb, 000000000000 | Rd = Ra OR Rb (bitwise) |\n| xor | 01000010 (66) | Rd, Ra, Rb, 000000000000 | Rd = Ra EXCLUSIVE OR Rb (bitwise) |\n| not | 01000011 (67) | Rd, Ra, 0000000000000000 | Rd = NOT Ra (bitwise) |\n| | 01000100 (68) | | Reserved |\n| ... | ... | ... | ... |\n| | 01000111 (71) | | Reserved |\n| asl | 01001000 (72) | Rd, Ra, Rb, 000000000000 | Rd = Ra \u003c\u003c Rb |\n| asr | 01001001 (73) | Rd, Ra, Rb, 000000000000 | Rd = Ra \u003e\u003e Rb |\n| lsl | 01001010 (74) | Rd, Ra, Rb, 000000000000 | Rd = Ra \u003c\u003c\u003c Rb |\n| lsr | 01001011 (75) | Rd, Ra, Rb, 000000000000 | Rd = Ra \u003e\u003e\u003e Rb |\n| | 01001100 (76) | | Reserved |\n| ... | ... | ... | ... |\n| | 01001111 (79) | | Reserved |\n| beq | 01010000 (80) | Rd, Ra, Rb, C (12-bit, signed) | Go to address in Rd + C if Ra = Rb |\n| bne | 01010001 (81) | Rd, Ra, Rb, C (12-bit, signed) | Go to address in Rd + C if Ra != Rb |\n| bgt | 01010010 (82) | Rd, Ra, Rb, C (12-bit, signed) | Go to address in Rd + C if Ra \u003e Rb |\n| | 01010011 (83) | | Reserved |\n| ... | ... | ... | ... |\n| | 01111111 (127) | | Reserved |\n| | 10000000 (128) | | User-defined |\n| ... | ... | ... | ... |\n| | 11111111 (255) | | User-defined |\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdevl%2Fensemble","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fdevl%2Fensemble","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdevl%2Fensemble/lists"}