{"id":19125623,"url":"https://github.com/dmitmel/riscv-playground","last_synced_at":"2025-06-18T01:35:44.392Z","repository":{"id":95464117,"uuid":"227448498","full_name":"dmitmel/riscv-playground","owner":"dmitmel","description":"My experiments with the RISC-V ISA","archived":false,"fork":false,"pushed_at":"2022-11-09T12:15:45.000Z","size":56,"stargazers_count":2,"open_issues_count":0,"forks_count":1,"subscribers_count":2,"default_branch":"master","last_synced_at":"2025-01-03T09:46:00.660Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"Assembly","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"cc0-1.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/dmitmel.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"COPYING.txt","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2019-12-11T19:54:44.000Z","updated_at":"2024-10-31T09:17:17.000Z","dependencies_parsed_at":"2023-03-09T08:16:01.424Z","dependency_job_id":null,"html_url":"https://github.com/dmitmel/riscv-playground","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/dmitmel%2Friscv-playground","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/dmitmel%2Friscv-playground/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/dmitmel%2Friscv-playground/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/dmitmel%2Friscv-playground/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/dmitmel","download_url":"https://codeload.github.com/dmitmel/riscv-playground/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":240190907,"owners_count":19762591,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-11-09T05:36:13.260Z","updated_at":"2025-02-22T14:47:44.252Z","avatar_url":"https://github.com/dmitmel.png","language":"Assembly","funding_links":[],"categories":[],"sub_categories":[],"readme":"# riscv-playground\n\nMy experiments with [the RISC-V ISA](https://en.wikipedia.org/wiki/RISC-V).\n\n## Requirements\n\n- CMake\n- `make`\n- `riscv64-linux-gnu-gcc`\n- `qemu-riscv64`\n- (optional) `riscv64-linux-gnu-gdb`\n\n### Installation on Arch Linux\n\n```bash\nsudo pacman -S cmake make qemu{,-arch-extra} riscv64-linux-gnu-{gcc,gdb}\n```\n\n## Compiling\n\n```bash\ncmake -D CMAKE_BUILD_TYPE=Debug -B build\ncmake --build build\n```\n\n## Running\n\n```bash\ncd build\n# Make ensures that the executable has been built:\nmake run_\u003cexecutable\u003e\n# or:\nqemu-riscv64 \u003cexecutable\u003e\n```\n\n## Debugging\n\n```bash\n# in both terminals:\ncd build\n\n# in the first terminal:\nQEMU_GDB=1234 make run_\u003cexecutable\u003e\n# or:\nqemu-riscv64 -g 1234 \u003cexecutable\u003e\n\n# and in the second one:\nriscv64-linux-gnu-gdb -ex 'target remote :1234' \u003cexecutable\u003e\n```\n\n## Useful resources\n\n- [Official RISC-V manual](https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf)\n- [RISC-V calling convention](https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf)\n- [Unofficial RISC-V reference card](https://www.cl.cam.ac.uk/teaching/1617/ECAD+Arch/files/docs/RISCVGreenCardv8-20151013.pdf)\n- [Unofficial RISC-V reference card by James Zhu](https://github.com/jameslzhu/riscv-card/blob/master/riscv-card.pdf)\n- [RISC-V instruction set reference from rv8](https://michaeljclark.github.io/isa.html)\n- [GNU `as` manual](https://sourceware.org/binutils/docs/as/)\n- [\"Hello World\" tutorial from RARS](https://github.com/TheThirdOne/rars/wiki/Creating-Hello-World)\n- [Fundamentals of RISC-V assembly from RARS](https://github.com/TheThirdOne/rars/wiki/Fundamentals-of-RISC-V-Assembly)\n- [MIPS Assembly/Control Flow Instructions](https://en.wikibooks.org/wiki/MIPS_Assembly/Control_Flow_Instructions)\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdmitmel%2Friscv-playground","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fdmitmel%2Friscv-playground","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdmitmel%2Friscv-playground/lists"}