{"id":15660514,"url":"https://github.com/drom/spi","last_synced_at":"2026-01-08T14:05:59.209Z","repository":{"id":145177368,"uuid":"43520554","full_name":"drom/spi","owner":"drom","description":"spi memory controller","archived":false,"fork":false,"pushed_at":"2017-01-05T08:13:11.000Z","size":137,"stargazers_count":22,"open_issues_count":7,"forks_count":9,"subscribers_count":5,"default_branch":"master","last_synced_at":"2025-02-05T05:41:46.659Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"Verilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/drom.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2015-10-01T20:54:06.000Z","updated_at":"2024-12-12T09:22:48.000Z","dependencies_parsed_at":"2023-04-18T17:30:45.010Z","dependency_job_id":null,"html_url":"https://github.com/drom/spi","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/drom%2Fspi","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/drom%2Fspi/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/drom%2Fspi/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/drom%2Fspi/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/drom","download_url":"https://codeload.github.com/drom/spi/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":246271369,"owners_count":20750572,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-10-03T13:22:05.039Z","updated_at":"2026-01-08T14:05:59.121Z","avatar_url":"https://github.com/drom.png","language":"Verilog","funding_links":[],"categories":[],"sub_categories":[],"readme":"# SPI\nMemory controller for SPI memory\n\n## Features\n\n### Internal interface\n - 8, 16, 32, 64 bit configurable\n - multiple initiators\n - configurable cache organization, entries, associativity\n - Boot from external memory\n\n### External interface\n - single, dual and quad SPI\n - multiple chip support point-to-point\n - configurable clock phase\n - Execute-in-place (XIP) mode support\n - Double Data Rate (DDR) option\n - 24, 32 bit address\n - AutoBoot\n\n## Supported memory ICs\n\n - Spansion [S25FL{004|008|016}K](https://www.spansion.com/Support/Datasheets/S25FL004K-016K_00.pdf)\n - Spansion [S25FL{116|132|164}K](http://www.spansion.com/Support/Datasheets/S25FL1-K_00.pdf) {16|32|64} Mib / 108MHz\n - Spansion [S25FL216K](http://www.spansion.com/Support/Datasheets/S25FL216K_00.pdf) 16 Mib / 65MHz\n - Spansion [S25FL{128|256}S](http://www.spansion.com/Support/Datasheets/S25FL128S_256S_00.pdf) {128|256} Mib / 133MHz\n - Micron [N25Q128A](http://www.micron.com/~/media/Documents/Products/Data%20Sheet/NOR%20Flash/Serial%20NOR/N25Q/n25q_128mb_1_8v_65nm.pdf)\n - Micron [N25Q256A](http://www.micron.com/~/media/Documents/Products/Data%20Sheet/NOR%20Flash/Serial%20NOR/N25Q/n25q_256mb_3v_65nm.pdf)\n - Windbond [W25Q20EW](https://www.winbond.com/resource-files/w25q20ew_revf%2011252015%20sfdp.pdf)\n - ON Semi [LE25S81A](http://www.onsemi.com/pub_link/Collateral/LE25S81A-D.PDF)\n - ESMT [F25D64QA](http://www.esmt.com.tw/DB/manager/upload/F25D64QA_1.pdf)\n - AMIC [A25LQ080](http://www.amictechnology.com/datasheets/A25LQ080.pdf)\n - GeneralPlus [GPR25L3203F](http://www.generalplus.com/doc/ds/GPR25L3203FV10_ds.pdf)\n - Macronix [MX25L4006E](http://natisbad.org/NAS4/refs/MX25L4006E_3V_4Mb_v1.4.pdf)\n\n## Quad mode timing\n\n![quad spi addr mode](img/quad_spi_addr_mode.png)\n```js\n{signal: [\n  {name: 'SS#', wave: '10.................'},\n  {name: 'SCK', wave: '0.p................'},\n  {             node: '..a.......b.....c.d'},\n  {name: 'IO0', wave: 'x.11101011334455==z', data: '14 10 c 8 4 0 4 0'},\n  {name: 'IO0', wave: 'z.........334455==z', data: '15 11 d 9 5 1 5 1'},\n  {name: 'IO0', wave: 'z.........334455==z', data: '16 12 e a 6 2 6 2'},\n  {name: 'IO0', wave: 'z.........334455==z', data: '17 13 f b 7 3 7 3', node: '..A.......B.....C.D'}\n],\n  edge: ['a\u003c-\u003eb Instruction (EBh)', 'b\u003c-\u003ec Address', 'c\u003c-\u003ed Mode', 'a-A', 'b-B', 'c-C', 'd-D'],\n head:{tock:-2}\n}\n```\n\n## Clock modes\n\n![clock modes](img/clock_modes.png)\n\n```js\n{signal: [\n  {name: 'mode:0, CPOL:0, CPHA:0', wave: '0.Pp......', phase: 0.5},\n  {name: 'mode:1, CPOL:0, CPHA:1', wave: '0p.......l'},\n  {name: 'mode:2, CPOL:1, CPHA:0', wave: '1.Nn......', phase: 0.5},\n  {name: 'mode:3, CPOL:1, CPHA:1', wave: '1n.......h'},\n  {name: 'SDI',                    wave: 'x========x', data: '7 6 5 4 3 2 1 0'},\n]}\n```\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdrom%2Fspi","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fdrom%2Fspi","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fdrom%2Fspi/lists"}