{"id":19255831,"url":"https://github.com/eigenraven/rvasm","last_synced_at":"2025-04-21T15:30:40.312Z","repository":{"id":149264810,"uuid":"200913124","full_name":"eigenraven/rvasm","owner":"eigenraven","description":"RISC-V Assembler","archived":true,"fork":false,"pushed_at":"2023-10-26T15:39:28.000Z","size":46,"stargazers_count":18,"open_issues_count":2,"forks_count":5,"subscribers_count":1,"default_branch":"master","last_synced_at":"2025-03-12T19:43:37.967Z","etag":null,"topics":["assembler","extensible","risc-v","riscv","rust"],"latest_commit_sha":null,"homepage":null,"language":"Rust","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/eigenraven.png","metadata":{"files":{"readme":"README.MD","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2019-08-06T19:36:39.000Z","updated_at":"2024-11-24T22:15:34.000Z","dependencies_parsed_at":null,"dependency_job_id":"25291f0f-08ad-461d-9a36-d6d603fbef98","html_url":"https://github.com/eigenraven/rvasm","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/eigenraven%2Frvasm","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/eigenraven%2Frvasm/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/eigenraven%2Frvasm/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/eigenraven%2Frvasm/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/eigenraven","download_url":"https://codeload.github.com/eigenraven/rvasm/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":250080488,"owners_count":21371515,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["assembler","extensible","risc-v","riscv","rust"],"created_at":"2024-11-09T18:43:03.558Z","updated_at":"2025-04-21T15:30:39.962Z","avatar_url":"https://github.com/eigenraven.png","language":"Rust","funding_links":[],"categories":[],"sub_categories":[],"readme":"# A RISC-V assembler\n\nAn extensible RISC-V assembler written in Rust.\nThe goal of this project is to provide a platform for experimentation with the RISC-V architecture by having\nan assembler that allows for quick iteration of tiny programs compiled into flat binaries, and of instruction\nsets defined in simple to edit [TOML 0.5](https://github.com/toml-lang/toml) files.\n\n## Usage\n```\nUSAGE:\n    rvasm [FLAGS] [OPTIONS] [--] [input_file]\n\nFLAGS:\n    -h, --help       Prints help information\n    -b, --binary     In addition to writing a file, print the assembly in binary to the terminal\n    -V, --version    Prints version information\n    -v, --verbose    Enable additional output\n\nOPTIONS:\n    -a, --arch \u003carch\u003e                  RISC-V variant to assemble for, like RV32IMZamZifencei (finds config files in\n                                       standard path) [default: RV32I]\n    -c, --cfg \u003ccfg\u003e...                 Additional config file paths to parse\n    -s, --string \u003cinput_string\u003e        Input string instead of file, all semicolons are replaced by newlines\n    -o, --output-file \u003coutput_file\u003e    Output (assembled) file path\n    -f, --format \u003coutput_format\u003e       Output file format (only `flat` binary is supported) [default: flat]\n\nARGS:\n    \u003cinput_file\u003e    Input file path\n```\n\nFor example, if you have a file `sample1.s`:\n```\naddi s0, s1, 2+2\n```\nYou can assemble it by using the command `rvasm sample1.s -o sample1.bin`.\nThis is the equivalent of options: `rvasm sample1.s -o sample1.bin -a RV32I -f flat`\n\nIf you'd like to peek into the binary representation of instructions (only 32-bit ILEN supported now),\nyou can invoke rvasm like this:\n```\nrvasm -s \"addi s0, s1, 2+2\" -b\n```\nWhich will produce the following output:\n```\nBinary assembly:\n00000000010001001000010000010011 \nWarning: no output file specified so none was created.\n```\nWhich displays the 32-bit instructions as 32 binary digits, rightmost one is the LSB and leftmost is MSB.\n(Swapped around from the actual little endian byte encoding for readability)\n\n## Defining instruction sets\nCreate a copy of [cfg/help.toml](cfg/help.toml) and follow the comments to define instruction formats and specific encodings.\nYou can also take a look at the included RV32I definition in [cfg/rv32i.toml](cfg/rv32i.toml).\n\n## Supported directives\nApart from the instructions defined in the TOML files, the assembler supports a few directives:\n\n* `$` - replaced by current PC value\n* `.org ADDRESS` - sets the internal PC value and output file position to `ADDRESS`\n* `.equ NAME VAL`/`.define NAME VAL` - defines constants that can be used in expressions instead of integers\n* `.label:` - labels starting with a dot are local to the scope of their parent label\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Feigenraven%2Frvasm","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Feigenraven%2Frvasm","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Feigenraven%2Frvasm/lists"}