{"id":24443709,"url":"https://github.com/endlessm/u-boot-meson","last_synced_at":"2025-07-04T17:32:59.118Z","repository":{"id":27186726,"uuid":"30656879","full_name":"endlessm/u-boot-meson","owner":"endlessm","description":null,"archived":false,"fork":false,"pushed_at":"2022-03-21T22:00:44.000Z","size":59394,"stargazers_count":14,"open_issues_count":0,"forks_count":11,"subscribers_count":35,"default_branch":"master","last_synced_at":"2025-03-26T15:42:59.712Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":"C","has_issues":false,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/endlessm.png","metadata":{"files":{"readme":"README","changelog":null,"contributing":null,"funding":null,"license":"COPYING","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2015-02-11T16:19:39.000Z","updated_at":"2024-12-29T12:51:19.000Z","dependencies_parsed_at":"2022-08-17T17:10:50.704Z","dependency_job_id":null,"html_url":"https://github.com/endlessm/u-boot-meson","commit_stats":null,"previous_names":[],"tags_count":100,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/endlessm%2Fu-boot-meson","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/endlessm%2Fu-boot-meson/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/endlessm%2Fu-boot-meson/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/endlessm%2Fu-boot-meson/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/endlessm","download_url":"https://codeload.github.com/endlessm/u-boot-meson/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":248633925,"owners_count":21136941,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2025-01-20T22:17:12.620Z","updated_at":"2025-04-12T21:28:19.012Z","avatar_url":"https://github.com/endlessm.png","language":"C","funding_links":[],"categories":[],"sub_categories":[],"readme":"#\n# (C) Copyright 2000 - 2009\n# Wolfgang Denk, DENX Software Engineering, wd@denx.de.\n#\n# See file CREDITS for list of people who contributed to this\n# project.\n#\n# This program is free software; you can redistribute it and/or\n# modify it under the terms of the GNU General Public License as\n# published by the Free Software Foundation; either version 2 of\n# the License, or (at your option) any later version.\n#\n# This program is distributed in the hope that it will be useful,\n# but WITHOUT ANY WARRANTY; without even the implied warranty of\n# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\tSee the\n# GNU General Public License for more details.\n#\n# You should have received a copy of the GNU General Public License\n# along with this program; if not, write to the Free Software\n# Foundation, Inc., 59 Temple Place, Suite 330, Boston,\n# MA 02111-1307 USA\n#\n\nSummary:\n========\n\nThis directory contains the source code for U-Boot, a boot loader for\nEmbedded boards based on PowerPC, ARM, MIPS and several other\nprocessors, which can be installed in a boot ROM and used to\ninitialize and test the hardware or to download and run application\ncode.\n\nThe development of U-Boot is closely related to Linux: some parts of\nthe source code originate in the Linux source tree, we have some\nheader files in common, and special provision has been made to\nsupport booting of Linux images.\n\nSome attention has been paid to make this software easily\nconfigurable and extendable. For instance, all monitor commands are\nimplemented with the same call interface, so that it's very easy to\nadd new commands. Also, instead of permanently adding rarely used\ncode (for instance hardware test utilities) to the monitor, you can\nload and run it dynamically.\n\n\nStatus:\n=======\n\nIn general, all boards for which a configuration option exists in the\nMakefile have been tested to some extent and can be considered\n\"working\". In fact, many of them are used in production systems.\n\nIn case of problems see the CHANGELOG and CREDITS files to find out\nwho contributed the specific port. The MAINTAINERS file lists board\nmaintainers.\n\n\nWhere to get help:\n==================\n\nIn case you have questions about, problems with or contributions for\nU-Boot you should send a message to the U-Boot mailing list at\n\u003cu-boot@lists.denx.de\u003e. There is also an archive of previous traffic\non the mailing list - please search the archive before asking FAQ's.\nPlease see http://lists.denx.de/pipermail/u-boot and\nhttp://dir.gmane.org/gmane.comp.boot-loaders.u-boot\n\n\nWhere to get source code:\n=========================\n\nThe U-Boot source code is maintained in the git repository at\ngit://www.denx.de/git/u-boot.git ; you can browse it online at\nhttp://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary\n\nThe \"snapshot\" links on this page allow you to download tarballs of\nany version you might be interested in. Official releases are also\navailable for FTP download from the ftp://ftp.denx.de/pub/u-boot/\ndirectory.\n\nPre-built (and tested) images are available from\nftp://ftp.denx.de/pub/u-boot/images/\n\n\nWhere we come from:\n===================\n\n- start from 8xxrom sources\n- create PPCBoot project (http://sourceforge.net/projects/ppcboot)\n- clean up code\n- make it easier to add custom boards\n- make it possible to add other [PowerPC] CPUs\n- extend functions, especially:\n  * Provide extended interface to Linux boot loader\n  * S-Record download\n  * network boot\n  * PCMCIA / CompactFlash / ATA disk / SCSI ... boot\n- create ARMBoot project (http://sourceforge.net/projects/armboot)\n- add other CPU families (starting with ARM)\n- create U-Boot project (http://sourceforge.net/projects/u-boot)\n- current project page: see http://www.denx.de/wiki/U-Boot\n\n\nNames and Spelling:\n===================\n\nThe \"official\" name of this project is \"Das U-Boot\". The spelling\n\"U-Boot\" shall be used in all written text (documentation, comments\nin source files etc.). Example:\n\n\tThis is the README file for the U-Boot project.\n\nFile names etc. shall be based on the string \"u-boot\". Examples:\n\n\tinclude/asm-ppc/u-boot.h\n\n\t#include \u003casm/u-boot.h\u003e\n\nVariable names, preprocessor constants etc. shall be either based on\nthe string \"u_boot\" or on \"U_BOOT\". Example:\n\n\tU_BOOT_VERSION\t\tu_boot_logo\n\tIH_OS_U_BOOT\t\tu_boot_hush_start\n\n\nVersioning:\n===========\n\nStarting with the release in October 2008, the names of the releases\nwere changed from numerical release numbers without deeper meaning\ninto a time stamp based numbering. Regular releases are identified by\nnames consisting of the calendar year and month of the release date.\nAdditional fields (if present) indicate release candidates or bug fix\nreleases in \"stable\" maintenance trees.\n\nExamples:\n\tU-Boot v2009.11     - Release November 2009\n\tU-Boot v2009.11.1   - Release 1 in version November 2009 stable tree\n\tU-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release\n\n\nDirectory Hierarchy:\n====================\n\n/arch\t\t\tArchitecture specific files\n  /arm\t\t\tFiles generic to ARM architecture\n    /cpu\t\tCPU specific files\n      /arm720t\t\tFiles specific to ARM 720 CPUs\n      /arm920t\t\tFiles specific to ARM 920 CPUs\n\t/at91rm9200\tFiles specific to Atmel AT91RM9200 CPU\n\t/imx\t\tFiles specific to Freescale MC9328 i.MX CPUs\n\t/s3c24x0\tFiles specific to Samsung S3C24X0 CPUs\n      /arm925t\t\tFiles specific to ARM 925 CPUs\n      /arm926ejs\tFiles specific to ARM 926 CPUs\n      /arm1136\t\tFiles specific to ARM 1136 CPUs\n      /ixp\t\tFiles specific to Intel XScale IXP CPUs\n      /pxa\t\tFiles specific to Intel XScale PXA CPUs\n      /s3c44b0\t\tFiles specific to Samsung S3C44B0 CPUs\n      /sa1100\t\tFiles specific to Intel StrongARM SA1100 CPUs\n    /lib\t\tArchitecture specific library files\n  /avr32\t\tFiles generic to AVR32 architecture\n    /cpu\t\tCPU specific files\n    /lib\t\tArchitecture specific library files\n  /blackfin\t\tFiles generic to Analog Devices Blackfin architecture\n    /cpu\t\tCPU specific files\n    /lib\t\tArchitecture specific library files\n  /i386\t\t\tFiles generic to i386 architecture\n    /cpu\t\tCPU specific files\n    /lib\t\tArchitecture specific library files\n  /m68k\t\t\tFiles generic to m68k architecture\n    /cpu\t\tCPU specific files\n      /mcf52x2\t\tFiles specific to Freescale ColdFire MCF52x2 CPUs\n      /mcf5227x\t\tFiles specific to Freescale ColdFire MCF5227x CPUs\n      /mcf532x\t\tFiles specific to Freescale ColdFire MCF5329 CPUs\n      /mcf5445x\t\tFiles specific to Freescale ColdFire MCF5445x CPUs\n      /mcf547x_8x\tFiles specific to Freescale ColdFire MCF547x_8x CPUs\n    /lib\t\tArchitecture specific library files\n  /microblaze\t\tFiles generic to microblaze architecture\n    /cpu\t\tCPU specific files\n    /lib\t\tArchitecture specific library files\n  /mips\t\t\tFiles generic to MIPS architecture\n    /cpu\t\tCPU specific files\n    /lib\t\tArchitecture specific library files\n  /nios2\t\tFiles generic to Altera NIOS2 architecture\n    /cpu\t\tCPU specific files\n    /lib\t\tArchitecture specific library files\n  /powerpc\t\tFiles generic to PowerPC architecture\n    /cpu\t\tCPU specific files\n      /74xx_7xx\t\tFiles specific to Freescale MPC74xx and 7xx CPUs\n      /mpc5xx\t\tFiles specific to Freescale MPC5xx CPUs\n      /mpc5xxx\t\tFiles specific to Freescale MPC5xxx CPUs\n      /mpc8xx\t\tFiles specific to Freescale MPC8xx CPUs\n      /mpc8220\t\tFiles specific to Freescale MPC8220 CPUs\n      /mpc824x\t\tFiles specific to Freescale MPC824x CPUs\n      /mpc8260\t\tFiles specific to Freescale MPC8260 CPUs\n      /mpc85xx\t\tFiles specific to Freescale MPC85xx CPUs\n      /ppc4xx\t\tFiles specific to AMCC PowerPC 4xx CPUs\n    /lib\t\tArchitecture specific library files\n  /sh\t\t\tFiles generic to SH architecture\n    /cpu\t\tCPU specific files\n      /sh2\t\tFiles specific to sh2 CPUs\n      /sh3\t\tFiles specific to sh3 CPUs\n      /sh4\t\tFiles specific to sh4 CPUs\n    /lib\t\tArchitecture specific library files\n  /sparc\t\tFiles generic to SPARC architecture\n    /cpu\t\tCPU specific files\n      /leon2\t\tFiles specific to Gaisler LEON2 SPARC CPU\n      /leon3\t\tFiles specific to Gaisler LEON3 SPARC CPU\n    /lib\t\tArchitecture specific library files\n/api\t\t\tMachine/arch independent API for external apps\n/board\t\t\tBoard dependent files\n/common\t\t\tMisc architecture independent functions\n/disk\t\t\tCode for disk drive partition handling\n/doc\t\t\tDocumentation (don't expect too much)\n/drivers\t\tCommonly used device drivers\n/examples\t\tExample code for standalone applications, etc.\n/fs\t\t\tFilesystem code (cramfs, ext2, jffs2, etc.)\n/include\t\tHeader Files\n/lib\t\t\tFiles generic to all architectures\n  /libfdt\t\tLibrary files to support flattened device trees\n  /lzma\t\t\tLibrary files to support LZMA decompression\n  /lzo\t\t\tLibrary files to support LZO decompression\n/net\t\t\tNetworking code\n/post\t\t\tPower On Self Test\n/rtc\t\t\tReal Time Clock drivers\n/tools\t\t\tTools to build S-Record or U-Boot images, etc.\n\nSoftware Configuration:\n=======================\n\nConfiguration is usually done using C preprocessor defines; the\nrationale behind that is to avoid dead code whenever possible.\n\nThere are two classes of configuration variables:\n\n* Configuration _OPTIONS_:\n  These are selectable by the user and have names beginning with\n  \"CONFIG_\".\n\n* Configuration _SETTINGS_:\n  These depend on the hardware etc. and should not be meddled with if\n  you don't know what you're doing; they have names beginning with\n  \"CONFIG_SYS_\".\n\nLater we will add a configuration tool - probably similar to or even\nidentical to what's used for the Linux kernel. Right now, we have to\ndo the configuration by hand, which means creating some symbolic\nlinks and editing some configuration files. We use the TQM8xxL boards\nas an example here.\n\n\nSelection of Processor Architecture and Board Type:\n---------------------------------------------------\n\nFor all supported boards there are ready-to-use default\nconfigurations available; just type \"make \u003cboard_name\u003e_config\".\n\nExample: For a TQM823L module type:\n\n\tcd u-boot\n\tmake TQM823L_config\n\nFor the Cogent platform, you need to specify the CPU type as well;\ne.g. \"make cogent_mpc8xx_config\". And also configure the cogent\ndirectory according to the instructions in cogent/README.\n\n\nConfiguration Options:\n----------------------\n\nConfiguration depends on the combination of board and CPU type; all\nsuch information is kept in a configuration file\n\"include/configs/\u003cboard_name\u003e.h\".\n\nExample: For a TQM823L module, all configuration settings are in\n\"include/configs/TQM823L.h\".\n\n\nMany of the options are named exactly as the corresponding Linux\nkernel configuration options. The intention is to make it easier to\nbuild a config tool - later.\n\n\nThe following options need to be configured:\n\n- CPU Type:\tDefine exactly one, e.g. CONFIG_MPC85XX.\n\n- Board Type:\tDefine exactly one, e.g. CONFIG_MPC8540ADS.\n\n- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)\n\t\tDefine exactly one, e.g. CONFIG_ATSTK1002\n\n- CPU Module Type: (if CONFIG_COGENT is defined)\n\t\tDefine exactly one of\n\t\tCONFIG_CMA286_60_OLD\n--- FIXME --- not tested yet:\n\t\tCONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,\n\t\tCONFIG_CMA287_23, CONFIG_CMA287_50\n\n- Motherboard Type: (if CONFIG_COGENT is defined)\n\t\tDefine exactly one of\n\t\tCONFIG_CMA101, CONFIG_CMA102\n\n- Motherboard I/O Modules: (if CONFIG_COGENT is defined)\n\t\tDefine one or more of\n\t\tCONFIG_CMA302\n\n- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)\n\t\tDefine one or more of\n\t\tCONFIG_LCD_HEARTBEAT\t- update a character position on\n\t\t\t\t\t  the LCD display every second with\n\t\t\t\t\t  a \"rotator\" |\\-/|\\-/\n\n- Board flavour: (if CONFIG_MPC8260ADS is defined)\n\t\tCONFIG_ADSTYPE\n\t\tPossible values are:\n\t\t\tCONFIG_SYS_8260ADS\t- original MPC8260ADS\n\t\t\tCONFIG_SYS_8266ADS\t- MPC8266ADS\n\t\t\tCONFIG_SYS_PQ2FADS\t- PQ2FADS-ZU or PQ2FADS-VR\n\t\t\tCONFIG_SYS_8272ADS\t- MPC8272ADS\n\n- Marvell Family Member\n\t\tCONFIG_SYS_MVFS\t\t- define it if you want to enable\n\t\t\t\t\t  multiple fs option at one time\n\t\t\t\t\t  for marvell soc family\n\n- MPC824X Family Member (if CONFIG_MPC824X is defined)\n\t\tDefine exactly one of\n\t\tCONFIG_MPC8240, CONFIG_MPC8245\n\n- 8xx CPU Options: (if using an MPC8xx CPU)\n\t\tCONFIG_8xx_GCLK_FREQ\t- deprecated: CPU clock if\n\t\t\t\t\t  get_gclk_freq() cannot work\n\t\t\t\t\t  e.g. if there is no 32KHz\n\t\t\t\t\t  reference PIT/RTC clock\n\t\tCONFIG_8xx_OSCLK\t- PLL input clock (either EXTCLK\n\t\t\t\t\t  or XTAL/EXTAL)\n\n- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):\n\t\tCONFIG_SYS_8xx_CPUCLK_MIN\n\t\tCONFIG_SYS_8xx_CPUCLK_MAX\n\t\tCONFIG_8xx_CPUCLK_DEFAULT\n\t\t\tSee doc/README.MPC866\n\n\t\tCONFIG_SYS_MEASURE_CPUCLK\n\n\t\tDefine this to measure the actual CPU clock instead\n\t\tof relying on the correctness of the configured\n\t\tvalues. Mostly useful for board bringup to make sure\n\t\tthe PLL is locked at the intended frequency. Note\n\t\tthat this requires a (stable) reference clock (32 kHz\n\t\tRTC clock or CONFIG_SYS_8XX_XIN)\n\n\t\tCONFIG_SYS_DELAYED_ICACHE\n\n\t\tDefine this option if you want to enable the\n\t\tICache only when Code runs from RAM.\n\n- Intel Monahans options:\n\t\tCONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO\n\n\t\tDefines the Monahans run mode to oscillator\n\t\tratio. Valid values are 8, 16, 24, 31. The core\n\t\tfrequency is this value multiplied by 13 MHz.\n\n\t\tCONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO\n\n\t\tDefines the Monahans turbo mode to oscillator\n\t\tratio. Valid values are 1 (default if undefined) and\n\t\t2. The core frequency as calculated above is multiplied\n\t\tby this value.\n\n- Linux Kernel Interface:\n\t\tCONFIG_CLOCKS_IN_MHZ\n\n\t\tU-Boot stores all clock information in Hz\n\t\tinternally. For binary compatibility with older Linux\n\t\tkernels (which expect the clocks passed in the\n\t\tbd_info data to be in MHz) the environment variable\n\t\t\"clocks_in_mhz\" can be defined so that U-Boot\n\t\tconverts clock data to MHZ before passing it to the\n\t\tLinux kernel.\n\t\tWhen CONFIG_CLOCKS_IN_MHZ is defined, a definition of\n\t\t\"clocks_in_mhz=1\" is automatically included in the\n\t\tdefault environment.\n\n\t\tCONFIG_MEMSIZE_IN_BYTES\t\t[relevant for MIPS only]\n\n\t\tWhen transferring memsize parameter to linux, some versions\n\t\texpect it to be in bytes, others in MB.\n\t\tDefine CONFIG_MEMSIZE_IN_BYTES to make it in bytes.\n\n\t\tCONFIG_OF_LIBFDT\n\n\t\tNew kernel versions are expecting firmware settings to be\n\t\tpassed using flattened device trees (based on open firmware\n\t\tconcepts).\n\n\t\tCONFIG_OF_LIBFDT\n\t\t * New libfdt-based support\n\t\t * Adds the \"fdt\" command\n\t\t * The bootm command automatically updates the fdt\n\n\t\tOF_CPU - The proper name of the cpus node (only required for\n\t\t\tMPC512X and MPC5xxx based boards).\n\t\tOF_SOC - The proper name of the soc node (only required for\n\t\t\tMPC512X and MPC5xxx based boards).\n\t\tOF_TBCLK - The timebase frequency.\n\t\tOF_STDOUT_PATH - The path to the console device\n\n\t\tboards with QUICC Engines require OF_QE to set UCC MAC\n\t\taddresses\n\n\t\tCONFIG_OF_BOARD_SETUP\n\n\t\tBoard code has addition modification that it wants to make\n\t\tto the flat device tree before handing it off to the kernel\n\n\t\tCONFIG_OF_BOOT_CPU\n\n\t\tThis define fills in the correct boot CPU in the boot\n\t\tparam header, the default value is zero if undefined.\n\n\t\tCONFIG_OF_IDE_FIXUP\n\n\t\tU-Boot can detect if an IDE device is present or not.\n\t\tIf not, and this new config option is activated, U-Boot\n\t\tremoves the ATA node from the DTS before booting Linux,\n\t\tso the Linux IDE driver does not probe the device and\n\t\tcrash. This is needed for buggy hardware (uc101) where\n\t\tno pull down resistor is connected to the signal IDE5V_DD7.\n\n- vxWorks boot parameters:\n\n\t\tbootvx constructs a valid bootline using the following\n\t\tenvironments variables: bootfile, ipaddr, serverip, hostname.\n\t\tIt loads the vxWorks image pointed bootfile.\n\n\t\tCONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name\n\t\tCONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address\n\t\tCONFIG_SYS_VXWORKS_SERVERNAME - Name of the server\n\t\tCONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters\n\n\t\tCONFIG_SYS_VXWORKS_ADD_PARAMS\n\n\t\tAdd it at the end of the bootline. E.g \"u=username pw=secret\"\n\n\t\tNote: If a \"bootargs\" environment is defined, it will overwride\n\t\tthe defaults discussed just above.\n\n- Serial Ports:\n\t\tCONFIG_PL010_SERIAL\n\n\t\tDefine this if you want support for Amba PrimeCell PL010 UARTs.\n\n\t\tCONFIG_PL011_SERIAL\n\n\t\tDefine this if you want support for Amba PrimeCell PL011 UARTs.\n\n\t\tCONFIG_PL011_CLOCK\n\n\t\tIf you have Amba PrimeCell PL011 UARTs, set this variable to\n\t\tthe clock speed of the UARTs.\n\n\t\tCONFIG_PL01x_PORTS\n\n\t\tIf you have Amba PrimeCell PL010 or PL011 UARTs on your board,\n\t\tdefine this to a list of base addresses for each (supported)\n\t\tport. See e.g. include/configs/versatile.h\n\n\n- Console Interface:\n\t\tDepending on board, define exactly one serial port\n\t\t(like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,\n\t\tCONFIG_8xx_CONS_SCC1, ...), or switch off the serial\n\t\tconsole by defining CONFIG_8xx_CONS_NONE\n\n\t\tNote: if CONFIG_8xx_CONS_NONE is defined, the serial\n\t\tport routines must be defined elsewhere\n\t\t(i.e. serial_init(), serial_getc(), ...)\n\n\t\tCONFIG_CFB_CONSOLE\n\t\tEnables console device for a color framebuffer. Needs following\n\t\tdefines (cf. smiLynxEM, i8042, board/eltec/bab7xx)\n\t\t\tVIDEO_FB_LITTLE_ENDIAN\tgraphic memory organisation\n\t\t\t\t\t\t(default big endian)\n\t\t\tVIDEO_HW_RECTFILL\tgraphic chip supports\n\t\t\t\t\t\trectangle fill\n\t\t\t\t\t\t(cf. smiLynxEM)\n\t\t\tVIDEO_HW_BITBLT\t\tgraphic chip supports\n\t\t\t\t\t\tbit-blit (cf. smiLynxEM)\n\t\t\tVIDEO_VISIBLE_COLS\tvisible pixel columns\n\t\t\t\t\t\t(cols=pitch)\n\t\t\tVIDEO_VISIBLE_ROWS\tvisible pixel rows\n\t\t\tVIDEO_PIXEL_SIZE\tbytes per pixel\n\t\t\tVIDEO_DATA_FORMAT\tgraphic data format\n\t\t\t\t\t\t(0-5, cf. cfb_console.c)\n\t\t\tVIDEO_FB_ADRS\t\tframebuffer address\n\t\t\tVIDEO_KBD_INIT_FCT\tkeyboard int fct\n\t\t\t\t\t\t(i.e. i8042_kbd_init())\n\t\t\tVIDEO_TSTC_FCT\t\ttest char fct\n\t\t\t\t\t\t(i.e. i8042_tstc)\n\t\t\tVIDEO_GETC_FCT\t\tget char fct\n\t\t\t\t\t\t(i.e. i8042_getc)\n\t\t\tCONFIG_CONSOLE_CURSOR\tcursor drawing on/off\n\t\t\t\t\t\t(requires blink timer\n\t\t\t\t\t\tcf. i8042.c)\n\t\t\tCONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)\n\t\t\tCONFIG_CONSOLE_TIME\tdisplay time/date info in\n\t\t\t\t\t\tupper right corner\n\t\t\t\t\t\t(requires CONFIG_CMD_DATE)\n\t\t\tCONFIG_VIDEO_LOGO\tdisplay Linux logo in\n\t\t\t\t\t\tupper left corner\n\t\t\tCONFIG_VIDEO_BMP_LOGO\tuse bmp_logo.h instead of\n\t\t\t\t\t\tlinux_logo.h for logo.\n\t\t\t\t\t\tRequires CONFIG_VIDEO_LOGO\n\t\t\tCONFIG_CONSOLE_EXTRA_INFO\n\t\t\t\t\t\tadditional board info beside\n\t\t\t\t\t\tthe logo\n\n\t\tWhen CONFIG_CFB_CONSOLE is defined, video console is\n\t\tdefault i/o. Serial console can be forced with\n\t\tenvironment 'console=serial'.\n\n\t\tWhen CONFIG_SILENT_CONSOLE is defined, all console\n\t\tmessages (by U-Boot and Linux!) can be silenced with\n\t\tthe \"silent\" environment variable. See\n\t\tdoc/README.silent for more information.\n\n- Console Baudrate:\n\t\tCONFIG_BAUDRATE - in bps\n\t\tSelect one of the baudrates listed in\n\t\tCONFIG_SYS_BAUDRATE_TABLE, see below.\n\t\tCONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale\n\n- Console Rx buffer length\n\t\tWith CONFIG_SYS_SMC_RXBUFLEN it is possible to define\n\t\tthe maximum receive buffer length for the SMC.\n\t\tThis option is actual only for 82xx and 8xx possible.\n\t\tIf using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE\n\t\tmust be defined, to setup the maximum idle timeout for\n\t\tthe SMC.\n\n- Boot Delay:\tCONFIG_BOOTDELAY - in seconds\n\t\tDelay before automatically booting the default image;\n\t\tset to -1 to disable autoboot.\n\n\t\tSee doc/README.autoboot for these options that\n\t\twork with CONFIG_BOOTDELAY. None are required.\n\t\tCONFIG_BOOT_RETRY_TIME\n\t\tCONFIG_BOOT_RETRY_MIN\n\t\tCONFIG_AUTOBOOT_KEYED\n\t\tCONFIG_AUTOBOOT_PROMPT\n\t\tCONFIG_AUTOBOOT_DELAY_STR\n\t\tCONFIG_AUTOBOOT_STOP_STR\n\t\tCONFIG_AUTOBOOT_DELAY_STR2\n\t\tCONFIG_AUTOBOOT_STOP_STR2\n\t\tCONFIG_ZERO_BOOTDELAY_CHECK\n\t\tCONFIG_RESET_TO_RETRY\n\n- Autoboot Command:\n\t\tCONFIG_BOOTCOMMAND\n\t\tOnly needed when CONFIG_BOOTDELAY is enabled;\n\t\tdefine a command string that is automatically executed\n\t\twhen no character is read on the console interface\n\t\twithin \"Boot Delay\" after reset.\n\n\t\tCONFIG_BOOTARGS\n\t\tThis can be used to pass arguments to the bootm\n\t\tcommand. The value of CONFIG_BOOTARGS goes into the\n\t\tenvironment value \"bootargs\".\n\n\t\tCONFIG_RAMBOOT and CONFIG_NFSBOOT\n\t\tThe value of these goes into the environment as\n\t\t\"ramboot\" and \"nfsboot\" respectively, and can be used\n\t\tas a convenience, when switching between booting from\n\t\tRAM and NFS.\n\n- Pre-Boot Commands:\n\t\tCONFIG_PREBOOT\n\n\t\tWhen this option is #defined, the existence of the\n\t\tenvironment variable \"preboot\" will be checked\n\t\timmediately before starting the CONFIG_BOOTDELAY\n\t\tcountdown and/or running the auto-boot command resp.\n\t\tentering interactive mode.\n\n\t\tThis feature is especially useful when \"preboot\" is\n\t\tautomatically generated or modified. For an example\n\t\tsee the LWMON board specific code: here \"preboot\" is\n\t\tmodified when the user holds down a certain\n\t\tcombination of keys on the (special) keyboard when\n\t\tbooting the systems\n\n- Serial Download Echo Mode:\n\t\tCONFIG_LOADS_ECHO\n\t\tIf defined to 1, all characters received during a\n\t\tserial download (using the \"loads\" command) are\n\t\techoed back. This might be needed by some terminal\n\t\temulations (like \"cu\"), but may as well just take\n\t\ttime on others. This setting #define's the initial\n\t\tvalue of the \"loads_echo\" environment variable.\n\n- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)\n\t\tCONFIG_KGDB_BAUDRATE\n\t\tSelect one of the baudrates listed in\n\t\tCONFIG_SYS_BAUDRATE_TABLE, see below.\n\n- Monitor Functions:\n\t\tMonitor commands can be included or excluded\n\t\tfrom the build by using the #include files\n\t\t\"config_cmd_all.h\" and #undef'ing unwanted\n\t\tcommands, or using \"config_cmd_default.h\"\n\t\tand augmenting with additional #define's\n\t\tfor wanted commands.\n\n\t\tThe default command configuration includes all commands\n\t\texcept those marked below with a \"*\".\n\n\t\tCONFIG_CMD_ASKENV\t* ask for env variable\n\t\tCONFIG_CMD_BDI\t\t  bdinfo\n\t\tCONFIG_CMD_BEDBUG\t* Include BedBug Debugger\n\t\tCONFIG_CMD_BMP\t\t* BMP support\n\t\tCONFIG_CMD_BSP\t\t* Board specific commands\n\t\tCONFIG_CMD_BOOTD\t  bootd\n\t\tCONFIG_CMD_CACHE\t* icache, dcache\n\t\tCONFIG_CMD_CONSOLE\t  coninfo\n\t\tCONFIG_CMD_DATE\t\t* support for RTC, date/time...\n\t\tCONFIG_CMD_DHCP\t\t* DHCP support\n\t\tCONFIG_CMD_DIAG\t\t* Diagnostics\n\t\tCONFIG_CMD_DS4510\t* ds4510 I2C gpio commands\n\t\tCONFIG_CMD_DS4510_INFO\t* ds4510 I2C info command\n\t\tCONFIG_CMD_DS4510_MEM\t* ds4510 I2C eeprom/sram commansd\n\t\tCONFIG_CMD_DS4510_RST\t* ds4510 I2C rst command\n\t\tCONFIG_CMD_DTT\t\t* Digital Therm and Thermostat\n\t\tCONFIG_CMD_ECHO\t\t  echo arguments\n\t\tCONFIG_CMD_EDITENV\t  edit env variable\n\t\tCONFIG_CMD_EEPROM\t* EEPROM read/write support\n\t\tCONFIG_CMD_ELF\t\t* bootelf, bootvx\n\t\tCONFIG_CMD_FS_UUID\t* Look up a filesystem UUID\n\t\tCONFIG_CMD_SAVEENV\t  saveenv\n\t\tCONFIG_CMD_FDC\t\t* Floppy Disk Support\n\t\tCONFIG_CMD_FAT\t\t* FAT partition support\n\t\tCONFIG_CMD_FDOS\t\t* Dos diskette Support\n\t\tCONFIG_CMD_FLASH\t  flinfo, erase, protect\n\t\tCONFIG_CMD_FPGA\t\t  FPGA device initialization support\n\t\tCONFIG_CMD_HWFLOW\t* RTS/CTS hw flow control\n\t\tCONFIG_CMD_I2C\t\t* I2C serial bus support\n\t\tCONFIG_CMD_IDE\t\t* IDE harddisk support\n\t\tCONFIG_CMD_IMI\t\t  iminfo\n\t\tCONFIG_CMD_IMLS\t\t  List all found images\n\t\tCONFIG_CMD_IMMAP\t* IMMR dump support\n\t\tCONFIG_CMD_IRQ\t\t* irqinfo\n\t\tCONFIG_CMD_ITEST\t  Integer/string test of 2 values\n\t\tCONFIG_CMD_JFFS2\t* JFFS2 Support\n\t\tCONFIG_CMD_KGDB\t\t* kgdb\n\t\tCONFIG_CMD_LOADB\t  loadb\n\t\tCONFIG_CMD_LOADS\t  loads\n\t\tCONFIG_CMD_MD5SUM\t  print md5 message digest\n\t\t\t\t\t  (requires CONFIG_CMD_MEMORY and CONFIG_MD5)\n\t\tCONFIG_CMD_MEMORY\t  md, mm, nm, mw, cp, cmp, crc, base,\n\t\t\t\t\t  loop, loopw, mtest\n\t\tCONFIG_CMD_MISC\t\t  Misc functions like sleep etc\n\t\tCONFIG_CMD_MMC\t\t* MMC memory mapped support\n\t\tCONFIG_CMD_MII\t\t* MII utility commands\n\t\tCONFIG_CMD_MTDPARTS\t* MTD partition support\n\t\tCONFIG_CMD_NAND\t\t* NAND support\n\t\tCONFIG_CMD_NET\t\t  bootp, tftpboot, rarpboot\n\t\tCONFIG_CMD_PCA953X\t* PCA953x I2C gpio commands\n\t\tCONFIG_CMD_PCA953X_INFO\t* PCA953x I2C gpio info command\n\t\tCONFIG_CMD_PCI\t\t* pciinfo\n\t\tCONFIG_CMD_PCMCIA\t\t* PCMCIA support\n\t\tCONFIG_CMD_PING\t\t* send ICMP ECHO_REQUEST to network\n\t\t\t\t\t  host\n\t\tCONFIG_CMD_PORTIO\t* Port I/O\n\t\tCONFIG_CMD_REGINFO\t* Register dump\n\t\tCONFIG_CMD_RUN\t\t  run command in env variable\n\t\tCONFIG_CMD_SAVES\t* save S record dump\n\t\tCONFIG_CMD_SCSI\t\t* SCSI Support\n\t\tCONFIG_CMD_SDRAM\t* print SDRAM configuration information\n\t\t\t\t\t  (requires CONFIG_CMD_I2C)\n\t\tCONFIG_CMD_SETGETDCR\t  Support for DCR Register access\n\t\t\t\t\t  (4xx only)\n\t\tCONFIG_CMD_SHA1SUM\t  print sha1 memory digest\n\t\t\t\t\t  (requires CONFIG_CMD_MEMORY)\n\t\tCONFIG_CMD_SOURCE\t  \"source\" command Support\n\t\tCONFIG_CMD_SPI\t\t* SPI serial bus support\n\t\tCONFIG_CMD_USB\t\t* USB support\n\t\tCONFIG_CMD_VFD\t\t* VFD support (TRAB)\n\t\tCONFIG_CMD_CDP\t\t* Cisco Discover Protocol support\n\t\tCONFIG_CMD_FSL\t\t* Microblaze FSL support\n\n\n\t\tEXAMPLE: If you want all functions except of network\n\t\tsupport you can write:\n\n\t\t#include \"config_cmd_all.h\"\n\t\t#undef CONFIG_CMD_NET\n\n\tOther Commands:\n\t\tfdt (flattened device tree) command: CONFIG_OF_LIBFDT\n\n\tNote:\tDon't enable the \"icache\" and \"dcache\" commands\n\t\t(configuration option CONFIG_CMD_CACHE) unless you know\n\t\twhat you (and your U-Boot users) are doing. Data\n\t\tcache cannot be enabled on systems like the 8xx or\n\t\t8260 (where accesses to the IMMR region must be\n\t\tuncached), and it cannot be disabled on all other\n\t\tsystems where we (mis-) use the data cache to hold an\n\t\tinitial stack and some data.\n\n\n\t\tXXX - this list needs to get updated!\n\n- Watchdog:\n\t\tCONFIG_WATCHDOG\n\t\tIf this variable is defined, it enables watchdog\n\t\tsupport. There must be support in the platform specific\n\t\tcode for a watchdog. For the 8xx and 8260 CPUs, the\n\t\tSIU Watchdog feature is enabled in the SYPCR\n\t\tregister.\n\n- U-Boot Version:\n\t\tCONFIG_VERSION_VARIABLE\n\t\tIf this variable is defined, an environment variable\n\t\tnamed \"ver\" is created by U-Boot showing the U-Boot\n\t\tversion as printed by the \"version\" command.\n\t\tThis variable is readonly.\n\n- Real-Time Clock:\n\n\t\tWhen CONFIG_CMD_DATE is selected, the type of the RTC\n\t\thas to be selected, too. Define exactly one of the\n\t\tfollowing options:\n\n\t\tCONFIG_RTC_MPC8xx\t- use internal RTC of MPC8xx\n\t\tCONFIG_RTC_PCF8563\t- use Philips PCF8563 RTC\n\t\tCONFIG_RTC_MC13783\t- use MC13783 RTC\n\t\tCONFIG_RTC_MC146818\t- use MC146818 RTC\n\t\tCONFIG_RTC_DS1307\t- use Maxim, Inc. DS1307 RTC\n\t\tCONFIG_RTC_DS1337\t- use Maxim, Inc. DS1337 RTC\n\t\tCONFIG_RTC_DS1338\t- use Maxim, Inc. DS1338 RTC\n\t\tCONFIG_RTC_DS164x\t- use Dallas DS164x RTC\n\t\tCONFIG_RTC_ISL1208\t- use Intersil ISL1208 RTC\n\t\tCONFIG_RTC_MAX6900\t- use Maxim, Inc. MAX6900 RTC\n\t\tCONFIG_SYS_RTC_DS1337_NOOSC\t- Turn off the OSC output for DS1337\n\n\t\tNote that if the RTC uses I2C, then the I2C interface\n\t\tmust also be configured. See I2C Support, below.\n\n- GPIO Support:\n\t\tCONFIG_PCA953X\t\t- use NXP's PCA953X series I2C GPIO\n\t\tCONFIG_PCA953X_INFO\t- enable pca953x info command\n\n\t\tThe CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of\n\t\tchip-ngpio pairs that tell the PCA953X driver the number of\n\t\tpins supported by a particular chip.\n\n\t\tNote that if the GPIO device uses I2C, then the I2C interface\n\t\tmust also be configured. See I2C Support, below.\n\n- Timestamp Support:\n\n\t\tWhen CONFIG_TIMESTAMP is selected, the timestamp\n\t\t(date and time) of an image is printed by image\n\t\tcommands like bootm or iminfo. This option is\n\t\tautomatically enabled when you select CONFIG_CMD_DATE .\n\n- Partition Support:\n\t\tCONFIG_MAC_PARTITION and/or CONFIG_DOS_PARTITION\n\t\tand/or CONFIG_ISO_PARTITION and/or CONFIG_EFI_PARTITION\n\n\t\tIf IDE or SCSI support is enabled (CONFIG_CMD_IDE or\n\t\tCONFIG_CMD_SCSI) you must configure support for at\n\t\tleast one partition type as well.\n\n- IDE Reset method:\n\t\tCONFIG_IDE_RESET_ROUTINE - this is defined in several\n\t\tboard configurations files but used nowhere!\n\n\t\tCONFIG_IDE_RESET - is this is defined, IDE Reset will\n\t\tbe performed by calling the function\n\t\t\tide_set_reset(int reset)\n\t\twhich has to be defined in a board specific file\n\n- ATAPI Support:\n\t\tCONFIG_ATAPI\n\n\t\tSet this to enable ATAPI support.\n\n- LBA48 Support\n\t\tCONFIG_LBA48\n\n\t\tSet this to enable support for disks larger than 137GB\n\t\tAlso look at CONFIG_SYS_64BIT_LBA.\n\t\tWhithout these , LBA48 support uses 32bit variables and will 'only'\n\t\tsupport disks up to 2.1TB.\n\n\t\tCONFIG_SYS_64BIT_LBA:\n\t\t\tWhen enabled, makes the IDE subsystem use 64bit sector addresses.\n\t\t\tDefault is 32bit.\n\n- SCSI Support:\n\t\tAt the moment only there is only support for the\n\t\tSYM53C8XX SCSI controller; define\n\t\tCONFIG_SCSI_SYM53C8XX to enable it.\n\n\t\tCONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and\n\t\tCONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *\n\t\tCONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the\n\t\tmaximum numbers of LUNs, SCSI ID's and target\n\t\tdevices.\n\t\tCONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)\n\n- NETWORK Support (PCI):\n\t\tCONFIG_E1000\n\t\tSupport for Intel 8254x gigabit chips.\n\n\t\tCONFIG_E1000_FALLBACK_MAC\n\t\tdefault MAC for empty EEPROM after production.\n\n\t\tCONFIG_EEPRO100\n\t\tSupport for Intel 82557/82559/82559ER chips.\n\t\tOptional CONFIG_EEPRO100_SROM_WRITE enables EEPROM\n\t\twrite routine for first time initialisation.\n\n\t\tCONFIG_TULIP\n\t\tSupport for Digital 2114x chips.\n\t\tOptional CONFIG_TULIP_SELECT_MEDIA for board specific\n\t\tmodem chip initialisation (KS8761/QS6611).\n\n\t\tCONFIG_NATSEMI\n\t\tSupport for National dp83815 chips.\n\n\t\tCONFIG_NS8382X\n\t\tSupport for National dp8382[01] gigabit chips.\n\n- NETWORK Support (other):\n\n\t\tCONFIG_DRIVER_AT91EMAC\n\t\tSupport for AT91RM9200 EMAC.\n\n\t\t\tCONFIG_RMII\n\t\t\tDefine this to use reduced MII inteface\n\n\t\t\tCONFIG_DRIVER_AT91EMAC_QUIET\n\t\t\tIf this defined, the driver is quiet.\n\t\t\tThe driver doen't show link status messages.\n\n\t\tCONFIG_DRIVER_LAN91C96\n\t\tSupport for SMSC's LAN91C96 chips.\n\n\t\t\tCONFIG_LAN91C96_BASE\n\t\t\tDefine this to hold the physical address\n\t\t\tof the LAN91C96's I/O space\n\n\t\t\tCONFIG_LAN91C96_USE_32_BIT\n\t\t\tDefine this to enable 32 bit addressing\n\n\t\tCONFIG_DRIVER_SMC91111\n\t\tSupport for SMSC's LAN91C111 chip\n\n\t\t\tCONFIG_SMC91111_BASE\n\t\t\tDefine this to hold the physical address\n\t\t\tof the device (I/O space)\n\n\t\t\tCONFIG_SMC_USE_32_BIT\n\t\t\tDefine this if data bus is 32 bits\n\n\t\t\tCONFIG_SMC_USE_IOFUNCS\n\t\t\tDefine this to use i/o functions instead of macros\n\t\t\t(some hardware wont work with macros)\n\n\t\tCONFIG_FTGMAC100\n\t\tSupport for Faraday's FTGMAC100 Gigabit SoC Ethernet\n\n\t\t\tCONFIG_FTGMAC100_EGIGA\n\t\t\tDefine this to use GE link update with gigabit PHY.\n\t\t\tDefine this if FTGMAC100 is connected to gigabit PHY.\n\t\t\tIf your system has 10/100 PHY only, it might not occur\n\t\t\twrong behavior. Because PHY usually return timeout or\n\t\t\tuseless data when polling gigabit status and gigabit\n\t\t\tcontrol registers. This behavior won't affect the\n\t\t\tcorrectnessof 10/100 link speed update.\n\n\t\tCONFIG_SMC911X\n\t\tSupport for SMSC's LAN911x and LAN921x chips\n\n\t\t\tCONFIG_SMC911X_BASE\n\t\t\tDefine this to hold the physical address\n\t\t\tof the device (I/O space)\n\n\t\t\tCONFIG_SMC911X_32_BIT\n\t\t\tDefine this if data bus is 32 bits\n\n\t\t\tCONFIG_SMC911X_16_BIT\n\t\t\tDefine this if data bus is 16 bits. If your processor\n\t\t\tautomatically converts one 32 bit word to two 16 bit\n\t\t\twords you may also try CONFIG_SMC911X_32_BIT.\n\n\t\tCONFIG_SH_ETHER\n\t\tSupport for Renesas on-chip Ethernet controller\n\n\t\t\tCONFIG_SH_ETHER_USE_PORT\n\t\t\tDefine the number of ports to be used\n\n\t\t\tCONFIG_SH_ETHER_PHY_ADDR\n\t\t\tDefine the ETH PHY's address\n\n\t\t\tCONFIG_SH_ETHER_CACHE_WRITEBACK\n\t\t\tIf this option is set, the driver enables cache flush.\n\n- USB Support:\n\t\tAt the moment only the UHCI host controller is\n\t\tsupported (PIP405, MIP405, MPC5200); define\n\t\tCONFIG_USB_UHCI to enable it.\n\t\tdefine CONFIG_USB_KEYBOARD to enable the USB Keyboard\n\t\tand define CONFIG_USB_STORAGE to enable the USB\n\t\tstorage devices.\n\t\tNote:\n\t\tSupported are USB Keyboards and USB Floppy drives\n\t\t(TEAC FD-05PUB).\n\t\tMPC5200 USB requires additional defines:\n\t\t\tCONFIG_USB_CLOCK\n\t\t\t\tfor 528 MHz Clock: 0x0001bbbb\n\t\t\tCONFIG_PSC3_USB\n\t\t\t\tfor USB on PSC3\n\t\t\tCONFIG_USB_CONFIG\n\t\t\t\tfor differential drivers: 0x00001000\n\t\t\t\tfor single ended drivers: 0x00005000\n\t\t\t\tfor differential drivers on PSC3: 0x00000100\n\t\t\t\tfor single ended drivers on PSC3: 0x00004100\n\t\t\tCONFIG_SYS_USB_EVENT_POLL\n\t\t\t\tMay be defined to allow interrupt polling\n\t\t\t\tinstead of using asynchronous interrupts\n\n- USB Device:\n\t\tDefine the below if you wish to use the USB console.\n\t\tOnce firmware is rebuilt from a serial console issue the\n\t\tcommand \"setenv stdin usbtty; setenv stdout usbtty\" and\n\t\tattach your USB cable. The Unix command \"dmesg\" should print\n\t\tit has found a new device. The environment variable usbtty\n\t\tcan be set to gserial or cdc_acm to enable your device to\n\t\tappear to a USB host as a Linux gserial device or a\n\t\tCommon Device Class Abstract Control Model serial device.\n\t\tIf you select usbtty = gserial you should be able to enumerate\n\t\ta Linux host by\n\t\t# modprobe usbserial vendor=0xVendorID product=0xProductID\n\t\telse if using cdc_acm, simply setting the environment\n\t\tvariable usbtty to be cdc_acm should suffice. The following\n\t\tmight be defined in YourBoardName.h\n\n\t\t\tCONFIG_USB_DEVICE\n\t\t\tDefine this to build a UDC device\n\n\t\t\tCONFIG_USB_TTY\n\t\t\tDefine this to have a tty type of device available to\n\t\t\ttalk to the UDC device\n\n\t\t\tCONFIG_SYS_CONSOLE_IS_IN_ENV\n\t\t\tDefine this if you want stdin, stdout \u0026/or stderr to\n\t\t\tbe set to usbtty.\n\n\t\t\tmpc8xx:\n\t\t\t\tCONFIG_SYS_USB_EXTC_CLK 0xBLAH\n\t\t\t\tDerive USB clock from external clock \"blah\"\n\t\t\t\t- CONFIG_SYS_USB_EXTC_CLK 0x02\n\n\t\t\t\tCONFIG_SYS_USB_BRG_CLK 0xBLAH\n\t\t\t\tDerive USB clock from brgclk\n\t\t\t\t- CONFIG_SYS_USB_BRG_CLK 0x04\n\n\t\tIf you have a USB-IF assigned VendorID then you may wish to\n\t\tdefine your own vendor specific values either in BoardName.h\n\t\tor directly in usbd_vendor_info.h. If you don't define\n\t\tCONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,\n\t\tCONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot\n\t\tshould pretend to be a Linux device to it's target host.\n\n\t\t\tCONFIG_USBD_MANUFACTURER\n\t\t\tDefine this string as the name of your company for\n\t\t\t- CONFIG_USBD_MANUFACTURER \"my company\"\n\n\t\t\tCONFIG_USBD_PRODUCT_NAME\n\t\t\tDefine this string as the name of your product\n\t\t\t- CONFIG_USBD_PRODUCT_NAME \"acme usb device\"\n\n\t\t\tCONFIG_USBD_VENDORID\n\t\t\tDefine this as your assigned Vendor ID from the USB\n\t\t\tImplementors Forum. This *must* be a genuine Vendor ID\n\t\t\tto avoid polluting the USB namespace.\n\t\t\t- CONFIG_USBD_VENDORID 0xFFFF\n\n\t\t\tCONFIG_USBD_PRODUCTID\n\t\t\tDefine this as the unique Product ID\n\t\t\tfor your device\n\t\t\t- CONFIG_USBD_PRODUCTID 0xFFFF\n\n\n- MMC Support:\n\t\tThe MMC controller on the Intel PXA is supported. To\n\t\tenable this define CONFIG_MMC. The MMC can be\n\t\taccessed from the boot prompt by mapping the device\n\t\tto physical memory similar to flash. Command line is\n\t\tenabled with CONFIG_CMD_MMC. The MMC driver also works with\n\t\tthe FAT fs. This is enabled with CONFIG_CMD_FAT.\n\n- Journaling Flash filesystem support:\n\t\tCONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,\n\t\tCONFIG_JFFS2_NAND_DEV\n\t\tDefine these for a default partition on a NAND device\n\n\t\tCONFIG_SYS_JFFS2_FIRST_SECTOR,\n\t\tCONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS\n\t\tDefine these for a default partition on a NOR device\n\n\t\tCONFIG_SYS_JFFS_CUSTOM_PART\n\t\tDefine this to create an own partition. You have to provide a\n\t\tfunction struct part_info* jffs2_part_info(int part_num)\n\n\t\tIf you define only one JFFS2 partition you may also want to\n\t\t#define CONFIG_SYS_JFFS_SINGLE_PART\t1\n\t\tto disable the command chpart. This is the default when you\n\t\thave not defined a custom partition\n\n- Keyboard Support:\n\t\tCONFIG_ISA_KEYBOARD\n\n\t\tDefine this to enable standard (PC-Style) keyboard\n\t\tsupport\n\n\t\tCONFIG_I8042_KBD\n\t\tStandard PC keyboard driver with US (is default) and\n\t\tGERMAN key layout (switch via environment 'keymap=de') support.\n\t\tExport function i8042_kbd_init, i8042_tstc and i8042_getc\n\t\tfor cfb_console. Supports cursor blinking.\n\n- Video support:\n\t\tCONFIG_VIDEO\n\n\t\tDefine this to enable video support (for output to\n\t\tvideo).\n\n\t\tCONFIG_VIDEO_CT69000\n\n\t\tEnable Chips \u0026 Technologies 69000 Video chip\n\n\t\tCONFIG_VIDEO_SMI_LYNXEM\n\t\tEnable Silicon Motion SMI 712/710/810 Video chip. The\n\t\tvideo output is selected via environment 'videoout'\n\t\t(1 = LCD and 2 = CRT). If videoout is undefined, CRT is\n\t\tassumed.\n\n\t\tFor the CT69000 and SMI_LYNXEM drivers, videomode is\n\t\tselected via environment 'videomode'. Two different ways\n\t\tare possible:\n\t\t- \"videomode=num\"   'num' is a standard LiLo mode numbers.\n\t\tFollowing standard modes are supported\t(* is default):\n\n\t\t      Colors\t640x480 800x600 1024x768 1152x864 1280x1024\n\t\t-------------+---------------------------------------------\n\t\t      8 bits |\t0x301*\t0x303\t 0x305\t  0x161\t    0x307\n\t\t     15 bits |\t0x310\t0x313\t 0x316\t  0x162\t    0x319\n\t\t     16 bits |\t0x311\t0x314\t 0x317\t  0x163\t    0x31A\n\t\t     24 bits |\t0x312\t0x315\t 0x318\t    ?\t    0x31B\n\t\t-------------+---------------------------------------------\n\t\t(i.e. setenv videomode 317; saveenv; reset;)\n\n\t\t- \"videomode=bootargs\" all the video parameters are parsed\n\t\tfrom the bootargs. (See drivers/video/videomodes.c)\n\n\n\t\tCONFIG_VIDEO_SED13806\n\t\tEnable Epson SED13806 driver. This driver supports 8bpp\n\t\tand 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP\n\t\tor CONFIG_VIDEO_SED13806_16BPP\n\n- Keyboard Support:\n\t\tCONFIG_KEYBOARD\n\n\t\tDefine this to enable a custom keyboard support.\n\t\tThis simply calls drv_keyboard_init() which must be\n\t\tdefined in your board-specific files.\n\t\tThe only board using this so far is RBC823.\n\n- LCD Support:\tCONFIG_LCD\n\n\t\tDefine this to enable LCD support (for output to LCD\n\t\tdisplay); also select one of the supported displays\n\t\tby defining one of these:\n\n\t\tCONFIG_ATMEL_LCD:\n\n\t\t\tHITACHI TX09D70VM1CCA, 3.5\", 240x320.\n\n\t\tCONFIG_NEC_NL6448AC33:\n\n\t\t\tNEC NL6448AC33-18. Active, color, single scan.\n\n\t\tCONFIG_NEC_NL6448BC20\n\n\t\t\tNEC NL6448BC20-08. 6.5\", 640x480.\n\t\t\tActive, color, single scan.\n\n\t\tCONFIG_NEC_NL6448BC33_54\n\n\t\t\tNEC NL6448BC33-54. 10.4\", 640x480.\n\t\t\tActive, color, single scan.\n\n\t\tCONFIG_SHARP_16x9\n\n\t\t\tSharp 320x240. Active, color, single scan.\n\t\t\tIt isn't 16x9, and I am not sure what it is.\n\n\t\tCONFIG_SHARP_LQ64D341\n\n\t\t\tSharp LQ64D341 display, 640x480.\n\t\t\tActive, color, single scan.\n\n\t\tCONFIG_HLD1045\n\n\t\t\tHLD1045 display, 640x480.\n\t\t\tActive, color, single scan.\n\n\t\tCONFIG_OPTREX_BW\n\n\t\t\tOptrex\t CBL50840-2 NF-FW 99 22 M5\n\t\t\tor\n\t\t\tHitachi\t LMG6912RPFC-00T\n\t\t\tor\n\t\t\tHitachi\t SP14Q002\n\n\t\t\t320x240. Black \u0026 white.\n\n\t\tNormally display is black on white background; define\n\t\tCONFIG_SYS_WHITE_ON_BLACK to get it inverted.\n\n- Splash Screen Support: CONFIG_SPLASH_SCREEN\n\n\t\tIf this option is set, the environment is checked for\n\t\ta variable \"splashimage\". If found, the usual display\n\t\tof logo, copyright and system information on the LCD\n\t\tis suppressed and the BMP image at the address\n\t\tspecified in \"splashimage\" is loaded instead. The\n\t\tconsole is redirected to the \"nulldev\", too. This\n\t\tallows for a \"silent\" boot where a splash screen is\n\t\tloaded very quickly after power-on.\n\n\t\tCONFIG_SPLASH_SCREEN_ALIGN\n\n\t\tIf this option is set the splash image can be freely positioned\n\t\ton the screen. Environment variable \"splashpos\" specifies the\n\t\tposition as \"x,y\". If a positive number is given it is used as\n\t\tnumber of pixel from left/top. If a negative number is given it\n\t\tis used as number of pixel from right/bottom. You can also\n\t\tspecify 'm' for centering the image.\n\n\t\tExample:\n\t\tsetenv splashpos m,m\n\t\t\t=\u003e image at center of screen\n\n\t\tsetenv splashpos 30,20\n\t\t\t=\u003e image at x = 30 and y = 20\n\n\t\tsetenv splashpos -10,m\n\t\t\t=\u003e vertically centered image\n\t\t\t   at x = dspWidth - bmpWidth - 9\n\n- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP\n\n\t\tIf this option is set, additionally to standard BMP\n\t\timages, gzipped BMP images can be displayed via the\n\t\tsplashscreen support or the bmp command.\n\n- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8\n\n\t\tIf this option is set, 8-bit RLE compressed BMP images\n\t\tcan be displayed via the splashscreen support or the\n\t\tbmp command.\n\n- Compression support:\n\t\tCONFIG_BZIP2\n\n\t\tIf this option is set, support for bzip2 compressed\n\t\timages is included. If not, only uncompressed and gzip\n\t\tcompressed images are supported.\n\n\t\tNOTE: the bzip2 algorithm requires a lot of RAM, so\n\t\tthe malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should\n\t\tbe at least 4MB.\n\n\t\tCONFIG_LZMA\n\n\t\tIf this option is set, support for lzma compressed\n\t\timages is included.\n\n\t\tNote: The LZMA algorithm adds between 2 and 4KB of code and it\n\t\trequires an amount of dynamic memory that is given by the\n\t\tformula:\n\n\t\t\t(1846 + 768 \u003c\u003c (lc + lp)) * sizeof(uint16)\n\n\t\tWhere lc and lp stand for, respectively, Literal context bits\n\t\tand Literal pos bits.\n\n\t\tThis value is upper-bounded by 14MB in the worst case. Anyway,\n\t\tfor a ~4MB large kernel image, we have lc=3 and lp=0 for a\n\t\ttotal amount of (1846 + 768 \u003c\u003c (3 + 0)) * 2 = ~41KB... that is\n\t\ta very small buffer.\n\n\t\tUse the lzmainfo tool to determinate the lc and lp values and\n\t\tthen calculate the amount of needed dynamic memory (ensuring\n\t\tthe appropriate CONFIG_SYS_MALLOC_LEN value).\n\n- MII/PHY support:\n\t\tCONFIG_PHY_ADDR\n\n\t\tThe address of PHY on MII bus.\n\n\t\tCONFIG_PHY_CLOCK_FREQ (ppc4xx)\n\n\t\tThe clock frequency of the MII bus\n\n\t\tCONFIG_PHY_GIGE\n\n\t\tIf this option is set, support for speed/duplex\n\t\tdetection of gigabit PHY is included.\n\n\t\tCONFIG_PHY_RESET_DELAY\n\n\t\tSome PHY like Intel LXT971A need extra delay after\n\t\treset before any MII register access is possible.\n\t\tFor such PHY, set this option to the usec delay\n\t\trequired. (minimum 300usec for LXT971A)\n\n\t\tCONFIG_PHY_CMD_DELAY (ppc4xx)\n\n\t\tSome PHY like Intel LXT971A need extra delay after\n\t\tcommand issued before MII status register can be read\n\n- Ethernet address:\n\t\tCONFIG_ETHADDR\n\t\tCONFIG_ETH1ADDR\n\t\tCONFIG_ETH2ADDR\n\t\tCONFIG_ETH3ADDR\n\t\tCONFIG_ETH4ADDR\n\t\tCONFIG_ETH5ADDR\n\n\t\tDefine a default value for Ethernet address to use\n\t\tfor the respective Ethernet interface, in case this\n\t\tis not determined automatically.\n\n- IP address:\n\t\tCONFIG_IPADDR\n\n\t\tDefine a default value for the IP address to use for\n\t\tthe default Ethernet interface, in case this is not\n\t\tdetermined through e.g. bootp.\n\n- Server IP address:\n\t\tCONFIG_SERVERIP\n\n\t\tDefines a default value for the IP address of a TFTP\n\t\tserver to contact when using the \"tftboot\" command.\n\n\t\tCONFIG_KEEP_SERVERADDR\n\n\t\tKeeps the server's MAC address, in the env 'serveraddr'\n\t\tfor passing to bootargs (like Linux's netconsole option)\n\n- Multicast TFTP Mode:\n\t\tCONFIG_MCAST_TFTP\n\n\t\tDefines whether you want to support multicast TFTP as per\n\t\trfc-2090; for example to work with atftp.  Lets lots of targets\n\t\ttftp down the same boot image concurrently.  Note: the Ethernet\n\t\tdriver in use must provide a function: mcast() to join/leave a\n\t\tmulticast group.\n\n\t\tCONFIG_BOOTP_RANDOM_DELAY\n- BOOTP Recovery Mode:\n\t\tCONFIG_BOOTP_RANDOM_DELAY\n\n\t\tIf you have many targets in a network that try to\n\t\tboot using BOOTP, you may want to avoid that all\n\t\tsystems send out BOOTP requests at precisely the same\n\t\tmoment (which would happen for instance at recovery\n\t\tfrom a power failure, when all systems will try to\n\t\tboot, thus flooding the BOOTP server. Defining\n\t\tCONFIG_BOOTP_RANDOM_DELAY causes a random delay to be\n\t\tinserted before sending out BOOTP requests. The\n\t\tfollowing delays are inserted then:\n\n\t\t1st BOOTP request:\tdelay 0 ... 1 sec\n\t\t2nd BOOTP request:\tdelay 0 ... 2 sec\n\t\t3rd BOOTP request:\tdelay 0 ... 4 sec\n\t\t4th and following\n\t\tBOOTP requests:\t\tdelay 0 ... 8 sec\n\n- DHCP Advanced Options:\n\t\tYou can fine tune the DHCP functionality by defining\n\t\tCONFIG_BOOTP_* symbols:\n\n\t\tCONFIG_BOOTP_SUBNETMASK\n\t\tCONFIG_BOOTP_GATEWAY\n\t\tCONFIG_BOOTP_HOSTNAME\n\t\tCONFIG_BOOTP_NISDOMAIN\n\t\tCONFIG_BOOTP_BOOTPATH\n\t\tCONFIG_BOOTP_BOOTFILESIZE\n\t\tCONFIG_BOOTP_DNS\n\t\tCONFIG_BOOTP_DNS2\n\t\tCONFIG_BOOTP_SEND_HOSTNAME\n\t\tCONFIG_BOOTP_NTPSERVER\n\t\tCONFIG_BOOTP_TIMEOFFSET\n\t\tCONFIG_BOOTP_VENDOREX\n\n\t\tCONFIG_BOOTP_SERVERIP - TFTP server will be the serverip\n\t\tenvironment variable, not the BOOTP server.\n\n\t\tCONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS\n\t\tserverip from a DHCP server, it is possible that more\n\t\tthan one DNS serverip is offered to the client.\n\t\tIf CONFIG_BOOTP_DNS2 is enabled, the secondary DNS\n\t\tserverip will be stored in the additional environment\n\t\tvariable \"dnsip2\". The first DNS serverip is always\n\t\tstored in the variable \"dnsip\", when CONFIG_BOOTP_DNS\n\t\tis defined.\n\n\t\tCONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable\n\t\tto do a dynamic update of a DNS server. To do this, they\n\t\tneed the hostname of the DHCP requester.\n\t\tIf CONFIG_BOOTP_SEND_HOSTNAME is defined, the content\n\t\tof the \"hostname\" environment variable is passed as\n\t\toption 12 to the DHCP server.\n\n\t\tCONFIG_BOOTP_DHCP_REQUEST_DELAY\n\n\t\tA 32bit value in microseconds for a delay between\n\t\treceiving a \"DHCP Offer\" and sending the \"DHCP Request\".\n\t\tThis fixes a problem with certain DHCP servers that don't\n\t\trespond 100% of the time to a \"DHCP request\". E.g. On an\n\t\tAT91RM9200 processor running at 180MHz, this delay needed\n\t\tto be *at least* 15,000 usec before a Windows Server 2003\n\t\tDHCP server would reply 100% of the time. I recommend at\n\t\tleast 50,000 usec to be safe. The alternative is to hope\n\t\tthat one of the retries will be successful but note that\n\t\tthe DHCP timeout and retry process takes a longer than\n\t\tthis delay.\n\n - CDP Options:\n\t\tCONFIG_CDP_DEVICE_ID\n\n\t\tThe device id used in CDP trigger frames.\n\n\t\tCONFIG_CDP_DEVICE_ID_PREFIX\n\n\t\tA two character string which is prefixed to the MAC address\n\t\tof the device.\n\n\t\tCONFIG_CDP_PORT_ID\n\n\t\tA printf format string which contains the ascii name of\n\t\tthe port. Normally is set to \"eth%d\" which sets\n\t\teth0 for the first Ethernet, eth1 for the second etc.\n\n\t\tCONFIG_CDP_CAPABILITIES\n\n\t\tA 32bit integer which indicates the device capabilities;\n\t\t0x00000010 for a normal host which does not forwards.\n\n\t\tCONFIG_CDP_VERSION\n\n\t\tAn ascii string containing the version of the software.\n\n\t\tCONFIG_CDP_PLATFORM\n\n\t\tAn ascii string containing the name of the platform.\n\n\t\tCONFIG_CDP_TRIGGER\n\n\t\tA 32bit integer sent on the trigger.\n\n\t\tCONFIG_CDP_POWER_CONSUMPTION\n\n\t\tA 16bit integer containing the power consumption of the\n\t\tdevice in .1 of milliwatts.\n\n\t\tCONFIG_CDP_APPLIANCE_VLAN_TYPE\n\n\t\tA byte containing the id of the VLAN.\n\n- Status LED:\tCONFIG_STATUS_LED\n\n\t\tSeveral configurations allow to display the current\n\t\tstatus using a LED. For instance, the LED will blink\n\t\tfast while running U-Boot code, stop blinking as\n\t\tsoon as a reply to a BOOTP request was received, and\n\t\tstart blinking slow once the Linux kernel is running\n\t\t(supported by a status LED driver in the Linux\n\t\tkernel). Defining CONFIG_STATUS_LED enables this\n\t\tfeature in U-Boot.\n\n- CAN Support:\tCONFIG_CAN_DRIVER\n\n\t\tDefining CONFIG_CAN_DRIVER enables CAN driver support\n\t\ton those systems that support this (optional)\n\t\tfeature, like the TQM8xxL modules.\n\n- I2C Support:\tCONFIG_HARD_I2C | CONFIG_SOFT_I2C\n\n\t\tThese enable I2C serial bus commands. Defining either of\n\t\t(but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will\n\t\tinclude the appropriate I2C driver for the selected CPU.\n\n\t\tThis will allow you to use i2c commands at the u-boot\n\t\tcommand line (as long as you set CONFIG_CMD_I2C in\n\t\tCONFIG_COMMANDS) and communicate with i2c based realtime\n\t\tclock chips. See common/cmd_i2c.c for a description of the\n\t\tcommand line interface.\n\n\t\tCONFIG_HARD_I2C selects a hardware I2C controller.\n\n\t\tCONFIG_SOFT_I2C configures u-boot to use a software (aka\n\t\tbit-banging) driver instead of CPM or similar hardware\n\t\tsupport for I2C.\n\n\t\tThere are several other quantities that must also be\n\t\tdefined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C.\n\n\t\tIn both cases you will need to define CONFIG_SYS_I2C_SPEED\n\t\tto be the frequency (in Hz) at which you wish your i2c bus\n\t\tto run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie\n\t\tthe CPU's i2c node address).\n\n\t\tNow, the u-boot i2c code for the mpc8xx\n\t\t(arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node\n\t\tand so its address should therefore be cleared to 0 (See,\n\t\teg, MPC823e User's Manual p.16-473). So, set\n\t\tCONFIG_SYS_I2C_SLAVE to 0.\n\n\t\tCONFIG_SYS_I2C_INIT_MPC5XXX\n\n\t\tWhen a board is reset during an i2c bus transfer\n\t\tchips might think that the current transfer is still\n\t\tin progress.  Reset the slave devices by sending start\n\t\tcommands until the slave device responds.\n\n\t\tThat's all that's required for CONFIG_HARD_I2C.\n\n\t\tIf you use the software i2c interface (CONFIG_SOFT_I2C)\n\t\tthen the following macros need to be defined (examples are\n\t\tfrom include/configs/lwmon.h):\n\n\t\tI2C_INIT\n\n\t\t(Optional). Any commands necessary to enable the I2C\n\t\tcontroller or configure ports.\n\n\t\teg: #define I2C_INIT (immr-\u003eim_cpm.cp_pbdir |=\tPB_SCL)\n\n\t\tI2C_PORT\n\n\t\t(Only for MPC8260 CPU). The I/O port to use (the code\n\t\tassumes both bits are on the same port). Valid values\n\t\tare 0..3 for ports A..D.\n\n\t\tI2C_ACTIVE\n\n\t\tThe code necessary to make the I2C data line active\n\t\t(driven).  If the data line is open collector, this\n\t\tdefine can be null.\n\n\t\teg: #define I2C_ACTIVE (immr-\u003eim_cpm.cp_pbdir |=  PB_SDA)\n\n\t\tI2C_TRISTATE\n\n\t\tThe code necessary to make the I2C data line tri-stated\n\t\t(inactive).  If the data line is open collector, this\n\t\tdefine can be null.\n\n\t\teg: #define I2C_TRISTATE (immr-\u003eim_cpm.cp_pbdir \u0026= ~PB_SDA)\n\n\t\tI2C_READ\n\n\t\tCode that returns TRUE if the I2C data line is high,\n\t\tFALSE if it is low.\n\n\t\teg: #define I2C_READ ((immr-\u003eim_cpm.cp_pbdat \u0026 PB_SDA) != 0)\n\n\t\tI2C_SDA(bit)\n\n\t\tIf \u003cbit\u003e is TRUE, sets the I2C data line high. If it\n\t\tis FALSE, it clears it (low).\n\n\t\teg: #define I2C_SDA(bit) \\\n\t\t\tif(bit) immr-\u003eim_cpm.cp_pbdat |=  PB_SDA; \\\n\t\t\telse\timmr-\u003eim_cpm.cp_pbdat \u0026= ~PB_SDA\n\n\t\tI2C_SCL(bit)\n\n\t\tIf \u003cbit\u003e is TRUE, sets the I2C clock line high. If it\n\t\tis FALSE, it clears it (low).\n\n\t\teg: #define I2C_SCL(bit) \\\n\t\t\tif(bit) immr-\u003eim_cpm.cp_pbdat |=  PB_SCL; \\\n\t\t\telse\timmr-\u003eim_cpm.cp_pbdat \u0026= ~PB_SCL\n\n\t\tI2C_DELAY\n\n\t\tThis delay is invoked four times per clock cycle so this\n\t\tcontrols the rate of data transfer.  The data rate thus\n\t\tis 1 / (I2C_DELAY * 4). Often defined to be something\n\t\tlike:\n\n\t\t#define I2C_DELAY  udelay(2)\n\n\t\tCONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA\n\n\t\tIf your arch supports the generic GPIO framework (asm/gpio.h),\n\t\tthen you may alternatively define the two GPIOs that are to be\n\t\tused as SCL / SDA.  Any of the previous I2C_xxx macros will\n\t\thave GPIO-based defaults assigned to them as appropriate.\n\n\t\tYou should define these to the GPIO value as given directly to\n\t\tthe generic GPIO functions.\n\n\t\tCONFIG_SYS_I2C_INIT_BOARD\n\n\t\tWhen a board is reset during an i2c bus transfer\n\t\tchips might think that the current transfer is still\n\t\tin progress. On some boards it is possible to access\n\t\tthe i2c SCLK line directly, either by using the\n\t\tprocessor pin as a GPIO or by having a second pin\n\t\tconnected to the bus. If this option is defined a\n\t\tcustom i2c_init_board() routine in boards/xxx/board.c\n\t\tis run early in the boot sequence.\n\n\t\tCONFIG_SYS_I2C_BOARD_LATE_INIT\n\n\t\tAn alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is\n\t\tdefined a custom i2c_board_late_init() routine in\n\t\tboards/xxx/board.c is run AFTER the operations in i2c_init()\n\t\tis completed. This callpoint can be used to unreset i2c bus\n\t\tusing CPU i2c controller register accesses for CPUs whose i2c\n\t\tcontroller provide such a method. It is called at the end of\n\t\ti2c_init() to allow i2c_init operations to setup the i2c bus\n\t\tcontroller on the CPU (e.g. setting bus speed \u0026 slave address).\n\n\t\tCONFIG_I2CFAST (PPC405GP|PPC405EP only)\n\n\t\tThis option enables configuration of bi_iic_fast[] flags\n\t\tin u-boot bd_info structure based on u-boot environment\n\t\tvariable \"i2cfast\". (see also i2cfast)\n\n\t\tCONFIG_I2C_MULTI_BUS\n\n\t\tThis option allows the use of multiple I2C buses, each of which\n\t\tmust have a controller.  At any point in time, only one bus is\n\t\tactive.  To switch to a different bus, use the 'i2c dev' command.\n\t\tNote that bus numbering is zero-based.\n\n\t\tCONFIG_SYS_I2C_NOPROBES\n\n\t\tThis option specifies a list of I2C devices that will be skipped\n\t\twhen the 'i2c probe' command is issued.  If CONFIG_I2C_MULTI_BUS\n\t\tis set, specify a list of bus-device pairs.  Otherwise, specify\n\t\ta 1D array of device addresses\n\n\t\te.g.\n\t\t\t#undef\tCONFIG_I2C_MULTI_BUS\n\t\t\t#define CONFIG_SYS_I2C_NOPROBES\t{0x50,0x68}\n\n\t\twill skip addresses 0x50 and 0x68 on a board with one I2C bus\n\n\t\t\t#define\tCONFIG_I2C_MULTI_BUS\n\t\t\t#define CONFIG_SYS_I2C_MULTI_NOPROBES\t{{0,0x50},{0,0x68},{1,0x54}}\n\n\t\twill skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1\n\n\t\tCONFIG_SYS_SPD_BUS_NUM\n\n\t\tIf defined, then this indicates the I2C bus number for DDR SPD.\n\t\tIf not defined, then U-Boot assumes that SPD is on I2C bus 0.\n\n\t\tCONFIG_SYS_RTC_BUS_NUM\n\n\t\tIf defined, then this indicates the I2C bus number for the RTC.\n\t\tIf not defined, then U-Boot assumes that RTC is on I2C bus 0.\n\n\t\tCONFIG_SYS_DTT_BUS_NUM\n\n\t\tIf defined, then this indicates the I2C bus number for the DTT.\n\t\tIf not defined, then U-Boot assumes that DTT is on I2C bus 0.\n\n\t\tCONFIG_SYS_I2C_DTT_ADDR:\n\n\t\tIf defined, specifies the I2C address of the DTT device.\n\t\tIf not defined, then U-Boot uses predefined value for\n\t\tspecified DTT device.\n\n\t\tCONFIG_FSL_I2C\n\n\t\tDefine this option if you want to use Freescale's I2C driver in\n\t\tdrivers/i2c/fsl_i2c.c.\n\n\t\tCONFIG_I2C_MUX\n\n\t\tDefine this option if you have I2C devices reached over 1 .. n\n\t\tI2C Muxes like the pca9544a. This option addes a new I2C\n\t\tCommand \"i2c bus [muxtype:muxaddr:muxchannel]\" which adds a\n\t\tnew I2C Bus to the existing I2C Busses. If you select the\n\t\tnew Bus with \"i2c dev\", u-bbot sends first the commandos for\n\t\tthe muxes to activate this new \"bus\".\n\n\t\tCONFIG_I2C_MULTI_BUS must be also defined, to use this\n\t\tfeature!\n\n\t\tExample:\n\t\tAdding a new I2C Bus reached over 2 pca9544a muxes\n\t\t\tThe First mux with address 70 and channel 6\n\t\t\tThe Second mux with address 71 and channel 4\n\n\t\t=\u003e i2c bus pca9544a:70:6:pca9544a:71:4\n\n\t\tUse the \"i2c bus\" command without parameter, to get a list\n\t\tof I2C Busses with muxes:\n\n\t\t=\u003e i2c bus\n\t\tBusses reached over muxes:\n\t\tBus ID: 2\n\t\t  reached over Mux(es):\n\t\t    pca9544a@70 ch: 4\n\t\tBus ID: 3\n\t\t  reached over Mux(es):\n\t\t    pca9544a@70 ch: 6\n\t\t    pca9544a@71 ch: 4\n\t\t=\u003e\n\n\t\tIf you now switch to the new I2C Bus 3 with \"i2c dev 3\"\n\t\tu-boot sends First the Commando to the mux@70 to enable\n\t\tchannel 6, and then the Commando to the mux@71 to enable\n\t\tthe channel 4.\n\n\t\tAfter that, you can use the \"normal\" i2c commands as\n\t\tusual, to communicate with your I2C devices behind\n\t\tthe 2 muxes.\n\n\t\tThis option is actually implemented for the bitbanging\n\t\talgorithm in common/soft_i2c.c and for the Hardware I2C\n\t\tBus on the MPC8260. But it should be not so difficult\n\t\tto add this option to other architectures.\n\n\t\tCONFIG_SOFT_I2C_READ_REPEATED_START\n\n\t\tdefining this will force the i2c_read() function in\n\t\tthe soft_i2c driver to perform an I2C repeated start\n\t\tbetween writing the address pointer and reading the\n\t\tdata.  If this define is omitted the default behaviour\n\t\tof doing a stop-start sequence will be used.  Most I2C\n\t\tdevices can use either method, but some require one or\n\t\tthe other.\n\n- SPI Support:\tCONFIG_SPI\n\n\t\tEnables SPI driver (so far only tested with\n\t\tSPI EEPROM, also an instance works with Crystal A/D and\n\t\tD/As on the SACSng board)\n\n\t\tCONFIG_SH_SPI\n\n\t\tEnables the driver for SPI controller on SuperH. Currently\n\t\tonly SH7757 is supported.\n\n\t\tCONFIG_SPI_X\n\n\t\tEnables extended (16-bit) SPI EEPROM addressing.\n\t\t(symmetrical to CONFIG_I2C_X)\n\n\t\tCONFIG_SOFT_SPI\n\n\t\tEnables a software (bit-bang) SPI driver rather than\n\t\tusing hardware support. This is a general purpose\n\t\tdriver that only requires three general I/O port pins\n\t\t(two outputs, one input) to function. If this is\n\t\tdefined, the board configuration must define several\n\t\tSPI configuration items (port pins to use, etc). For\n\t\tan example, see include/configs/sacsng.h.\n\n\t\tCONFIG_HARD_SPI\n\n\t\tEnables a hardware SPI driver for general-purpose reads\n\t\tand writes.  As with CONFIG_SOFT_SPI, the board configuration\n\t\tmust define a list of chip-select function pointers.\n\t\tCurrently supported on some MPC8xxx processors.  For an\n\t\texample, see include/configs/mpc8349emds.h.\n\n\t\tCONFIG_MXC_SPI\n\n\t\tEnables the driver for the SPI controllers on i.MX and MXC\n\t\tSoCs. Currently only i.MX31 is supported.\n\n- FPGA Support: CONFIG_FPGA\n\n\t\tEnables FPGA subsystem.\n\n\t\tCONFIG_FPGA_\u003cvendor\u003e\n\n\t\tEnables support for specific chip vendors.\n\t\t(ALTERA, XILINX)\n\n\t\tCONFIG_FPGA_\u003cfamily\u003e\n\n\t\tEnables support for FPGA family.\n\t\t(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)\n\n\t\tCONFIG_FPGA_COUNT\n\n\t\tSpecify the number of FPGA devices to support.\n\n\t\tCONFIG_SYS_FPGA_PROG_FEEDBACK\n\n\t\tEnable printing of hash marks during FPGA configuration.\n\n\t\tCONFIG_SYS_FPGA_CHECK_BUSY\n\n\t\tEnable checks on FPGA configuration interface busy\n\t\tstatus by the configuration function. This option\n\t\twill require a board or device specific function to\n\t\tbe written.\n\n\t\tCONFIG_FPGA_DELAY\n\n\t\tIf defined, a function that provides delays in the FPGA\n\t\tconfiguration driver.\n\n\t\tCONFIG_SYS_FPGA_CHECK_CTRLC\n\t\tAllow Control-C to interrupt FPGA configuration\n\n\t\tCONFIG_SYS_FPGA_CHECK_ERROR\n\n\t\tCheck for configuration errors during FPGA bitfile\n\t\tloading. For example, abort during Virtex II\n\t\tconfiguration if the INIT_B line goes low (which\n\t\tindicated a CRC error).\n\n\t\tCONFIG_SYS_FPGA_WAIT_INIT\n\n\t\tMaximum time to wait for the INIT_B line to deassert\n\t\tafter PROB_B has been deasserted during a Virtex II\n\t\tFPGA configuration sequence. The default time is 500\n\t\tms.\n\n\t\tCONFIG_SYS_FPGA_WAIT_BUSY\n\n\t\tMaximum time to wait for BUSY to deassert during\n\t\tVirtex II FPGA configuration. The default is 5 ms.\n\n\t\tCONFIG_SYS_FPGA_WAIT_CONFIG\n\n\t\tTime to wait after FPGA configuration. The default is\n\t\t200 ms.\n\n- Configuration Management:\n\t\tCONFIG_IDENT_STRING\n\n\t\tIf defined, this string will be added to the U-Boot\n\t\tversion information (U_BOOT_VERSION)\n\n- Vendor Parameter Protection:\n\n\t\tU-Boot considers the values of the environment\n\t\tvariables \"serial#\" (Board Serial Number) and\n\t\t\"ethaddr\" (Ethernet Address) to be parameters that\n\t\tare set once by the board vendor / manufacturer, and\n\t\tprotects these variables from casual modification by\n\t\tthe user. Once set, these variables are read-only,\n\t\tand write or delete attempts are rejected. You can\n\t\tchange this behaviour:\n\n\t\tIf CONFIG_ENV_OVERWRITE is #defined in your config\n\t\tfile, the write protection for vendor parameters is\n\t\tcompletely disabled. Anybody can change or delete\n\t\tthese parameters.\n\n\t\tAlternatively, if you #define _both_ CONFIG_ETHADDR\n\t\t_and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default\n\t\tEthernet address is installed in the environment,\n\t\twhich can be changed exactly ONCE by the user. [The\n\t\tserial# is unaffected by this, i. e. it remains\n\t\tread-only.]\n\n- Protected RAM:\n\t\tCONFIG_PRAM\n\n\t\tDefine this variable to enable the reservation of\n\t\t\"protected RAM\", i. e. RAM which is not overwritten\n\t\tby U-Boot. Define CONFIG_PRAM to hold the number of\n\t\tkB you want to reserve for pRAM. You can overwrite\n\t\tthis default value by defining an environment\n\t\tvariable \"pram\" to the number of kB you want to\n\t\treserve. Note that the board info structure will\n\t\tstill show the full amount of RAM. If pRAM is\n\t\treserved, a new environment variable \"mem\" will\n\t\tautomatically be defined to hold the amount of\n\t\tremaining RAM in a form that can be passed as boot\n\t\targument to Linux, for instance like that:\n\n\t\t\tsetenv bootargs ... mem=\\${mem}\n\t\t\tsaveenv\n\n\t\tThis way you can tell Linux not to use this memory,\n\t\teither, which results in a memory region that will\n\t\tnot be affected by reboots.\n\n\t\t*WARNING* If your board configuration uses automatic\n\t\tdetection of the RAM size, you must make sure that\n\t\tthis memory test is non-destructive. So far, the\n\t\tfollowing board configurations are known to be\n\t\t\"pRAM-clean\":\n\n\t\t\tETX094, IVMS8, IVML24, SPD8xx, TQM8xxL,\n\t\t\tHERMES, IP860, RPXlite, LWMON, LANTEC,\n\t\t\tFLAGADM, TQM8260\n\n- Error Recovery:\n\t\tCONFIG_PANIC_HANG\n\n\t\tDefine this variable to stop the system in case of a\n\t\tfatal error, so that you have to reset it manually.\n\t\tThis is probably NOT a good idea for an embedded\n\t\tsystem where you want the system to reboot\n\t\tautomatically as fast as possible, but it may be\n\t\tuseful during development since you can try to debug\n\t\tthe conditions that lead to the situation.\n\n\t\tCONFIG_NET_RETRY_COUNT\n\n\t\tThis variable defines the number of retries for\n\t\tnetwork operations like ARP, RARP, TFTP, or BOOTP\n\t\tbefore giving up the operation. If not defined, a\n\t\tdefault value of 5 is used.\n\n\t\tCONFIG_ARP_TIMEOUT\n\n\t\tTimeout waiting for an ARP reply in milliseconds.\n\n- Command Interpreter:\n\t\tCONFIG_AUTO_COMPLETE\n\n\t\tEnable auto completion of commands using TAB.\n\n\t\tNote that this feature has NOT been implemented yet\n\t\tfor the \"hush\" shell.\n\n\n\t\tCONFIG_SYS_HUSH_PARSER\n\n\t\tDefine this variable to enable the \"hush\" shell (from\n\t\tBusybox) as command line interpreter, thus enabling\n\t\tpowerful command line syntax like\n\t\tif...then...else...fi conditionals or `\u0026\u0026' and '||'\n\t\tconstructs (\"shell scripts\").\n\n\t\tIf undefined, you get the old, much simpler behaviour\n\t\twith a somewhat smaller memory footprint.\n\n\n\t\tCONFIG_SYS_PROMPT_HUSH_PS2\n\n\t\tThis defines the secondary prompt string, which is\n\t\tprinted when the command interpreter needs more input\n\t\tto complete a command. Usually \"\u003e \".\n\n\tNote:\n\n\t\tIn the current implementation, the local variables\n\t\tspace and global environment variables space are\n\t\tseparated. Local variables are those you define by\n\t\tsimply typing `name=value'. To access a local\n\t\tvariable later on, you have write `$name' or\n\t\t`${name}'; to execute the contents of a variable\n\t\tdirectly type `$name' at the command prompt.\n\n\t\tGlobal environment variables are those you use\n\t\tsetenv/printenv to work with. To run a command stored\n\t\tin such a variable, you need to use the run command,\n\t\tand you must not use the '$' sign to access them.\n\n\t\tTo store commands and special characters in a\n\t\tvariable, please use double quotation marks\n\t\tsurrounding the whole text of the variable, instead\n\t\tof the backslashes before semicolons and special\n\t\tsymbols.\n\n- Commandline Editing and History:\n\t\tCONFIG_CMDLINE_EDITING\n\n\t\tEnable editing and History functions for interactive\n\t\tcommandline input operations\n\n- Default Environment:\n\t\tCONFIG_EXTRA_ENV_SETTINGS\n\n\t\tDefine this to contain any number of null terminated\n\t\tstrings (variable = value pairs) that will be part of\n\t\tthe default environment compiled into the boot image.\n\n\t\tFor example, place something like this in your\n\t\tboard's config file:\n\n\t\t#define CONFIG_EXTRA_ENV_SETTINGS \\\n\t\t\t\"myvar1=value1\\0\" \\\n\t\t\t\"myvar2=value2\\0\"\n\n\t\tWarning: This method is based on knowledge about the\n\t\tinternal format how the environment is stored by the\n\t\tU-Boot code. This is NOT an official, exported\n\t\tinterface! Although it is unlikely that this format\n\t\twill change soon, there is no guarantee either.\n\t\tYou better know what you are doing here.\n\n\t\tNote: overly (ab)use of the default environment is\n\t\tdiscouraged. Make sure to check other ways to preset\n\t\tthe environment like the \"source\" command or the\n\t\tboot command first.\n\n- DataFlash Support:\n\t\tCONFIG_HAS_DATAFLASH\n\n\t\tDefining this option enables DataFlash features and\n\t\tallows to read/write in Dataflash via the standard\n\t\tcommands cp, md...\n\n- SystemACE Support:\n\t\tCONFIG_SYSTEMACE\n\n\t\tAdding this option adds support for Xilinx SystemACE\n\t\tchips attached via some sort of local bus. The address\n\t\tof the chip must also be defined in the\n\t\tCONFIG_SYS_SYSTEMACE_BASE macro. For example:\n\n\t\t#define CONFIG_SYSTEMACE\n\t\t#define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000\n\n\t\tWhen SystemACE support is added, the \"ace\" device type\n\t\tbecomes available to the fat commands, i.e. fatls.\n\n- TFTP Fixed UDP Port:\n\t\tCONFIG_TFTP_PORT\n\n\t\tIf this is defined, the environment variable tftpsrcp\n\t\tis used to supply the TFTP UDP source port value.\n\t\tIf tftpsrcp isn't defined, the normal pseudo-random port\n\t\tnumber generator is used.\n\n\t\tAlso, the environment variable tftpdstp is used to supply\n\t\tthe TFTP UDP destination port value.  If tftpdstp isn't\n\t\tdefined, the normal port 69 is used.\n\n\t\tThe purpose for tftpsrcp is to allow a TFTP server to\n\t\tblindly start the TFTP transfer using the pre-configured\n\t\ttarget IP address and UDP port. This has the effect of\n\t\t\"punching through\" the (Windows XP) firewall, allowing\n\t\tthe remainder of the TFTP transfer to proceed normally.\n\t\tA better solution is to properly configure the firewall,\n\t\tbut sometimes that is not allowed.\n\n- Show boot progress:\n\t\tCONFIG_SHOW_BOOT_PROGRESS\n\n\t\tDefining this option allows to add some board-\n\t\tspecific code (calling a user-provided function\n\t\t\"show_boot_progress(int)\") that enables you to show\n\t\tthe system's boot progress on some display (for\n\t\texample, some LED's) on your board. At the moment,\n\t\tthe following checkpoints are implemented:\n\nLegacy uImage format:\n\n  Arg\tWhere\t\t\tWhen\n    1\tcommon/cmd_bootm.c\tbefore attempting to boot an image\n   -1\tcommon/cmd_bootm.c\tImage header has bad\t magic number\n    2\tcommon/cmd_bootm.c\tImage header has correct magic number\n   -2\tcommon/cmd_bootm.c\tImage header has bad\t checksum\n    3\tcommon/cmd_bootm.c\tImage header has correct checksum\n   -3\tcommon/cmd_bootm.c\tImage data   has bad\t checksum\n    4\tcommon/cmd_bootm.c\tImage data   has correct checksum\n   -4\tcommon/cmd_bootm.c\tImage is for unsupported architecture\n    5\tcommon/cmd_bootm.c\tArchitecture check OK\n   -5\tcommon/cmd_bootm.c\tWrong Image Type (not kernel, multi)\n    6\tcommon/cmd_bootm.c\tImage Type check OK\n   -6\tcommon/cmd_bootm.c\tgunzip uncompression error\n   -7\tcommon/cmd_bootm.c\tUnimplemented compression type\n    7\tcommon/cmd_bootm.c\tUncompression OK\n    8\tcommon/cmd_bootm.c\tNo uncompress/copy overwrite error\n   -9\tcommon/cmd_bootm.c\tUnsupported OS (not Linux, BSD, VxWorks, QNX)\n\n    9\tcommon/image.c\t\tStart initial ramdisk verification\n  -10\tcommon/image.c\t\tRamdisk header has bad\t   magic number\n  -11\tcommon/image.c\t\tRamdisk header has bad\t   checksum\n   10\tcommon/image.c\t\tRamdisk header is OK\n  -12\tcommon/image.c\t\tRamdisk data   has bad\t   checksum\n   11\tcommon/image.c\t\tRamdisk data   has correct checksum\n   12\tcommon/image.c\t\tRamdisk verification complete, start loading\n  -13\tcommon/image.c\t\tWrong Image Type (not PPC Linux ramdisk)\n   13\tcommon/image.c\t\tStart multifile image verification\n   14\tcommon/image.c\t\tNo initial ramdisk, no multifile, continue.\n\n   15\tarch/\u003carch\u003e/lib/bootm.c\tAll preparation done, transferring control to OS\n\n  -30\tarch/powerpc/lib/board.c\tFatal error, hang the system\n  -31\tpost/post.c\t\tPOST test failed, detected by post_output_backlog()\n  -32\tpost/post.c\t\tPOST test failed, detected by post_run_single()\n\n   34\tcommon/cmd_doc.c\tbefore loading a Image from a DOC device\n  -35\tcommon/cmd_doc.c\tBad usage of \"doc\" command\n   35\tcommon/cmd_doc.c\tcorrect usage of \"doc\" command\n  -36\tcommon/cmd_doc.c\tNo boot device\n   36\tcommon/cmd_doc.c\tcorrect boot device\n  -37\tcommon/cmd_doc.c\tUnknown Chip ID on boot device\n   37\tcommon/cmd_doc.c\tcorrect chip ID found, device available\n  -38\tcommon/cmd_doc.c\tRead Error on boot device\n   38\tcommon/cmd_doc.c\treading Image header from DOC device OK\n  -39\tcommon/cmd_doc.c\tImage header has bad magic number\n   39\tcommon/cmd_doc.c\tImage header has correct magic number\n  -40\tcommon/cmd_doc.c\tError reading Image from DOC device\n   40\tcommon/cmd_doc.c\tImage header has correct magic number\n   41\tcommon/cmd_ide.c\tbefore loading a Image from a IDE device\n  -42\tcommon/cmd_ide.c\tBad usage of \"ide\" command\n   42\tcommon/cmd_ide.c\tcorrect usage of \"ide\" command\n  -43\tcommon/cmd_ide.c\tNo boot device\n   43\tcommon/cmd_ide.c\tboot device found\n  -44\tcommon/cmd_ide.c\tDevice not available\n   44\tcommon/cmd_ide.c\tDevice available\n  -45\tcommon/cmd_ide.c\twrong partition selected\n   45\tcommon/cmd_ide.c\tpartition selected\n  -46\tcommon/cmd_ide.c\tUnknown partition table\n   46\tcommon/cmd_ide.c\tvalid partition table found\n  -47\tcommon/cmd_ide.c\tInvalid partition type\n   47\tcommon/cmd_ide.c\tcorrect partition type\n  -48\tcommon/cmd_ide.c\tError reading Image Header on boot device\n   48\tcommon/cmd_ide.c\treading Image Header from IDE device OK\n  -49\tcommon/cmd_ide.c\tImage header has bad magic number\n   49\tcommon/cmd_ide.c\tImage header has correct magic number\n  -50\tcommon/cmd_ide.c\tImage header has bad\t checksum\n   50\tcommon/cmd_ide.c\tImage header has correct checksum\n  -51\tcommon/cmd_ide.c\tError reading Image from IDE device\n   51\tcommon/cmd_ide.c\treading Image from IDE device OK\n   52\tcommon/cmd_nand.c\tbefore loading a Image from a NAND device\n  -53\tcommon/cmd_nand.c\tBad usage of \"nand\" command\n   53\tcommon/cmd_nand.c\tcorrect usage of \"nand\" command\n  -54\tcommon/cmd_nand.c\tNo boot device\n   54\tcommon/cmd_nand.c\tboot device found\n  -55\tcommon/cmd_nand.c\tUnknown Chip ID on boot device\n   55\tcommon/cmd_nand.c\tcorrect chip ID found, device available\n  -56\tcommon/cmd_nand.c\tError reading Image Header on boot device\n   56\tcommon/cmd_nand.c\treading Image Header from NAND device OK\n  -57\tcommon/cmd_nand.c\tImage header has bad magic number\n   57\tcommon/cmd_nand.c\tImage header has correct magic number\n  -58\tcommon/cmd_nand.c\tError reading Image from NAND device\n   58\tcommon/cmd_nand.c\treading Image from NAND device OK\n\n  -60\tcommon/env_common.c\tEnvironment has a bad CRC, using default\n\n   64\tnet/eth.c\t\tstarting with Ethernet configuration.\n  -64\tnet/eth.c\t\tno Ethernet found.\n   65\tnet/eth.c\t\tEthernet found.\n\n  -80\tcommon/cmd_net.c\tusage wrong\n   80\tcommon/cmd_net.c\tbefore calling NetLoop()\n  -81\tcommon/cmd_net.c\tsome error in NetLoop() occurred\n   81\tcommon/cmd_net.c\tNetLoop() back without error\n  -82\tcommon/cmd_net.c\tsize == 0 (File with size 0 loaded)\n   82\tcommon/cmd_net.c\ttrying automatic boot\n   83\tcommon/cmd_net.c\trunning \"source\" command\n  -83\tcommon/cmd_net.c\tsome error in automatic boot or \"source\" command\n   84\tcommon/cmd_net.c\tend without errors\n\nFIT uImage format:\n\n  Arg\tWhere\t\t\tWhen\n  100\tcommon/cmd_bootm.c\tKernel FIT Image has correct format\n -100\tcommon/cmd_bootm.c\tKernel FIT Image has incorrect format\n  101\tcommon/cmd_bootm.c\tNo Kernel subimage unit name, using configuration\n -101\tcommon/cmd_bootm.c\tCan't get configuration for kernel subimage\n  102\tcommon/cmd_bootm.c\tKernel unit name specified\n -103\tcommon/cmd_bootm.c\tCan't get kernel subimage node offset\n  103\tcommon/cmd_bootm.c\tFound configuration node\n  104\tcommon/cmd_bootm.c\tGot kernel subimage node offset\n -104\tcommon/cmd_bootm.c\tKernel subimage hash verification failed\n  105\tcommon/cmd_bootm.c\tKernel subimage hash verification OK\n -105\tcommon/cmd_bootm.c\tKernel subimage is for unsupported architecture\n  106\tcommon/cmd_bootm.c\tArchitecture check OK\n -106\tcommon/cmd_bootm.c\tKernel subimage has wrong type\n  107\tcommon/cmd_bootm.c\tKernel subimage type OK\n -107\tcommon/cmd_bootm.c\tCan't get kernel subimage data/size\n  108\tcommon/cmd_bootm.c\tGot kernel subimage data/size\n -108\tcommon/cmd_bootm.c\tWrong image type (not legacy, FIT)\n -109\tcommon/cmd_bootm.c\tCan't get kernel subimage type\n -110\tcommon/cmd_bootm.c\tCan't get kernel subimage comp\n -111\tcommon/cmd_bootm.c\tCan't get kernel subimage os\n -112\tcommon/cmd_bootm.c\tCan't get kernel subimage load address\n -113\tcommon/cmd_bootm.c\tImage uncompress/copy overwrite error\n\n  120\tcommon/image.c\t\tStart initial ramdisk verification\n -120\tcommon/image.c\t\tRamdisk FIT image has incorrect format\n  121\tcommon/image.c\t\tRamdisk FIT image has correct format\n  122\tcommon/image.c\t\tNo ramdisk subimage unit name, using configuration\n -122\tcommon/image.c\t\tCan't get configuration for ramdisk subimage\n  123\tcommon/image.c\t\tRamdisk unit name specified\n -124\tcommon/image.c\t\tCan't get ramdisk subimage node offset\n  125\tcommon/image.c\t\tGot ramdisk subimage node offset\n -125\tcommon/image.c\t\tRamdisk subimage hash verification failed\n  126\tcommon/image.c\t\tRamdisk subimage hash verification OK\n -126\tcommon/image.c\t\tRamdisk subimage for unsupported architecture\n  127\tcommon/image.c\t\tArchitecture check OK\n -127\tcommon/image.c\t\tCan't get ramdisk subimage data/size\n  128\tcommon/image.c\t\tGot ramdisk subimage data/size\n  129\tcommon/image.c\t\tCan't get ramdisk load address\n -129\tcommon/image.c\t\tGot ramdisk load address\n\n -130\tcommon/cmd_doc.c\tIncorrect FIT image format\n  131\tcommon/cmd_doc.c\tFIT image format OK\n\n -140\tcommon/cmd_ide.c\tIncorrect FIT image format\n  141\tcommon/cmd_ide.c\tFIT image format OK\n\n -150\tcommon/cmd_nand.c\tIncorrect FIT image format\n  151\tcommon/cmd_nand.c\tFIT image format OK\n\n- Automatic software updates via TFTP server\n\t\tCONFIG_UPDATE_TFTP\n\t\tCONFIG_UPDATE_TFTP_CNT_MAX\n\t\tCONFIG_UPDATE_TFTP_MSEC_MAX\n\n\t\tThese options enable and control the auto-update feature;\n\t\tfor a more detailed description refer to doc/README.update.\n\n- MTD Support (mtdparts command, UBI support)\n\t\tCONFIG_MTD_DEVICE\n\n\t\tAdds the MTD device infrastructure from the Linux kernel.\n\t\tNeeded for mtdparts command support.\n\n\t\tCONFIG_MTD_PARTITIONS\n\n\t\tAdds the MTD partitioning infrastructure from the Linux\n\t\tkernel. Needed for UBI support.\n\n\nModem Support:\n--------------\n\n[so far only for SMDK2400 and TRAB boards]\n\n- Modem support enable:\n\t\tCONFIG_MODEM_SUPPORT\n\n- RTS/CTS Flow control enable:\n\t\tCONFIG_HWFLOW\n\n- Modem debug support:\n\t\tCONFIG_MODEM_SUPPORT_DEBUG\n\n\t\tEnables debugging stuff (char screen[1024], dbg())\n\t\tfor modem support. Useful only with BDI2000.\n\n- Interrupt support (PPC):\n\n\t\tThere are common interrupt_init() and timer_interrupt()\n\t\tfor all PPC archs. interrupt_init() calls interrupt_init_cpu()\n\t\tfor CPU specific initialization. interrupt_init_cpu()\n\t\tshould set decrementer_count to appropriate value. If\n\t\tCPU resets decrementer automatically after interrupt\n\t\t(ppc4xx) it should set decrementer_count to zero.\n\t\ttimer_interrupt() calls timer_interrupt_cpu() for CPU\n\t\tspecific handling. If board has watchdog / status_led\n\t\t/ other_activity_monitor it works automatically from\n\t\tgeneral timer_interrupt().\n\n- General:\n\n\t\tIn the target system modem support is enabled when a\n\t\tspecific key (key combination) is pressed during\n\t\tpower-on. Otherwise U-Boot will boot normally\n\t\t(autoboot). The key_pressed() function is called from\n\t\tboard_init(). Currently key_pressed() is a dummy\n\t\tfunction, returning 1 and thus enabling modem\n\t\tinitialization.\n\n\t\tIf there are no modem init strings in the\n\t\tenvironment, U-Boot proceed to autoboot; the\n\t\tprevious output (banner, info printfs) will be\n\t\tsuppressed, though.\n\n\t\tSee also: doc/README.Modem\n\n\nConfiguration Settings:\n-----------------------\n\n- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;\n\t\tundefine this when you're short of memory.\n\n- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default\n\t\twidth of the commands listed in the 'help' command output.\n\n- CONFIG_SYS_PROMPT:\tThis is what U-Boot prints on the console to\n\t\tprompt for user input.\n\n- CONFIG_SYS_CBSIZE:\tBuffer size for input from the Console\n\n- CONFIG_SYS_PBSIZE:\tBuffer size for Console output\n\n- CONFIG_SYS_MAXARGS:\tmax. Number of arguments accepted for monitor commands\n\n- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to\n\t\tthe application (usually a Linux kernel) when it is\n\t\tbooted\n\n- CONFIG_SYS_BAUDRATE_TABLE:\n\t\tList of legal baudrate settings for this board.\n\n- CONFIG_SYS_CONSOLE_INFO_QUIET\n\t\tSuppress display of console information at boot.\n\n- CONFIG_SYS_CONSOLE_IS_IN_ENV\n\t\tIf the board specific function\n\t\t\textern int overwrite_console (void);\n\t\treturns 1, the stdin, stderr and stdout are switched to the\n\t\tserial port, else the settings in the environment are used.\n\n- CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE\n\t\tEnable the call to overwrite_console().\n\n- CONFIG_SYS_CONSOLE_ENV_OVERWRITE\n\t\tEnable overwrite of previous console environment settings.\n\n- CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END:\n\t\tBegin and End addresses of the area used by the\n\t\tsimple memory test.\n\n- CONFIG_SYS_ALT_MEMTEST:\n\t\tEnable an alternate, more extensive memory test.\n\n- CONFIG_SYS_MEMTEST_SCRATCH:\n\t\tScratch address used by the alternate memory test\n\t\tYou only need to set this if address zero isn't writeable\n\n- CONFIG_SYS_MEM_TOP_HIDE (PPC only):\n\t\tIf CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,\n\t\tthis specified memory area will get subtracted from the top\n\t\t(end) of RAM and won't get \"touched\" at all by U-Boot. By\n\t\tfixing up gd-\u003eram_size the Linux kernel should gets passed\n\t\tthe now \"corrected\" memory size and won't touch it either.\n\t\tThis should work for arch/ppc and arch/powerpc. Only Linux\n\t\tboard ports in arch/powerpc with bootwrapper support that\n\t\trecalculate the memory size from the SDRAM controller setup\n\t\twill have to get fixed in Linux additionally.\n\n\t\tThis option can be used as a workaround for the 440EPx/GRx\n\t\tCHIP 11 errata where the last 256 bytes in SDRAM shouldn't\n\t\tbe touched.\n\n\t\tWARNING: Please make sure that this value is a multiple of\n\t\tthe Linux page size (normally 4k). If this is not the case,\n\t\tthen the end address of the Linux memory will be located at a\n\t\tnon page size aligned address and this could cause major\n\t\tproblems.\n\n- CONFIG_SYS_TFTP_LOADADDR:\n\t\tDefault load address for network file downloads\n\n- CONFIG_SYS_LOADS_BAUD_CHANGE:\n\t\tEnable temporary baudrate change while serial download\n\n- CONFIG_SYS_SDRAM_BASE:\n\t\tPhysical start address of SDRAM. _Must_ be 0 here.\n\n- CONFIG_SYS_MBIO_BASE:\n\t\tPhysical start address of Motherboard I/O (if using a\n\t\tCogent motherboard)\n\n- CONFIG_SYS_FLASH_BASE:\n\t\tPhysical start address of Flash memory.\n\n- CONFIG_SYS_MONITOR_BASE:\n\t\tPhysical start address of boot monitor code (set by\n\t\tmake config files to be same as the text base address\n\t\t(CONFIG_SYS_TEXT_BASE) used when linking) - same as\n\t\tCONFIG_SYS_FLASH_BASE when booting from flash.\n\n- CONFIG_SYS_MONITOR_LEN:\n\t\tSize of memory reserved for monitor code, used to\n\t\tdetermine _at_compile_time_ (!) if the environment is\n\t\tembedded within the U-Boot image, or in a separate\n\t\tflash sector.\n\n- CONFIG_SYS_MALLOC_LEN:\n\t\tSize of DRAM reserved for malloc() use.\n\n- CONFIG_SYS_BOOTM_LEN:\n\t\tNormally compressed uImages are limited to an\n\t\tuncompressed size of 8 MBytes. If this is not enough,\n\t\tyou can define CONFIG_SYS_BOOTM_LEN in your board config file\n\t\tto adjust this setting to your needs.\n\n- CONFIG_SYS_BOOTMAPSZ:\n\t\tMaximum size of memory mapped by the startup code of\n\t\tthe Linux kernel; all data that must be processed by\n\t\tthe Linux kernel (bd_info, boot arguments, FDT blob if\n\t\tused) must be put below this limit, unless \"bootm_low\"\n\t\tenviroment variable is defined and non-zero. In such case\n\t\tall data for the Linux kernel must be between \"bootm_low\"\n\t\tand \"bootm_low\" + CONFIG_SYS_BOOTMAPSZ.\n\n- CONFIG_SYS_BOOT_RAMDISK_HIGH:\n\t\tEnable initrd_high functionality.  If defined then the\n\t\tinitrd_high feature is enabled and the bootm ramdisk subcommand\n\t\tis enabled.\n\n- CONFIG_SYS_BOOT_GET_CMDLINE:\n\t\tEnables allocating and saving kernel cmdline in space between\n\t\t\"bootm_low\" and \"bootm_low\" + BOOTMAPSZ.\n\n- CONFIG_SYS_BOOT_GET_KBD:\n\t\tEnables allocating and saving a kernel copy of the bd_info in\n\t\tspace between \"bootm_low\" and \"bootm_low\" + BOOTMAPSZ.\n\n- CONFIG_SYS_MAX_FLASH_BANKS:\n\t\tMax number of Flash memory banks\n\n- CONFIG_SYS_MAX_FLASH_SECT:\n\t\tMax number of sectors on a Flash chip\n\n- CONFIG_SYS_FLASH_ERASE_TOUT:\n\t\tTimeout for Flash erase operations (in ms)\n\n- CONFIG_SYS_FLASH_WRITE_TOUT:\n\t\tTimeout for Flash write operations (in ms)\n\n- CONFIG_SYS_FLASH_LOCK_TOUT\n\t\tTimeout for Flash set sector lock bit operation (in ms)\n\n- CONFIG_SYS_FLASH_UNLOCK_TOUT\n\t\tTimeout for Flash clear lock bits operation (in ms)\n\n- CONFIG_SYS_FLASH_PROTECTION\n\t\tIf defined, hardware flash sectors protection is used\n\t\tinstead of U-Boot software protection.\n\n- CONFIG_SYS_DIRECT_FLASH_TFTP:\n\n\t\tEnable TFTP transfers directly to flash memory;\n\t\twithout this option such a download has to be\n\t\tperformed in two steps: (1) download to RAM, and (2)\n\t\tcopy from RAM to flash.\n\n\t\tThe two-step approach is usually more reliable, since\n\t\tyou can check if the download worked before you erase\n\t\tthe flash, but in some situations (when system RAM is\n\t\ttoo limited to allow for a temporary copy of the\n\t\tdownloaded image) this option may be very useful.\n\n- CONFIG_SYS_FLASH_CFI:\n\t\tDefine if the flash driver uses extra elements in the\n\t\tcommon flash structure for storing flash geometry.\n\n- CONFIG_FLASH_CFI_DRIVER\n\t\tThis option also enables the building of the cfi_flash driver\n\t\tin the drivers directory\n\n- CONFIG_FLASH_CFI_MTD\n\t\tThis option enables the building of the cfi_mtd driver\n\t\tin the drivers directory. The driver exports CFI flash\n\t\tto the MTD layer.\n\n- CONFIG_SYS_FLASH_USE_BUFFER_WRITE\n\t\tUse buffered writes to flash.\n\n- CONFIG_FLASH_SPANSION_S29WS_N\n\t\ts29ws-n MirrorBit flash has non-standard addresses for buffered\n\t\twrite commands.\n\n- CONFIG_SYS_FLASH_QUIET_TEST\n\t\tIf this option is defined, the common CFI flash doesn't\n\t\tprint it's warning upon not recognized FLASH banks. This\n\t\tis useful, if some of the configured banks are only\n\t\toptionally available.\n\n- CONFIG_FLASH_SHOW_PROGRESS\n\t\tIf defined (must be an integer), print out countdown\n\t\tdigits and dots.  Recommended value: 45 (9..1) for 80\n\t\tcolumn displays, 15 (3..1) for 40 column displays.\n\n- CONFIG_SYS_RX_ETH_BUFFER:\n\t\tDefines the number of Ethernet receive buffers. On some\n\t\tEthernet controllers it is recommended to set this value\n\t\tto 8 or even higher (EEPRO100 or 405 EMAC), since all\n\t\tbuffers can be full shortly after enabling the interface\n\t\ton high Ethernet traffic.\n\t\tDefaults to 4 if not defined.\n\n- CONFIG_ENV_MAX_ENTRIES\n\n\tMaximum number of entries in the hash table that is used\n\tinternally to store the environment settings. The default\n\tsetting is supposed to be generous and should work in most\n\tcases. This setting can be used to tune behaviour; see\n\tlib/hashtable.c for details.\n\nThe following definitions that deal with the placement and management\nof environment data (variable area); in general, we support the\nfollowing configurations:\n\n- CONFIG_ENV_IS_IN_FLASH:\n\n\tDefine this if the environment is in flash memory.\n\n\ta) The environment occupies one whole flash sector, which is\n\t   \"embedded\" in the text segment with the U-Boot code. This\n\t   happens usually with \"bottom boot sector\" or \"top boot\n\t   sector\" type flash chips, which have several smaller\n\t   sectors at the start or the end. For instance, such a\n\t   layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In\n\t   such a case you would place the environment in one of the\n\t   4 kB sectors - with U-Boot code before and after it. With\n\t   \"top boot sector\" type flash chips, you would put the\n\t   environment in one of the last sectors, leaving a gap\n\t   between U-Boot and the environment.\n\n\t- CONFIG_ENV_OFFSET:\n\n\t   Offset of environment data (variable area) to the\n\t   beginning of flash memory; for instance, with bottom boot\n\t   type flash chips the second sector can be used: the offset\n\t   for this sector is given here.\n\n\t   CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.\n\n\t- CONFIG_ENV_ADDR:\n\n\t   This is just another way to specify the start address of\n\t   the flash sector containing the environment (instead of\n\t   CONFIG_ENV_OFFSET).\n\n\t- CONFIG_ENV_SECT_SIZE:\n\n\t   Size of the sector containing the environment.\n\n\n\tb) Sometimes flash chips have few, equal sized, BIG sectors.\n\t   In such a case you don't want to spend a whole sector for\n\t   the environment.\n\n\t- CONFIG_ENV_SIZE:\n\n\t   If you use this in combination with CONFIG_ENV_IS_IN_FLASH\n\t   and CONFIG_ENV_SECT_SIZE, you can specify to use only a part\n\t   of this flash sector for the environment. This saves\n\t   memory for the RAM copy of the environment.\n\n\t   It may also save flash memory if you decide to use this\n\t   when your environment is \"embedded\" within U-Boot code,\n\t   since then the remainder of the flash sector could be used\n\t   for U-Boot code. It should be pointed out that this is\n\t   STRONGLY DISCOURAGED from a robustness point of view:\n\t   updating the environment in flash makes it always\n\t   necessary to erase the WHOLE sector. If something goes\n\t   wrong before the contents has been restored from a copy in\n\t   RAM, your target system will be dead.\n\n\t- CONFIG_ENV_ADDR_REDUND\n\t  CONFIG_ENV_SIZE_REDUND\n\n\t   These settings describe a second storage area used to hold\n\t   a redundant copy of the environment data, so that there is\n\t   a valid backup copy in case there is a power failure during\n\t   a \"saveenv\" operation.\n\nBE CAREFUL! Any changes to the flash layout, and some changes to the\nsource code will make it necessary to adapt \u003cboard\u003e/u-boot.lds*\naccordingly!\n\n\n- CONFIG_ENV_IS_IN_NVRAM:\n\n\tDefine this if you have some non-volatile memory device\n\t(NVRAM, battery buffered SRAM) which you want to use for the\n\tenvironment.\n\n\t- CONFIG_ENV_ADDR:\n\t- CONFIG_ENV_SIZE:\n\n\t  These two #defines are used to determine the memory area you\n\t  want to use for environment. It is assumed that this memory\n\t  can just be read and written to, without any special\n\t  provision.\n\nBE CAREFUL! The first access to the environment happens quite early\nin U-Boot initalization (when we try to get the setting of for the\nconsole baudrate). You *MUST* have mapped your NVRAM area then, or\nU-Boot will hang.\n\nPlease note that even with NVRAM we still use a copy of the\nenvironment in RAM: we could work on NVRAM directly, but we want to\nkeep settings there always unmodified except somebody uses \"saveenv\"\nto save the current settings.\n\n\n- CONFIG_ENV_IS_IN_EEPROM:\n\n\tUse this if you have an EEPROM or similar serial access\n\tdevice and a driver for it.\n\n\t- CONFIG_ENV_OFFSET:\n\t- CONFIG_ENV_SIZE:\n\n\t  These two #defines specify the offset and size of the\n\t  environment area within the total memory of your EEPROM.\n\n\t- CONFIG_SYS_I2C_EEPROM_ADDR:\n\t  If defined, specified the chip address of the EEPROM device.\n\t  The default address is zero.\n\n\t- CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:\n\t  If defined, the number of bits used to address bytes in a\n\t  single page in the EEPROM device.  A 64 byte page, for example\n\t  would require six bits.\n\n\t- CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:\n\t  If defined, the number of milliseconds to delay between\n\t  page writes.\tThe default is zero milliseconds.\n\n\t- CONFIG_SYS_I2C_EEPROM_ADDR_LEN:\n\t  The length in bytes of the EEPROM memory array address.  Note\n\t  that this is NOT the chip address length!\n\n\t- CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:\n\t  EEPROM chips that implement \"address overflow\" are ones\n\t  like Catalyst 24WC04/08/16 which has 9/10/11 bits of\n\t  address and the extra bits end up in the \"chip address\" bit\n\t  slots. This makes a 24WC08 (1Kbyte) chip look like four 256\n\t  byte chips.\n\n\t  Note that we consider the length of the address field to\n\t  still be one byte because the extra address bits are hidden\n\t  in the chip address.\n\n\t- CONFIG_SYS_EEPROM_SIZE:\n\t  The size in bytes of the EEPROM device.\n\n\t- CONFIG_ENV_EEPROM_IS_ON_I2C\n\t  define this, if you have I2C and SPI activated, and your\n\t  EEPROM, which holds the environment, is on the I2C bus.\n\n\t- CONFIG_I2C_ENV_EEPROM_BUS\n\t  if you have an Environment on an EEPROM reached over\n\t  I2C muxes, you can define here, how to reach this\n\t  EEPROM. For example:\n\n\t  #define CONFIG_I2C_ENV_EEPROM_BUS\t  \"pca9547:70:d\\0\"\n\n\t  EEPROM which holds the environment, is reached over\n\t  a pca9547 i2c mux with address 0x70, channel 3.\n\n- CONFIG_ENV_IS_IN_DATAFLASH:\n\n\tDefine this if you have a DataFlash memory device which you\n\twant to use for the environment.\n\n\t- CONFIG_ENV_OFFSET:\n\t- CONFIG_ENV_ADDR:\n\t- CONFIG_ENV_SIZE:\n\n\t  These three #defines specify the offset and size of the\n\t  environment area within the total memory of your DataFlash placed\n\t  at the specified address.\n\n- CONFIG_ENV_IS_IN_NAND:\n\n\tDefine this if you have a NAND device which you want to use\n\tfor the environment.\n\n\t- CONFIG_ENV_OFFSET:\n\t- CONFIG_ENV_SIZE:\n\n\t  These two #defines specify the offset and size of the environment\n\t  area within the first NAND device.  CONFIG_ENV_OFFSET must be\n\t  aligned to an erase block boundary.\n\n\t- CONFIG_ENV_OFFSET_REDUND (optional):\n\n\t  This setting describes a second storage area of CONFIG_ENV_SIZE\n\t  size used to hold a redundant copy of the environment data, so\n\t  that there is a valid backup copy in case there is a power failure\n\t  during a \"saveenv\" operation.  CONFIG_ENV_OFFSET_RENDUND must be\n\t  aligned to an erase block boundary.\n\n\t- CONFIG_ENV_RANGE (optional):\n\n\t  Specifies the length of the region in which the environment\n\t  can be written.  This should be a multiple of the NAND device's\n\t  block size.  Specifying a range with more erase blocks than\n\t  are needed to hold CONFIG_ENV_SIZE allows bad blocks within\n\t  the range to be avoided.\n\n\t- CONFIG_ENV_OFFSET_OOB (optional):\n\n\t  Enables support for dynamically retrieving the offset of the\n\t  environment from block zero's out-of-band data.  The\n\t  \"nand env.oob\" command can be used to record this offset.\n\t  Currently, CONFIG_ENV_OFFSET_REDUND is not supported when\n\t  using CONFIG_ENV_OFFSET_OOB.\n\n- CONFIG_NAND_ENV_DST\n\n\tDefines address in RAM to which the nand_spl code should copy the\n\tenvironment. If redundant environment is used, it will be copied to\n\tCONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.\n\n- CONFIG_SYS_SPI_INIT_OFFSET\n\n\tDefines offset to the initial SPI buffer area in DPRAM. The\n\tarea is used at an early stage (ROM part) if the environment\n\tis configured to reside in the SPI EEPROM: We need a 520 byte\n\tscratch DPRAM area. It is used between the two initialization\n\tcalls (spi_init_f() and spi_init_r()). A value of 0xB00 seems\n\tto be a good choice since it makes it far enough from the\n\tstart of the data area as well as from the stack pointer.\n\nPlease note that the environment is read-only until the monitor\nhas been relocated to RAM and a RAM copy of the environment has been\ncreated; also, when using EEPROM you will have to use getenv_f()\nuntil then to read environment variables.\n\nThe environment is protected by a CRC32 checksum. Before the monitor\nis relocated into RAM, as a result of a bad CRC you will be working\nwith the compiled-in default environment - *silently*!!! [This is\nnecessary, because the first environment variable we need is the\n\"baudrate\" setting for the console - if we have a bad CRC, we don't\nhave any device yet where we could complain.]\n\nNote: once the monitor has been relocated, then it will complain if\nthe default environment is used; a new CRC is computed as soon as you\nuse the \"saveenv\" command to store a valid environment.\n\n- CONFIG_SYS_FAULT_ECHO_LINK_DOWN:\n\t\tEcho the inverted Ethernet link state to the fault LED.\n\n\t\tNote: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR\n\t\t      also needs to be defined.\n\n- CONFIG_SYS_FAULT_MII_ADDR:\n\t\tMII address of the PHY to check for the Ethernet link state.\n\n- CONFIG_NS16550_MIN_FUNCTIONS:\n\t\tDefine this if you desire to only have use of the NS16550_init\n\t\tand NS16550_putc functions for the serial driver located at\n\t\tdrivers/serial/ns16550.c.  This option is useful for saving\n\t\tspace for already greatly restricted images, including but not\n\t\tlimited to NAND_SPL configurations.\n\nLow Level (hardware related) configuration options:\n---------------------------------------------------\n\n- CONFIG_SYS_CACHELINE_SIZE:\n\t\tCache Line Size of the CPU.\n\n- CONFIG_SYS_DEFAULT_IMMR:\n\t\tDefault address of the IMMR after system reset.\n\n\t\tNeeded on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,\n\t\tand RPXsuper) to be able to adjust the position of\n\t\tthe IMMR register after a reset.\n\n- Floppy Disk Support:\n\t\tCONFIG_SYS_FDC_DRIVE_NUMBER\n\n\t\tthe default drive number (default value 0)\n\n\t\tCONFIG_SYS_ISA_IO_STRIDE\n\n\t\tdefines the spacing between FDC chipset registers\n\t\t(default value 1)\n\n\t\tCONFIG_SYS_ISA_IO_OFFSET\n\n\t\tdefines the offset of register from address. It\n\t\tdepends on which part of the data bus is connected to\n\t\tthe FDC chipset. (default value 0)\n\n\t\tIf CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and\n\t\tCONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their\n\t\tdefault value.\n\n\t\tif CONFIG_SYS_FDC_HW_INIT is defined, then the function\n\t\tfdc_hw_init() is called at the beginning of the FDC\n\t\tsetup. fdc_hw_init() must be provided by the board\n\t\tsource code. It is used to make hardware dependant\n\t\tinitializations.\n\n- CONFIG_SYS_IMMR:\tPhysical address of the Internal Memory.\n\t\tDO NOT CHANGE unless you know exactly what you're\n\t\tdoing! (11-4) [MPC8xx/82xx systems only]\n\n- CONFIG_SYS_INIT_RAM_ADDR:\n\n\t\tStart address of memory area that can be used for\n\t\tinitial data and stack; please note that this must be\n\t\twritable memory that is working WITHOUT special\n\t\tinitialization, i. e. you CANNOT use normal RAM which\n\t\twill become available only after programming the\n\t\tmemory controller and running certain initialization\n\t\tsequences.\n\n\t\tU-Boot uses the following memory types:\n\t\t- MPC8xx and MPC8260: IMMR (internal memory of the CPU)\n\t\t- MPC824X: data cache\n\t\t- PPC4xx:  data cache\n\n- CONFIG_SYS_GBL_DATA_OFFSET:\n\n\t\tOffset of the initial data structure in the memory\n\t\tarea defined by CONFIG_SYS_INIT_RAM_ADDR. Usually\n\t\tCONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial\n\t\tdata is located at the end of the available space\n\t\t(sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -\n\t\tCONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just\n\t\tbelow that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +\n\t\tCONFIG_SYS_GBL_DATA_OFFSET) downward.\n\n\tNote:\n\t\tOn the MPC824X (or other systems that use the data\n\t\tcache for initial memory) the address chosen for\n\t\tCONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must\n\t\tpoint to an otherwise UNUSED address space between\n\t\tthe top of RAM and the start of the PCI space.\n\n- CONFIG_SYS_SIUMCR:\tSIU Module Configuration (11-6)\n\n- CONFIG_SYS_SYPCR:\tSystem Protection Control (11-9)\n\n- CONFIG_SYS_TBSCR:\tTime Base Status and Control (11-26)\n\n- CONFIG_SYS_PISCR:\tPeriodic Interrupt Status and Control (11-31)\n\n- CONFIG_SYS_PLPRCR:\tPLL, Low-Power, and Reset Control Register (15-30)\n\n- CONFIG_SYS_SCCR:\tSystem Clock and reset Control Register (15-27)\n\n- CONFIG_SYS_OR_TIMING_SDRAM:\n\t\tSDRAM timing\n\n- CONFIG_SYS_MAMR_PTA:\n\t\tperiodic timer for refresh\n\n- CONFIG_SYS_DER:\tDebug Event Register (37-47)\n\n- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,\n  CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,\n  CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM,\n  CONFIG_SYS_BR1_PRELIM:\n\t\tMemory Controller Definitions: BR0/1 and OR0/1 (FLASH)\n\n- SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE,\n  CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM,\n  CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:\n\t\tMemory Controller Definitions: BR2/3 and OR2/3 (SDRAM)\n\n- CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K,\n  CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL:\n\t\tMachine Mode Register and Memory Periodic Timer\n\t\tPrescaler definitions (SDRAM timing)\n\n- CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]:\n\t\tenable I2C microcode relocation patch (MPC8xx);\n\t\tdefine relocation offset in DPRAM [DSP2]\n\n- CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]:\n\t\tenable SMC microcode relocation patch (MPC8xx);\n\t\tdefine relocation offset in DPRAM [SMC1]\n\n- CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]:\n\t\tenable SPI microcode relocation patch (MPC8xx);\n\t\tdefine relocation offset in DPRAM [SCC4]\n\n- CONFIG_SYS_USE_OSCCLK:\n\t\tUse OSCM clock mode on MBX8xx board. Be careful,\n\t\twrong setting might damage your board. Read\n\t\tdoc/README.MBX before setting this variable!\n\n- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)\n\t\tOffset of the bootmode word in DPRAM used by post\n\t\t(Power On Self Tests). This definition overrides\n\t\t#define'd default value in commproc.h resp.\n\t\tcpm_8260.h.\n\n- CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB,\n  CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL,\n  CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS,\n  CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB,\n  CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,\n  CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL,\n  CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE,\n  CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only)\n\t\tOverrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set.\n\n- CONFIG_PCI_DISABLE_PCIE:\n\t\tDisable PCI-Express on systems where it is supported but not\n\t\trequired.\n\n- CONFIG_SYS_SRIO:\n\t\tChip has SRIO or not\n\n- CONFIG_SRIO1:\n\t\tBoard has SRIO 1 port available\n\n- CONFIG_SRIO2:\n\t\tBoard has SRIO 2 port available\n\n- CONFIG_SYS_SRIOn_MEM_VIRT:\n\t\tVirtual Address of SRIO port 'n' memory region\n\n- CONFIG_SYS_SRIOn_MEM_PHYS:\n\t\tPhysical Address of SRIO port 'n' memory region\n\n- CONFIG_SYS_SRIOn_MEM_SIZE:\n\t\tSize of SRIO port 'n' memory region\n\n- CONFIG_SPD_EEPROM\n\t\tGet DDR timing information from an I2C EEPROM. Common\n\t\twith pluggable memory modules such as SODIMMs\n\n  SPD_EEPROM_ADDRESS\n\t\tI2C address of the SPD EEPROM\n\n- CONFIG_SYS_SPD_BUS_NUM\n\t\tIf SPD EEPROM is on an I2C bus other than the first\n\t\tone, specify here. Note that the value must resolve\n\t\tto something your driver can deal with.\n\n- CONFIG_SYS_83XX_DDR_USES_CS0\n\t\tOnly for 83xx systems. If specified, then DDR should\n\t\tbe configured using CS0 and CS1 instead of CS2 and CS3.\n\n- CONFIG_ETHER_ON_FEC[12]\n\t\tDefine to enable FEC[12] on a 8xx series processor.\n\n- CONFIG_FEC[12]_PHY\n\t\tDefine to the hardcoded PHY address which corresponds\n\t\tto the given FEC; i. e.\n\t\t\t#define CONFIG_FEC1_PHY 4\n\t\tmeans that the PHY with address 4 is connected to FEC1\n\n\t\tWhen set to -1, means to probe for first available.\n\n- CONFIG_FEC[12]_PHY_NORXERR\n\t\tThe PHY does not have a RXERR line (RMII only).\n\t\t(so program the FEC to ignore it).\n\n- CONFIG_RMII\n\t\tEnable RMII mode for all FECs.\n\t\tNote that this is a global option, we can't\n\t\thave one FEC in standard MII mode and another in RMII mode.\n\n- CONFIG_CRC32_VERIFY\n\t\tAdd a verify option to the crc32 command.\n\t\tThe syntax is:\n\n\t\t=\u003e crc32 -v \u003caddress\u003e \u003ccount\u003e \u003ccrc32\u003e\n\n\t\tWhere address/count indicate a memory area\n\t\tand crc32 is the correct crc32 which the\n\t\tarea should have.\n\n- CONFIG_LOOPW\n\t\tAdd the \"loopw\" memory command. This only takes effect if\n\t\tthe memory commands are activated globally (CONFIG_CMD_MEM).\n\n- CONFIG_MX_CYCLIC\n\t\tAdd the \"mdc\" and \"mwc\" memory commands. These are cyclic\n\t\t\"md/mw\" commands.\n\t\tExamples:\n\n\t\t=\u003e mdc.b 10 4 500\n\t\tThis command will print 4 bytes (10,11,12,13) each 500 ms.\n\n\t\t=\u003e mwc.l 100 12345678 10\n\t\tThis command will write 12345678 to address 100 all 10 ms.\n\n\t\tThis only takes effect if the memory commands are activated\n\t\tglobally (CONFIG_CMD_MEM).\n\n- CONFIG_SKIP_LOWLEVEL_INIT\n\t\t[ARM only] If this variable is defined, then certain\n\t\tlow level initializations (like setting up the memory\n\t\tcontroller) are omitted and/or U-Boot does not\n\t\trelocate itself into RAM.\n\n\t\tNormally this variable MUST NOT be defined. The only\n\t\texception is when U-Boot is loaded (to RAM) by some\n\t\tother boot loader or by a debugger which performs\n\t\tthese initializations itself.\n\n- CONFIG_PRELOADER\n\t\tModifies the behaviour of start.S when compiling a loader\n\t\tthat is executed before the actual U-Boot. E.g. when\n\t\tcompiling a NAND SPL.\n\nBuilding the Software:\n======================\n\nBuilding U-Boot has been tested in several native build environments\nand in many different cross environments. Of course we cannot support\nall possibly existing versions of cross development tools in all\n(potentially obsolete) versions. In case of tool chain problems we\nrecommend to use the ELDK (see http://www.denx.de/wiki/DULG/ELDK)\nwhich is extensively used to build and test U-Boot.\n\nIf you are not using a native environment, it is assumed that you\nhave GNU cross compiling tools available in your path. In this case,\nyou must set the environment variable CROSS_COMPILE in your shell.\nNote that no changes to the Makefile or any other source files are\nnecessary. For example using the ELDK on a 4xx CPU, please enter:\n\n\t$ CROSS_COMPILE=ppc_4xx-\n\t$ export CROSS_COMPILE\n\nNote: If you wish to generate Windows versions of the utilities in\n      the tools directory you ","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fendlessm%2Fu-boot-meson","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fendlessm%2Fu-boot-meson","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fendlessm%2Fu-boot-meson/lists"}