{"id":19756608,"url":"https://github.com/esnet/esnet-fpga-library","last_synced_at":"2026-01-29T09:06:42.457Z","repository":{"id":138230001,"uuid":"466218285","full_name":"esnet/esnet-fpga-library","owner":"esnet","description":"ESnet general-purpose FPGA design library.","archived":false,"fork":false,"pushed_at":"2026-01-19T17:06:19.000Z","size":2761,"stargazers_count":14,"open_issues_count":0,"forks_count":4,"subscribers_count":15,"default_branch":"main","last_synced_at":"2026-01-19T23:17:03.605Z","etag":null,"topics":["high-touch"],"latest_commit_sha":null,"homepage":"","language":"SystemVerilog","has_issues":false,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/esnet.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE.md","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null}},"created_at":"2022-03-04T17:46:13.000Z","updated_at":"2026-01-19T17:06:29.000Z","dependencies_parsed_at":"2023-12-05T17:43:05.239Z","dependency_job_id":"08dcb58a-6818-4261-80c9-3ab52eb03794","html_url":"https://github.com/esnet/esnet-fpga-library","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/esnet/esnet-fpga-library","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/esnet%2Fesnet-fpga-library","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/esnet%2Fesnet-fpga-library/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/esnet%2Fesnet-fpga-library/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/esnet%2Fesnet-fpga-library/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/esnet","download_url":"https://codeload.github.com/esnet/esnet-fpga-library/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/esnet%2Fesnet-fpga-library/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28873473,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-01-29T07:35:32.468Z","status":"ssl_error","status_checked_at":"2026-01-29T07:33:31.463Z","response_time":59,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.5:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["high-touch"],"created_at":"2024-11-12T03:16:23.848Z","updated_at":"2026-01-29T09:06:42.427Z","avatar_url":"https://github.com/esnet.png","language":"SystemVerilog","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Copyright Notice\n\nESnet SmartNIC Copyright (c) 2022, The Regents of the University of\nCalifornia, through Lawrence Berkeley National Laboratory (subject to\nreceipt of any required approvals from the U.S. Dept. of Energy),\n12574861 Canada Inc., Malleable Networks Inc., and Apical Networks, Inc.\nAll rights reserved.\n\nIf you have questions about your rights to use or distribute this software,\nplease contact Berkeley Lab's Intellectual Property Office at\nIPO@lbl.gov.\n\nNOTICE.  This Software was developed under funding from the U.S. Department\nof Energy and the U.S. Government consequently retains certain rights.  As\nsuch, the U.S. Government has been granted for itself and others acting on\nits behalf a paid-up, nonexclusive, irrevocable, worldwide license in the\nSoftware to reproduce, distribute copies to the public, prepare derivative\nworks, and perform publicly and display publicly, and to permit others to do so.\n\n\n\n# ESnet FPGA library\n\nThis library contains general-purpose FPGA RTL design files and associated verification\nsuites, as well as standard Makefiles, scripts and tools for a structured FPGA design\nmethodology.\n\nThe ESnet FPGA library is made available in the hope that it will\nbe useful to the FPGA design community. Users should note that it is\nmade available on an \"as-is\" basis, and should not expect any\ntechnical support or other assistance with building or using this\nsoftware. For more information, please refer to the LICENSE.md file in\nthe source code repository.\n\nThe developers of the ESnet FPGA library can be reached by email at smartnic@es.net.\n\n\n# Directory Structure\n\n```\nesnet-fpga-library/\n    ├── cfg/\n    ├── config.mk\n    ├── LICENSE.md\n    ├── Makefile\n    ├── paths.mk\n    ├── README.md\n    ├── scripts/\n    ├── src/\n    └── tools/\n\ncfg/\n  Contains configuration files for the FPGA library.\n\nconfig.mk\n  Sets environment variables.\n\nLICENSE.md\n  Contains the licensing terms and copyright notice for this repository.\n\nMakefile\n  Specifies default library setup.\n\npaths.mk\n  Describes paths to resources provided by the library.\n\nREADME.md\n  This README file.\n\nscripts/\n  Contains common Makefiles and Tcl scripts for maintaining a standard design directory\n  structure and standard work flows for register map construction, RTL simulation and\n  synthesis.\n\nsrc/\n  Contains RTL source and verification code for a number of standard FPGA design components,\n  captured in System Verilog.\n\ntools/\n  Contains useful productivity tools for a structured FPGA design methodology. \n\n```\n**NOTE: See lower level README files for more details.**\n\n\n\n# Known Issues\n\n- None to date.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fesnet%2Fesnet-fpga-library","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fesnet%2Fesnet-fpga-library","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fesnet%2Fesnet-fpga-library/lists"}