{"id":50948738,"url":"https://github.com/fpgadeveloper/sfp28-fmc-mrmac","last_synced_at":"2026-06-17T23:03:48.346Z","repository":{"id":364348704,"uuid":"1265490760","full_name":"fpgadeveloper/sfp28-fmc-mrmac","owner":"fpgadeveloper","description":"Multi-rate MAC (MRMAC) based ref designs for the Opsero Quad SFP28 FMC (OP081)","archived":false,"fork":false,"pushed_at":"2026-06-12T16:37:55.000Z","size":1585,"stargazers_count":1,"open_issues_count":0,"forks_count":0,"subscribers_count":0,"default_branch":"main","last_synced_at":"2026-06-12T18:23:41.616Z","etag":null,"topics":["ethernet","fpga","sfp28","versal"],"latest_commit_sha":null,"homepage":"https://docs.opsero.com/op081/datasheet/overview/","language":"Tcl","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/fpgadeveloper.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null,"zenodo":null,"notice":null,"maintainers":null,"copyright":null,"agents":null,"dco":null,"cla":null}},"created_at":"2026-06-10T20:28:45.000Z","updated_at":"2026-06-12T16:53:09.000Z","dependencies_parsed_at":null,"dependency_job_id":null,"html_url":"https://github.com/fpgadeveloper/sfp28-fmc-mrmac","commit_stats":null,"previous_names":["fpgadeveloper/sfp28-fmc-mrmac"],"tags_count":null,"template":false,"template_full_name":null,"purl":"pkg:github/fpgadeveloper/sfp28-fmc-mrmac","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/fpgadeveloper%2Fsfp28-fmc-mrmac","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/fpgadeveloper%2Fsfp28-fmc-mrmac/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/fpgadeveloper%2Fsfp28-fmc-mrmac/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/fpgadeveloper%2Fsfp28-fmc-mrmac/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/fpgadeveloper","download_url":"https://codeload.github.com/fpgadeveloper/sfp28-fmc-mrmac/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/fpgadeveloper%2Fsfp28-fmc-mrmac/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":34468767,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-05-26T15:22:16.424Z","status":"online","status_checked_at":"2026-06-17T02:00:05.408Z","response_time":127,"last_error":null,"robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":true,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["ethernet","fpga","sfp28","versal"],"created_at":"2026-06-17T23:03:47.777Z","updated_at":"2026-06-17T23:03:48.339Z","avatar_url":"https://github.com/fpgadeveloper.png","language":"Tcl","funding_links":[],"categories":[],"sub_categories":[],"readme":"# 10G/25G Ethernet (MRMAC) Reference Designs for the Quad SFP28 FMC\n\n## Description\n\nThis project demonstrates the use of the Opsero [Quad SFP28 FMC] (OP081) with 10G/25G Ethernet\nSFP+/SFP28 modules on AMD Versal adaptive SoC development boards. All four SFP28 ports are\nclients of a single Versal [Integrated 100G Multirate Ethernet MAC (MRMAC)] hard block,\nconfigured for four independent 10GbE or 25GbE channels (one GTY lane per port), with packet\ndata moved to/from DDR by per-port AXI MCDMAs and driven under PetaLinux by the AXI Ethernet\ndriver. A bare-metal echo-server test application is also included.\n\n![Quad SFP28 FMC with the VCK190](docs/source/images/vck190-with-op081_03.jpg)\n\nImportant links:\n\n* The user guide for these reference designs is hosted here: [10G/25G Ethernet (MRMAC) for Quad SFP28 FMC docs](https://sfp28-mrmac.ethernetfmc.com \"10G/25G Ethernet (MRMAC) for Quad SFP28 FMC docs\")\n* To report a bug: [Report an issue](https://github.com/fpgadeveloper/sfp28-fmc-mrmac/issues \"Report an issue\").\n* For technical support: [Contact Opsero](https://opsero.com/contact-us \"Contact Opsero\").\n* To purchase the mezzanine card: [Quad SFP28 FMC order page](https://opsero.com/product/quad-sfp28-fmc \"Quad SFP28 FMC order page\").\n\n## Requirements\n\nThis project is designed for version 2025.2 of the Xilinx tools (Vivado/Vitis/PetaLinux).\nIf you are using an older version of the Xilinx tools, then refer to the\n[release tags](https://github.com/fpgadeveloper/sfp28-fmc-mrmac/tags \"releases\")\nto find the version of this repository that matches your version of the tools.\n\nIn order to test this design on hardware, you will need the following:\n\n* Vivado 2025.2\n* Vitis 2025.2\n* PetaLinux Tools 2025.2\n* [Quad SFP28 FMC]\n* One of the target platforms listed below\n* [AMD Versal Integrated MRMAC License](https://www.amd.com/en/products/adaptive-socs-and-fpgas/intellectual-property/mrmac.html) (free)\n\n## Target designs\n\nThis repo contains designs that target the supported development boards and their\nFMC connectors. The table below lists the target design name, the link speed, the SFP28 ports\nsupported by the design and the FMC connector on which to connect the Quad SFP28 FMC.\n\n\u003c!-- updater start --\u003e\n### 10G designs\n\n| Target board          | Target design      | Link speeds \u003cbr\u003e supported | SFP28 ports | FMC Slot    | Vivado\u003cbr\u003e Edition |\n|-----------------------|--------------------|------------|-------------|-------------|-------|\n| [VCK190]              | `vck190_fmcp1`     | 10G        | 4x          | FMCP1       | Enterprise |\n\n### 25G designs\n\n| Target board          | Target design      | Link speeds \u003cbr\u003e supported | SFP28 ports | FMC Slot    | Vivado\u003cbr\u003e Edition |\n|-----------------------|--------------------|------------|-------------|-------------|-------|\n| [VCK190]              | `vck190_fmcp1_25g` | 25G        | 4x          | FMCP1       | Enterprise |\n\n[VCK190]: https://www.xilinx.com/vck190\n\u003c!-- updater end --\u003e\n\nNotes:\n1. The Vivado Edition column indicates which designs are supported by the Vivado *Standard* Edition, the\n   FREE edition which can be used without a license. Vivado *Enterprise* Edition requires\n   a license however a 30-day evaluation license is available from the AMD Xilinx Licensing site.\n2. The Versal Integrated MRMAC requires a (free) license to generate a bitstream.\n3. All of the 25G designs have the `_25g` postfix in the target label.\n\n## Software\n\nThese reference designs can be driven within a PetaLinux environment, or by the included\nbare-metal echo-server test application. The repository includes all necessary scripts and code\nto build both environments. The table below outlines the corresponding applications available\nin each environment:\n\n| Environment      | Available Applications  |\n|------------------|-------------------------|\n| Standalone       | Raw-Ethernet echo server (ARP, ICMP ping, UDP echo on all 4 ports) |\n| PetaLinux        | Built-in Linux commands\u003cbr\u003eAdditional tools: ethtool, iperf3, phytool\u003cbr\u003eBundled self-test: `mrmac-loopback-test` |\n\n## Build instructions\n\nClone the repo:\n```\ngit clone https://github.com/fpgadeveloper/sfp28-fmc-mrmac.git\n```\n\nSource Vivado and PetaLinux tools:\n\n```\nsource \u003cpath-to-petalinux\u003e/2025.2/settings.sh\nsource \u003cpath-to-xilinx-tools\u003e/2025.2/Vivado/settings64.sh\n```\n\nBuild all (Vivado project, PetaLinux and the bare-metal echo server), and gather the boot\nimages into `bootimages/`:\n\n```\ncd sfp28-fmc-mrmac\nmake bootimage TARGET=vck190_fmcp1\n```\n\nTo build a single stage, use the Makefile in the corresponding subdirectory, for example:\n\n```\ncd sfp28-fmc-mrmac/PetaLinux\nmake petalinux TARGET=vck190_fmcp1\n```\n\n## Troubleshooting\n\n### PetaLinux build fails with `bitbake petalinux-image-minimal failed` and sstate fetch errors\n\nIf a `make petalinux TARGET=\u003ctarget\u003e` run ends with errors like\n\n```\nERROR: \u003cpackage\u003e-\u003cver\u003e-r0 do_..._setscene: Fetcher failure: Unable to find file file://.../sstate:...\n[ERROR] Command bitbake petalinux-image-minimal failed\n```\n\nthe actual build is not broken. These `_setscene` errors come from\nbitbake trying to pull prebuilt artifacts from the public Xilinx\nsstate-cache mirror, which occasionally returns 404 for individual\npackages. Bitbake falls back to building those packages locally and\nsucceeds, but still exits non-zero because of the failed fetches —\nso the Makefile stops before the `petalinux-package` step that\nproduces `BOOT.BIN`.\n\n**Fix: just re-run the same command.** The second attempt finds the\nmissing packages in the local sstate cache (populated by the first\nrun) and completes cleanly, producing `BOOT.BIN`. The reference\ndesign itself is fine; this is a transient issue with the public\nmirror.\n\n## Contribute\n\nWe strongly encourage community contribution to these projects. Please make a pull request if you\nwould like to share your work:\n* if you've spotted and fixed any issues\n* if you've added designs for other target platforms\n\nThank you to everyone who supports us!\n\n## About us\n\nThis project was developed by [Opsero Inc.](https://opsero.com \"Opsero Inc.\"),\na tight-knit team of FPGA experts delivering FPGA products and design services to start-ups and tech companies.\nFollow our blog, [FPGA Developer](https://www.fpgadeveloper.com \"FPGA Developer\"), for news, tutorials and\nupdates on the awesome projects we work on.\n\n[Quad SFP28 FMC]: https://docs.opsero.com/op081/datasheet/overview/\n[Integrated 100G Multirate Ethernet MAC (MRMAC)]: https://www.amd.com/en/products/adaptive-socs-and-fpgas/intellectual-property/mrmac.html\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Ffpgadeveloper%2Fsfp28-fmc-mrmac","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Ffpgadeveloper%2Fsfp28-fmc-mrmac","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Ffpgadeveloper%2Fsfp28-fmc-mrmac/lists"}