{"id":18607006,"url":"https://github.com/gwbres/adi-ad9546","last_synced_at":"2025-07-01T03:33:44.455Z","repository":{"id":50594382,"uuid":"483249882","full_name":"gwbres/adi-ad9546","owner":"gwbres","description":"Analog Devices AD9546 chipset management tool","archived":false,"fork":false,"pushed_at":"2022-11-18T09:39:27.000Z","size":310,"stargazers_count":7,"open_issues_count":0,"forks_count":2,"subscribers_count":2,"default_branch":"main","last_synced_at":"2025-04-11T06:33:29.370Z","etag":null,"topics":["analog-devices","linux"],"latest_commit_sha":null,"homepage":"","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"gpl-3.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/gwbres.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2022-04-19T13:05:56.000Z","updated_at":"2025-03-22T23:25:31.000Z","dependencies_parsed_at":"2023-01-23T13:15:29.343Z","dependency_job_id":null,"html_url":"https://github.com/gwbres/adi-ad9546","commit_stats":null,"previous_names":[],"tags_count":2,"template":false,"template_full_name":null,"purl":"pkg:github/gwbres/adi-ad9546","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/gwbres%2Fadi-ad9546","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/gwbres%2Fadi-ad9546/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/gwbres%2Fadi-ad9546/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/gwbres%2Fadi-ad9546/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/gwbres","download_url":"https://codeload.github.com/gwbres/adi-ad9546/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/gwbres%2Fadi-ad9546/sbom","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":262888985,"owners_count":23380135,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["analog-devices","linux"],"created_at":"2024-11-07T02:27:58.832Z","updated_at":"2025-07-01T03:33:44.408Z","avatar_url":"https://github.com/gwbres.png","language":"Python","funding_links":[],"categories":[],"sub_categories":[],"readme":"# ADI-AD9546 \n\n[![Python application](https://github.com/gwbres/adi-ad9546/actions/workflows/python-app.yml/badge.svg)](https://github.com/gwbres/adi-ad9546/actions/workflows/python-app.yml)\n[![PyPI version](https://badge.fury.io/py/ad9546.svg)](http://badge.fury.io/py/ad9546)\n![PyPI - Python Version](https://img.shields.io/pypi/pyversions/ad9546)\n\nSet of tools to interact \u0026 program AD9546/45 integrated circuits, by Analog Devices.\n\nUse [these tools](https://github.com/gwbres/adi-ad9548)\nto interact with AD9548/47 older chipsets.\n\nThese scripts are not Windows compatible.   \nThese scripts expect a `/dev/i2c-X` entry, they do not manage the device\nthrough SPI at the moment.\n\n## Install \n\n```shell\npython setup.py install\n```\n\n## Dependencies\n\n* python-smbus\n\nInstall requirements with\n\n```shell\npip3 install -r requirements.txt\n```\n\n## API\n\n* Each application comes with an `-h` help menu.  \nRefer to help menu for specific information. \n* `i2c` bus must always be specified\n* `i2c` slave address must always be specified \n* `--flag` is optionnal: action will not be performed if not requested\n\nFor complex flag values (basically involving white spaces), for example \n`ref-input --coupling`, don't forget to encapsulate with inverted commas:\n\n```shell\nref-input.py \\\n    0 0x48 \\ # bus #0 slave address is 0x48\n    --ref a \\ # simple, one word\n    --coupling \"AC 1.2V\" # 'complex' but meaningful value\nref-input.py \\\n    1 0x4A  \\ # bus #1 slave address is 0x4A\n    --ref aa \\ # simple, one word\n    --coupling \"internal pull-up\" # 'complex' but meaningful value\n```\n\nFlag values are case sensitive and must be exactly matched.\nIt is not possible to pass a non supported / unknown flag value,\nscripts will reject those with a runtime error.\n\n## AD9545 / 46\n\nThese scripts are developped and tested with an AD9546 chip.   \nAD9545 is pin \u0026 register compatible, so it should work.   \nIt is up to the user to restrain to restricted operations in that scenario.\n\n## Utilities\n\n* `calib.py`: calibrates core portions of the clock. Typically required\nwhen booting or a new setup has just been loaded.\n* `distrib.py`: controls clock distribution and output signals.\nIncludes signal paths and output pins muting operations.\n* `irq.py`: IRQ clearing \u0026 masking operations \n* `misc.py`: miscellaneous operations\n* `mx-pin.py`: Mx programmable I/O management \n* `pll.py`: APLLx and DPLLx cores management. Includes\nfree running + holdover manual forcing operation\n* `power-down.py` : power saving and management utility\n* `ref-input.py`: reference \u0026 input signals management\n* `regmap.py`: load or dump a register map preset\n* `regmap-diff.py`: loaded / dumped regmap differentiator (debug tool)\n* `reset.py`: device reset operations\n* `status.py` : status monitoring, includes IRQ flag reports and onboard temperature reading\n* `sysclk.py` : sys clock control \u0026 management tool\n\nSee at the bottom of this page for typical configuration flows.\n\n## Register map\n\n`regmap.py` allows the user to quickly load an exported\nregister map from the official A\u0026D graphical tool.\n* Input/output is `json`\n* `--quiet` to disable the stdout progress bar\n\nLoad a register map created with A\u0026D official tools\n```shell\nregmap.py 0 0x48 \\\n    --load config.json\n```\n\nExtract current settings in A\u0026D compliant format:\n```shell\nregmap.py --dump /tmp/output.json \\\n    0 0x48\n```\n\n### Register map `diff`\n\nIt is possible to use the `regmap-diff.py` tool\nto differentiate (bitwise) an official A\u0026D registermap (created with their GUI)\nand a dumped one (`--dumped` with regmap.py).\n\n```shell\n# order is always: \n#  1) official (from A\u0026D GUi) \n#  2) then dumped file\nregmap-diff.py official_ad.json /tmp/output.json\n```\n\nThis script is mainly used for debugging purposes.\n\nIt is equivalent to a `diff -q -Z official_ad.json /tmp/output.json`\nfocused on the \"RegisterMap\" field.\nThat command being impossible to use, because --dump\ndoes not replicate 100% of the official A\u0026D file content (too complex),\nand is not focused on the \"RegisterMap\" field.\n\n## Status script\n\n`status.py` is a read only tool to monitor the chipset status current status.\nThat includes IRQ status reports, calibration reports, integrated\nsensors and measurement readings..\n\n* `status.py -h` to figure all known keys\n\nOutput format is `json` and is streamed to `stdout`.\nEach `--flag` can be cumulated which increases the status report size/verbosity:\n\n```shell\n# Grab general / high level info (bus=0, 0x4A):\nstatus.py 0 0x4A \\\n    --info --serial # general info \\\n    --pll # pll core (timing general info)\n\nstatus.py 1 0x48 \\\n    --info \\\n    --pll --sysclk # timing cores info \\\n    --ref-input # input / ref. signals info\n\nstatus.py 0 0x4A \\\n    --irq # IRQ status register \n```\n\nDump status report from stdout into a file\n\n```shell\nstatus.py --info --serial --pll 0 0x4A \u003e /tmp/status.json\n```\n\nOutput is a `json` structure. That means it can be directly\ninterprated into another python script. Here's an example\non how to do that:\n\n```shell\nimport subprocess\nargs = ['status.py', '--distrib', '0', '0x4A']\n# interprate filtered stdout content directly\nret = subprocess.run(args)\nif ret.exitcode == 0: # syscall OK\n    # direct interpratation\n    struct = eval(ret.stdout.decode('utf-8'))\n    print(struct[\"distrib\"][\"ch0\"][\"a\"][\"q-div\"])\n```\n\nStatus report depicts a lot of information depending\non the targeted internal cores. Status.py supports\nfiltering operations, we we'll later describe how\nan efficient filter can make things easier when\ngrabbing data from another script\n\n### Status report filtering\n\nFilters are described by comma separated values.\nIt is possible to cummulate filter of the same kind\nand of different kind. Filters are applied in\norder of appearance / description.\nIdentifier filter is applied priori Value filter.\n\n* `--filter-by-key`: filters result by identification keyword.\nThis is useful to retain fields of interests\n\n```shell\n# grab vendor field\nstatus.py 0 0x48 \\\n    --info --filter-by-key vendor # single field filter\n\n# zoom in on temperature info\nstatus.py 0 0x48 \\\n    --misc --filter-by-key temperature # single field filter\n\n# only care about CH0\nstatus.py 0 0x48 \\\n    --distrib --filter-by-key ch0 # single field filter\n\n# only care about AA path(s) \n# [CH0:AA ; CH1:AA] in this case\nstatus.py 0 0x48 \\\n    --distrib --filter-by-key aa # single field filter\n```\n\nExample of cummulated filters:\n\n```shell\n# grab (vendor + chiptype) fields\nstatus.py 0 0x48 \\\n    --info --filter-by-key chip-type,vendor # comma separated\n\n# zoom in on temperature reading\nstatus.py 0 0x48 \\\n    --misc --filter-by-key temperature,value # zoom in \n\n# Retain `aa` path from CH0\n# Filter by order of appearance, \n# specifying CH0 then AA ;)\nstatus.py 0 0x48 \\\n    --distrib --filter-by-key ch0,aa\n```\n\nBy default, if requested keyword is not found (non effective filter),\nfulldata set is preserved.\n\n```shell\n# non effective filter example:\nstatus.py --info --filter-by-key something 0 0x48\n```\n\n* `filter-by-value`: it is possible to filter status reports\nby matching values\n\n```shell\n# Return `0x456` \u003c=\u003e vendor field\nstatus.py 1 0x48 \\\n    --info \\\n    --filter-by-value 0x456\n\n# Return only deasserted values\nstatus.py 1 0x48 \\\n    --distrib \\\n    --filter-by-value disabled \n\n# Event better `deasserted` value filter\nstatus.py 1 0x48 \\\n    --distrib \\\n    --filter-by-value disabled,false,inactive\n```\n\nIt is possible to combine `key` and `value` filters:\n\n```shell\n# from CH0 return only deasserted values\nstatus.py 1 0x48 \\\n    --distrib \\\n    --filter-by-value ch0 \\\n    --filter-by-value disabled,false,inactive\n```\n\n### Extract raw data from status report\n\nThe `--unpack` option allows convenient \ndata reduction\n\n* if the requested filter has reduced the dataset\nto a single value, we expose the raw data:\n\n```shell\nstatus.py 0 0x4A \\\n    --info --filter-by-key vendor # extract vendor info \\\n    --unpack # raw value\n\nstatus.py 0 0x4A \\\n    --misc --filter-by-key temperature,value # extract t° reading \\\n    --unpack # raw value\n\n# extract temperature alarm bit\nstatus.py 0 0x4A \\`\n    --misc --filter-by-key temperature,alarm # extract t° alarm bit \\\n    --unpack # raw value\n```\n\nThis is very convenient when importing data into an external script.\nHere's an example in python once again:\n\n```shell\nimport subprocess\nargs = [\n    'status.py', \n    '0', '0x4A',\n    '--misc', \n    '--filter-by-key', 'temperature,alarm' # extract raw bit\n]\nret = subprocess.run(args)\nif ret.exitcode == 0: # syscall OK\n    # bool() direct cast \n    has_alarm = bool(ret.stdout.decode('utf-8'))\n```\n\n* If the status report comprises several value,\nthen `--unpack` simply reduces the structure to 1D.\nThat means we lose data because we can only have\na unique value per identifier\n\n```shell\nstatus.py 0 0x4A \\\n    --misc --filter-by-key temperature # extract temperature fields \\\n    --unpack\n```\n\n## Sys clock\n\n`Sys` clock compensation is a new feature introduced in AD9546.\n`sysclock.py` allows quick and easy access to these features.\n\nTo determine current `sysclock` related settings, use status.py with `--sysclock` option.\n\n* `--freq`: to program input frequency [Hz]\n* `--sel` : to select the input path (internal crystal or external XOA/B pins)\n* `--div`: set integer division ratio on input frequency\n* `--doubler`: enables input frequency doubler\n\n## Calibration script\n\n`calib.py` allows chipset (re)calibration.   \n\nIt is required to perform a calibration at boot time.  \nIt is required to perform an analog Pll (re)calibration anytime\nwe recover from a sys clock power down.\n\n* Perform complete (re)calibration\n\n```shell\ncalib.py --all 0 0x4A\n```\n\n* Perform only a sys clock (re)calibration\n(1st step in application note)\n\n```shell\ncalib.py --sysclk 0 0x4A\n```\n\nMonitor internal calibration process with\n\n```shell\nstatus.py 1 0x4A \\\n    -pll --sysclk --filter-by-key calibrating\nstatus.py 1 0x4A \\\n    --sysclk --irq --filter-by-key calibration \n```\n\n## Clock distribution\n\n`distrib.py` is an important utility.   \nIt helps configure the clock path, control output signals\nand their behavior.  \n\nTo determine the chipset current configuration related to clock distribution,\none should use the status script with `--distrib` option.\n\nControl flags:\n\n* `--channel` (optionnal) describes which targetted channel.\nDefaults to `all`, meaning if `--channel` is not specified, both channels (CH0/CH1)\nare assigned the same value.\nThis script only suppports a single `--channel` assignment.\n\n* `--path` (optionnal) describes desired signal path. \nDefaults to `all` meaning, all paths are assigned the same value (if feasible).  \nThis script only suppports a single `--path` assignment at a time.  \nRefer to help menu for list of accepted values.\n\n* `--pin` (optionnal) describes desired pin, when controlling an output pin.\nDefaults to `all` meaning, all pins (+ and -) are assigned the same value when feasible.  \nRefer to help menu for list of accepted values.\n\nAction flags: the script supports as many `action` flags as desired, see the list down below.\n\n* `--mode` set OUTxy output pin as single ended or differential\n* `--format` sets OUTxy current sink/source format\n* `--current` sets OUTxy pin output current [mA], where x = channel\n\n```shell\n# set channel 0 as HCSL default format\ndistrib.py --format hcsl --channel 0\n\n# set channel 1 as CML format\ndistrib.py --format hcsl --channel 1\n\n# set channel 0+1 as HCSL default format\ndistrib.py --format hcsl\n\n# set Q0A, Q0B as differntial output\ndistrib.py --mode diff --channel 0\n\n# set Q1A, as single ended pin\ndistrib.py --mode se --channel 1 --pin a\n\n# set Q0A Q0B to output 12.5 mA, default output current\ndistrib.py --current 12.5 --channel 0\n\n# set Q1A to output 7.5 mA, minimal current\ndistrib.py --current 7.5 --channel 1 --pin a\n```\n\n* `--sync-all`: sends a SYNC order to all distribution dividers.\nIt is required to run a `sync-all` in case the current output behavior\nis not set to `immediate`.\n\n```shell\n# send a SYNC all\n# SYNC all is required depending on previous actions and current configuration\ndistrib.py --sync-all 0 0x48\n```\n\n* `--autosync` : control given channel so called \"autosync\" behavior.\n\n```shell\n# set both Pll CH0 \u0026 CH1 to \"immediate\" behavior\ndistrib.py --autosync immediate 0 0x48\n\n# set both Pll CH0 to \"immediate\" behavior\ndistrib.py --autosync immediate --channel 0 0 0x48\n\n#  and Pll CH1 to \"manual\" behavior\ndistrib.py --autosync manual --channel 1 0 0x48\n```\n\nIn the previous example, CH1 is set to manual behavior.  \nOne must either perform a `sync-all` operation,\na `q-sync` operation on channel 1,\nor an Mx-pin operation with dedicated script, to enable this output signal.\n\n* `--q-sync` : initializes a Qxy Divider synchronization sequence manually. \nWhen x is the `channel` and `y` is desired path.\n```shell\n# triggers Q0A Q0B Q1A Q1B SYNC \ndistrib.py --q-sync 0 0x48\n\n# triggers Q0A Q0B SYNC \ndistrib.py --q-sync --channel 0 0 0x48\n\n# triggers Q0B Q1B SYNC because --channel `all` is implied \ndistrib.py --q-sync --path b 0 0x48\n```\n\n* `--unmute` : controls QXY unmuting opmode,\nwhere x is the `channel` and `y` desired path.\n\n```shell\n# Q0A Q0B + Q1A Q1B `immediate` unmuting \ndistrib.py --unmute immediate 0 0x48\n\n# Q0A Q1A `phase locked` unmuting \ndistrib.py --unmute phase --path a 0 0x48\n\n# Q0B Q1B `freq locked` unmuting \ndistrib.py --unmute freq --path b 0 0x48\n\n# Q0A + Q1B `immediate` unmuting \ndistrib.py --unmute immediate --path a 0 0x48\ndistrib.py --unmute immediate --path b 0 0x48\n```\n\n* `--pwm-enable` and `--pwm-disable`: constrols PWM modulator\nfor OUTxy where x is the `channel` and `y` the desired path.\n\n* `--divider` : control integer division ratio at Qxy stage\n\n```shell\n# Sets R=48 division ratio, \n# for Q0A,AA,B,BB,C,CC and Q1A,AA,B,BB \n# because --channel=`all` and --path=`all` is implied\ndistrib.py --divider 48 0 0x48\n\n# Sets Q1A,AA,B,BB R=64 division ratio\n# because --path=`all` is implied\ndistrib.py --divider 64 --channel 1 0 0x48\n\n# Q0A \u0026 Q0B R=23 division ratio\n# requires dual assignment, because --pin {a,b} is not feasible at once\ndistrib.py --divider 23 --channel 0 --pin a 0 0x48\ndistrib.py --divider 23 --channel 0 --pin b 0 0x48\n```\n\n* `--half-divider` : enables \"half divider\" feature @ QXY path\n\n* `--phase-offset` applies instantaneous phase offset to desired\noutput path. Maximal value is 2\\*D-1 where D is previous `--divider` ratio\nfor given channel + pin.\n\n```shell\n# Apply Q0A,AA,B,BB,C,CC + Q1A,AA,B,BB \n# TODO\n```\n\n* `--unmuting` : controls \"unmuting\" behavior, meaning,\noutput signal can be exposed automatically depending on clock state.\n\n* `--mute` and `--unmute` to manually enable/disable an output pin\n\n\n## Reset script\n\nTo quickly reset the device\n\n* `--soft` : performs a soft reset\n* `--sans` : same thing but maintains current registers value \n* `--watchdog` : resets internal watchdog timer\n* `-h` for more infos\n\n```shell\n# Resets (factory default)\nreset.py --soft 1 0x48\nregmap.py --load settings.json 1 0x48 \nreset.py --sans 1 0x48 # settings are maintained\n```\n\n## Ref input script\n\n`ref-input.py` to control the reference input signal,\nsignal quality constraints, switching mechanisms \nand the general clock state.\n\n* `--freq` set REFxy input frequency [Hz]\n* `--coupling` control REFx input coupling\n`lock` must be previously acquired.\n* `freq-lock-thresh` : frequency locking mechanism constraint.\n* `phase-lock-thresh` : phase locking mechanism constraint.\n* `phase-step-thresh` : inst. phase step threshold\n* `phase-skew`: phase skew\n\n## PLL script\n\n`pll.py` to control both analog and digital internal PLL cores.  \n`pll.py` also allows to set the clock to free run or holdover state.\n\n* `--type`: to specify whether we are targetting an Analog PLL (APLLx) \nor a Digital PLL (APLLx). This field is only required\nfor operations where it is ambiguous (can be performed on both cores).  \n`all` is the default value.   \n`--type all` targets both APLLx and DPLLx core(s).\n\n* `--channel` : set `x` in DPLLx or APLLx targeted cores.   \n`--channel all`: is the default behavior, targets both channel 0 and 1 \nof the desired type.\n\n* `--free-run`: forces clock to free run state, `--type` is disregarded \nbecause `digital` is implied. \n* `--holdover 1`: forces clock to holdover state, `--type` is disregarded \nbecause `digital` is implied. \n* `--holdover 0`: recovers from forced holdover \n\n## Power down script\n\n`power-down.py` perform and recover power down operations.   \nUseful to power down non needed channels and internal cores. \n\nThe `--all` flag addresses all internal cores.  \nOtherwise, select internal units with related flag\n\n* Power down device entirely\n```shell\npower-down.py 0 0x4A --all\n```\n* Recover a complete power down operation\n```shell\npower-down.py 0 0x4A --all --clear\n```\n\n* Wake `A` reference up and put `AA,B,BB` references to sleep:\n```shell\npower-down.py 0 0x4A --refb --refbb --refaa \npower-down.py 0 0x4A --clear --refa \n```\n\n## CCDPLL : Digitized Clocking Common Clock Synchronizer\n\nCCDPLL status report:\n\n```shell\nstatus.py --ccdpll 1 0x48\n```\n\nCCDPLL must be configured and monitored for UTS \u0026 IUTS related operations\n\n## User Time Stamping cores\n\nUTS cores allow the user to timestamp input data against\na reference signal. UTS requires the CCDPPL that is\npart of the Digitized clocking core to be configured.\n\n`uts.py` controls both the UTS core and the inverse UTS core.\nThis is controlled by the `--type inverse` option.  \nThe default `--type` is \"normal\" for UTS management by default.  \nTherefore it is mandatory to specify `inverse` for IUTS management.\n\nUTS and IUTS status reports are reported by the status.py script:\n\n```shell\nstatus.py 1 0x4A \\\n    --uts \\\n    --iuts\n\nstatus.py 0 0x48 \\\n    --uts \\\n    --filter-by-key fifo,0 \n```\n\nIt is useful to combine this status report to the digitized\nclocking status report as they are closely related\n\n```shell\nstatus.py 1 0x4A \\\n    --ccdpll \\\n    --uts\n```\n\nSome UTS/IUTS raw data are signed 24 or 48 bit values, this\nportion of the status script should interprate those values correctly,\nbut it has to be confirmed / verified.\n\nIt is not clear at the moment which UTSx core (8 cores) is fed\nto the UTS FIFO (unique fifo).\nTherefore it is not clear to me which scaling should apply\nwhen interprating the data contained in the UTS FIFO.   \nAt the moment, I hardcoded Core #0 (1st one) as the frequency source\n\u0026#10140; to clarify and improve.\n\n### Inverse UTS management\n\nTODO\n\n## Skew measurement unit \n\nAD9546/45 integrates a skew measurement system\nthat is very convenient and serves as an input\nsignal quality evaluation system.\n\nReading the skew measurement monitoring and reading\nis done with the status script:\n\n```shell\n# general report\nstatus.py 0 0x4A --skew\n\n# skew raw readings \n# A negative value means the target source leads the ref. source.\n# Returned value in [ps]\nstatus.py 0 0x4A \\\n    --skew \\\n    --filter-by-key offset # raw data\n    --unpack # very raw data [ps]\n```\n\nThere are two options to perform skew measurements\n* either ref. and source share same frequency,\nthis is controlled in 0x2A14.\n* or ref. and source drift/beat one against another,\nand we evaluate skew drift over time (0x3A3A)\n\n## IRQ events\n\n`status.py --irq` allows reading the current asserted IRQ flags.  \n\nClear them with `irq.py`:\n\n* `--all`: clear all flags\n* `--pll`: clear all PLL (PLL0 + PLL1 + digital + analog) related events \n* `--pll0`: clear PLL0 (digital + analog) related events \n* `--pll1`: clear PLL1 (digital + analog) related events \n* `--other`: clear events that are not related to the pll subgroup\n* `--sysclk`: clear all sysclock related events \n* `-h`: for other known flags\n\n## Misc\n\n`status.py --misc` returns (amongst other infos) the internal temperature sensor reading.  \n\n* Get current reading :\n```shell\nstatus.py --misc 1 0x48\n# Filter on field of interest like this\nstatus.py --misc 1 0x48 --filter-by-key temperature,value --unpack\n# Is temperature range currently exceeded\nstatus.py --misc 1 0x48 --filter-by-key temperature,alarm --unpack\n```\n\n* Program a temperature range :\n\n```shell\nmisc.py --temp-thres-low -10 # [°C]\nmisc.py --temp-thres-high 80 # [°C]\nmisc.py --temp-thres-low -30 --temp-thres-high 90\nstatus.py --temp 0 0x48 # current reading [°C] \n```\n\nRelated warning events are then retrieved with the `irq.py` utility, refer to related section.\n\n## Typical configuration flows\n\n* load a profile preset, calibrate and get started\n\n```shell\nregmap.py --load profile.json --quiet 0 0x48\nstatus.py --pll --distrib --filter-by-key ch0 0 0x48\ncalib.py --all 0 0x48\nstatus.py --pll --distrib --filter-by-key ch0 0 0x48\n```\n\n* input reference definition, rework and constrains\n```shell\nTODO\n```\n\n* power saving operation\n```shell\nTODO\n```\n\n* reference switching \n```shell\nTODO\n```\n\n* dpll rework (internal filter + REF)\n```shell\nTODO\n```\n\n* obtain phase + freq lock\n```shell\nTODO\n```\n\n* distrib operations: rework distribution behavior,\nmodify output frequency and signal shape\n```shell\nTODO\n```\n\n* skew and integrated signal quality indicators\n```shell\nTODO\n```\n\n* UTS : time stamping measurement special opmode \n```shell\nTODO\n```\n\n* IUTS : synthesis using inverse time stamping special opmode\n```shell\nTODO\n```\n\n## TODO\n\nThese scripts are work in progress.   \n`grep -r \"TODO\"` to depict current uncertainties \n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fgwbres%2Fadi-ad9546","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fgwbres%2Fadi-ad9546","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fgwbres%2Fadi-ad9546/lists"}