{"id":23986586,"url":"https://github.com/h0nt3d/modulo2345updowncounter","last_synced_at":"2025-11-17T20:04:27.472Z","repository":{"id":262322172,"uuid":"886867373","full_name":"h0nt3d/modulo2345UpDownCounter","owner":"h0nt3d","description":"A counter written in VHDL that has been designed to count in radix 8 up and down from 0 to 2344 in radix 14 while displaying the counting on 4 Seven Segment Displays","archived":false,"fork":false,"pushed_at":"2024-12-06T13:43:11.000Z","size":9214,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"main","last_synced_at":"2025-02-25T02:43:40.007Z","etag":null,"topics":["computer-science","counter","digital-electronics","digital-logic-design","electrical-engineering","electronics","fpga-programming","instantiation","mod","quartus-prime","radix","seven-segments-display","vhdl"],"latest_commit_sha":null,"homepage":"","language":"VHDL","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/h0nt3d.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2024-11-11T18:45:16.000Z","updated_at":"2024-12-09T00:52:33.000Z","dependencies_parsed_at":"2024-11-28T20:18:37.115Z","dependency_job_id":"cbd76df4-e6f3-4ae1-bb07-9a94c8cb71b7","html_url":"https://github.com/h0nt3d/modulo2345UpDownCounter","commit_stats":null,"previous_names":["1y4nu/modulo2345updowncounter","null-object-0/modulo2345updowncounter","h0nt3d/modulo2345updowncounter"],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/h0nt3d/modulo2345UpDownCounter","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/h0nt3d%2Fmodulo2345UpDownCounter","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/h0nt3d%2Fmodulo2345UpDownCounter/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/h0nt3d%2Fmodulo2345UpDownCounter/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/h0nt3d%2Fmodulo2345UpDownCounter/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/h0nt3d","download_url":"https://codeload.github.com/h0nt3d/modulo2345UpDownCounter/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/h0nt3d%2Fmodulo2345UpDownCounter/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":284948161,"owners_count":27089294,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","status":"online","status_checked_at":"2025-11-17T02:00:06.431Z","response_time":55,"last_error":null,"robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":true,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["computer-science","counter","digital-electronics","digital-logic-design","electrical-engineering","electronics","fpga-programming","instantiation","mod","quartus-prime","radix","seven-segments-display","vhdl"],"created_at":"2025-01-07T15:33:06.965Z","updated_at":"2025-11-17T20:04:27.443Z","avatar_url":"https://github.com/h0nt3d.png","language":"VHDL","funding_links":[],"categories":[],"sub_categories":[],"readme":"\n![alt text](https://github.com/1y4nu/modulo2345UpDownCounter/blob/main/images/fpga.jpg?raw=true)\n-**Cyclone IV Altera DE2-115 Development and Education Board**\n\nThis counter has been written in VHDL with its primary function being able to count up and down in radix 8 from 0 to 2344 in radix 14. Its other features include:\n- A load button that loads in a value in binary using 15 switches.\n- An instantiated clock generator.\n- A clear button that resets the counter back to 0.\n- 4 seven segment displays to show counting.\n- A switch that can change the radix view (8 or 14) on the seven segment displays.\n- A warning signal that lights up and prevents a value greater than 2344 from being loaded in.\n- Green LEDs that represent the lowest significant bit of the counting value being displayed on the 4 seven segment displays.\n- An enable switch that can be used to start and stop counting.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fh0nt3d%2Fmodulo2345updowncounter","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fh0nt3d%2Fmodulo2345updowncounter","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fh0nt3d%2Fmodulo2345updowncounter/lists"}