{"id":13493855,"url":"https://github.com/hdl-util/hdmi","last_synced_at":"2026-01-25T09:33:45.583Z","repository":{"id":42074006,"uuid":"202815014","full_name":"hdl-util/hdmi","owner":"hdl-util","description":"Send video/audio over HDMI on an FPGA","archived":false,"fork":false,"pushed_at":"2024-02-03T21:20:10.000Z","size":4327,"stargazers_count":1208,"open_issues_count":16,"forks_count":131,"subscribers_count":49,"default_branch":"master","last_synced_at":"2025-11-04T20:11:20.383Z","etag":null,"topics":["altera","audio","dvi","fpga","hdlmake","hdmi","intel","quartus","systemverilog","video","vivado","xilinx"],"latest_commit_sha":null,"homepage":"https://purisa.me/blog/hdmi-released/","language":"SystemVerilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"other","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/hdl-util.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":".github/FUNDING.yml","license":"LICENSE-APACHE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null},"funding":{"github":["sameer"]}},"created_at":"2019-08-17T00:13:07.000Z","updated_at":"2025-11-03T19:39:07.000Z","dependencies_parsed_at":"2024-01-07T01:20:07.644Z","dependency_job_id":"b4198eca-aae6-4842-8f2f-4685c9bbc19b","html_url":"https://github.com/hdl-util/hdmi","commit_stats":null,"previous_names":[],"tags_count":5,"template":false,"template_full_name":null,"purl":"pkg:github/hdl-util/hdmi","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hdl-util%2Fhdmi","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hdl-util%2Fhdmi/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hdl-util%2Fhdmi/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hdl-util%2Fhdmi/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/hdl-util","download_url":"https://codeload.github.com/hdl-util/hdmi/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hdl-util%2Fhdmi/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28750875,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-01-25T09:00:19.176Z","status":"ssl_error","status_checked_at":"2026-01-25T09:00:04.131Z","response_time":113,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["altera","audio","dvi","fpga","hdlmake","hdmi","intel","quartus","systemverilog","video","vivado","xilinx"],"created_at":"2024-07-31T19:01:19.440Z","updated_at":"2026-01-25T09:33:45.567Z","avatar_url":"https://github.com/hdl-util.png","language":"SystemVerilog","funding_links":["https://github.com/sponsors/sameer"],"categories":["Connectivity","SystemVerilog","Applications"],"sub_categories":[],"readme":"# hdmi\n\n[English](./README.md) | [Français](./README_fr.md) | [Help translate](https://github.com/hdl-util/hdmi/issues/11)\n\n![hdmi](https://github.com/hdl-util/hdmi/workflows/hdmi/badge.svg)\n\nSystemVerilog code for HDMI 1.4b video/audio output on an [FPGA](https://simple.wikipedia.org/wiki/Field-programmable_gate_array).\n\n## Why?\n\nMost free and open source HDMI source (computer/gaming console) implementations actually output a DVI signal, which HDMI sinks (TVs/monitors) are backwards compatible with. To support audio and other HDMI-only functionality, a true HDMI signal must be sent. The code in this repository lets you do that without having to license an HDMI IP block from anyone.\n\n### Demo: VGA-compatible text mode, 720x480p on a Dell Ultrasharp 1080p Monitor\n\n![GIF showing VGA-compatible text mode on a monitor](demo.gif)\n\n## License\n\nThis project is dual-licensed under MIT and Apache 2.0.\n\n`SPDX-License-Identifier: MIT OR Apache-2.0`\n\n## Usage\n\n1. Take files from `src/` and add them to your own project. If you use [hdlmake](https://hdlmake.readthedocs.io/en/master/), you can add this repository itself as a remote module.\n1. Other helpful modules for displaying text / generating sound are also available in this GitHub organization.\n1. Consult the simple usage example in `top/top.sv`.\n1. See [hdmi-demo](https://github.com/hdl-util/hdmi-demo) for code that runs the demo as seen the demo GIF.\n1. Read through the parameters in `hdmi.sv` and tailor any instantiations to your situation.\n1. Please create an issue if you run into a problem or have any questions. Make sure you have consulted the troubleshooting section first.\n\n### Platform Support\n\n- [x] Altera (tested on [MKR Vidor 4000](https://store.arduino.cc/usa/mkr-vidor-4000))\n- [x] Xilinx (tested on [Spartan Edge Accelerator Board](https://www.seeedstudio.com/Spartan-Edge-Accelerator-Board-p-4261.html))\n- [ ] Lattice (unknown)\n- [ ] Gowin (WIP, active testing on Tang Nano 9K)\n\n### To-do List (upon request)\n- [x] 24-bit color\n- [x] Data island packets\n\t- [x] Null packet\n\t- [x] ECC with BCH systematic encoding GF(2^8)\n\t- [x] Audio clock regeneration\n\t- [x] L-PCM audio\n\t\t- [x] 2-channel\n\t\t- [ ] 3-channel to 8-channel\n\t- [ ] 1-bit audio\n\t- [x] Audio InfoFrame\n\t- [x] Auxiliary Video Information InfoFrame\n\t- [x] Source Product Descriptor InfoFrame\n\t- [ ] MPEG Source InfoFrame\n\t\t- NOTE—Problems with the MPEG Source Infoframe have been identified that were not able to be fixed in time for CEA-861-D. Implementation is strongly discouraged until a future revision fixes the problems\n\t- [ ] Gamut Metadata\n- [x] Video formats 1, 2, 3, 4, 16, 17, 18, and 19\n- [x] VGA-compatible text mode\n\t- [x] IBM 8x16 font\n\t- [ ] Alternate fonts\n- [ ] Other color formats (YCbCr, deep color, etc.)\n- [ ] Support other video id codes\n\t- [ ] Interlaced video\n\t- [ ] Pixel repetition\n\n\n### Pixel Clock\n\nYou'll need to set up a PLL for producing the two HDMI clocks. The pixel clock for each supported format is shown below:\n\n|Video Resolution|Video ID Code(s)|Refresh Rate|Pixel Clock Frequency|[Progressive](https://en.wikipedia.org/wiki/Progressive_scan)/[Interlaced](https://en.wikipedia.org/wiki/Interlaced_video)|\n|---|---|---|---|---|\n|640x480|1|60Hz|25.2MHz|P|\n|640x480|1|59.94Hz|25.175MHz|P|\n|720x480|2, 3|60Hz|27.027MHz|P|\n|720x480|2, 3|59.94Hz|27MHz|P|\n|720x576|17, 18|50Hz|27MHz|P|\n|1280x720|4|60Hz|74.25MHz|P|\n|1280x720|4|59.94Hz|74.176MHz|P|\n|1280x720|19|50Hz|74.25MHz|P|\n|1920x1080|16|60Hz|148.5MHz|P|\n|1920x1080|16|59.94Hz|148.352MHz|P|\n|1920x1080|34|30Hz|74.25MHz|P|\n|1920x1080|34|29.97Hz|74.176MHz|P|\n|3840x2160 (not ready)|97, 107|60Hz|594MHz|P|\n|3840x2160|95, 105|30Hz|297MHz|P|\n\nThe second clock is a clock 5 times as fast as the pixel clock. Even if your FPGA only has a single PLL, the Altera MegaWizard (or the Xilinx equivalent) should still be able to produce both. See [hdl-util/hdmi-demo](https://github.com/hdl-util/hdmi-demo/) for example PLLs.\n\n### L-PCM Audio Bitrate / Sampling Frequency\n\nBoth audio bitrate and frequency are specified as parameters of the HDMI module. Bitrate can be any value from 16 through 24. Below is a simple mapping of sample frequency to the appropriate parameter\n\n**WARNING: the audio can be REALLY LOUD if you use the full dynamic range with hand-generated waveforms! Using less dynamic range means you won't be deafened! (i.e. audio_sample \u003e\u003e 8 )**\n\n|Sampling Frequency|AUDIO_RATE value|\n|---|---|\n|32 kHz|32000|\n|44.1 kHz|44100|\n|88.2 kHz|88200|\n|176.4 kHz|176400|\n|48 kHz|48000|\n|96 kHz|96000|\n|192 kHz|192000|\n\n\n### Source Device Information Code\n\nThis code is sent in the Source Product Description InfoFrame via `SOURCE_DEVICE_INFORMATION` to give HDMI sinks an idea of what capabilities an HDMI source might have. It may be used for displaying a relevant icon in an input list (i.e. DVD logo for a DVD player).\n\n|Code|Source Device Information|\n|---|---|\n|0x00|Unknown|\n|0x01|Digital Set-top Box|\n|0x02|DVD Player|\n|0x03|Digital VHS|\n|0x04|HDD Videorecorder|\n|0x05|Digital Video Camera|\n|0x06|Digital Still Camera|\n|0x07|Video CD|\n|0x08|Game|\n|0x09|PC General|\n|0x0a|Blu-Ray Disc|\n|0x0b|Super Audio CD|\n|0x0c|HD DVD|\n|0x0d|Portable Media Player|\n\n### Things to be aware of / Troubleshooting\n\n* Limited resolution: some FPGAs don't support I/O at speeds high enough to achieve 720p/1080p\n\t* Workaround: Altera FPGA users can try to specify speed grade C6 and see if it works, though yours may be C7 or C8. Beware that this might introduce some system instability.\n* FPGA does not support TMDS: many FPGAs without a dedicated HDMI output don't support TMDS\n    * You should be able to directly use LVDS (3.3v) instead, tested up to 720x480\n    * This might not work if your video has a high number of transitions or you plan to use higher resolutions\n    * Solution: AC-couple the 3.3v LVDS wires to by adding 100nF capacitors in series, as close to the transmitter as possible\n        * Why? TMDS is current mode logic, and driving a CML receiver with LVDS is detailed in [Figure 9 of Interfacing LVDS with other differential-I/O types](https://web.archive.org/web/20151123084833/https://m.eet.com/media/1135468/330072.pdf)\n            * Resistors are not needed since Vcc = 3.3v for both the transmitter and receiver\n        * Example: See `J13`, on the [Arduino MKR Vivado 4000 schematic](https://content.arduino.cc/assets/vidor_c10_sch.zip), where LVDS IO Standard pins on a Cyclone 10 FPGA have 100nF series capacitors\n* Poor wiring: if you're using a breakout board or long lengths of untwisted wire, there might be a few pixels that jitter due to interference\n    * Make sure you have all the necessary pins connected (GND pins, etc.)\n    * Try switching your HDMI cable; some cheap cables like [these I got from Amazon](https://www.amazon.com/gp/product/B01JO9PB7E/) have poor shielding\n* Hot-Plug unaware: all modules are unaware of hotplug\n    * This shouldn't affect anything in the long term; the only stateful value is `hdmi.tmds_channel[2:0].acc`\n    * You should decide hotplug behavior (i.e. pause/resume on disconnect/connect, or ignore it)\n* EDID not implemented: it is assumed you know what format you want at synthesis time, so there is no dynamic decision on video format\n    * To be implemented in a display protocol independent manner\n* SCL/SCA voltage level: though unused by this implementation...it is I2C on a 5V logic level, as confirmed in the [TPD12S016 datasheet](https://www.ti.com/lit/ds/symlink/tpd12s016.pdf), which is unsupported by most FPGAs\n    * Solution: use a bidirectional logic level shifter compatible with I2C to convert 3.3v LVTTL to 5v\n    * Solution: use 3.3-V LVTTL I/O standard with 6.65k pull-up resistors to 3.3v (as done in `J13` on the [Arduino MKR Vivado 4000 schematic](https://content.arduino.cc/assets/vidor_c10_sch.zip))\n\t* Emailed Arduino support: safe to use as long as the HDMI slave does not have pull-ups\n\n## Licensing\n\nDual-licensed under Apache License 2.0 and MIT License.\n\n### HDMI Adoption\n\nI am NOT a lawyer, the below advice is given based on discussion from [a Hacker News post](https://news.ycombinator.com/item?id=22279308) and my research.\n\nHDMI itself is not a royalty free technology, unfortunately. You are free to use it for testing, development, etc. but to receive the HDMI LA's (licensing administration) blessing to create and sell end-user products:\n\n\n\u003e The manufacturer of the finished end-user product MUST be a licensed HDMI Adopter, and\n\u003e The finished end-user product MUST satisfy all requirements as defined in the Adopter Agreement including but not limited to passing compliance testing either at an HDMI ATC or through self-testing.\n\n\nBecoming an adopter means you have to pay a flat annual fee (~ $1k-$2k) and a per device royalty (~ $0.05). If you are selling an end-user device and DO NOT want to become an adopter, you can turn on the `DVI_OUTPUT` parameter, which will disable any HDMI-only logic, like audio.\n\nPlease consult your lawyer if you have any concerns. Here are a few noteworthy cases that may help you make a decision:\n\n* Arduino LLC is not an adopter, yet sells the [Arduino MKR Vidor 4000](https://store.arduino.cc/usa/mkr-vidor-4000) FPGA \n    * It has a micro-HDMI connector\n    * [Having an HDMI connector does not require a license](https://electronics.stackexchange.com/questions/28202/legality-of-using-hdmi-connectors-in-non-hdmi-product)\n    * Official examples provided by Arduino on GitHub only perform DVI output\n    * It is a user's choice to program the FPGA for HDMI output\n    * Therefore: the device isn't an end-user product under the purview of HDMI LA\n* Unlicensed DisplayPort to HDMI cables (2011)\n    * [Articles suggests that the HDMI LA can recall illegal products](https://www.pcmag.com/archive/displayport-to-hdmi-cables-illegal-could-be-recalled-266671?amp=1).\n    * But these cables [are still sold on Amazon](https://www.amazon.com/s?k=hdmi+to+displayport+cable)\n    * Therefore: the power of HDMI LA to enforce licensing is unclear\n* [Terminated Adopters](https://hdmi.org/adopter/terminated)\n    * There are currently 1,043 terminated adopters\n    * Includes noteworthy companies like Xilinx, Lattice Semiconductor, Cypress Semiconductor, EVGA (!), etc.\n    * No conclusion\n* Raspberry Pi Trading Ltd is licensed\n    * They include the HDMI logo for products\n    * Therefore: Raspberry Pi products are legal, licensed end-user products\n\n## Alternative Implementations\n\n- [HDMI Intel FPGA IP Core](https://www.intel.com/content/www/us/en/programmable/products/intellectual-property/ip/interface-protocols/m-alt-hdmi-megacore.html): Stratix/Arria/Cyclone\n- [Xilinx HDMI solutions](https://www.xilinx.com/products/intellectual-property/hdmi.html#overview): Virtex/Kintex/Zynq/Artix\n- [Artix 7 HDMI Processing](https://github.com/hamsternz/Artix-7-HDMI-processing): VHDL, decode \u0026 encode\n- [SimpleVOut](https://github.com/cliffordwolf/SimpleVOut): many formats, no auxiliary data\n\nIf you know of another good alternative, open an issue and it will be added.\n\n## Reference Documents\n\n*These documents are not hosted here! They are available on [Library Genesis](https://libgen.is/) and at other locations.*\n\n* [HDMI Specification v1.4b](https://b-ok.cc/book/5499564/fe35f4) (dead link but also on libgen)\n* [HDMI Specification v2.0](https://b-ok.cc/book/5464885/1f0b4c) (dead link but also on libgen)\n* [EIA-CEA861-D.pdf](https://libgen.is/book/index.php?md5=CEE424CA0F098096B6B4EC32C32F80AA)\n* [CTA-861-G.pdf](https://b-ok.cc/book/5463292/52859e) (dead link but also on libgen)\n* [DVI Specification v1.0](https://www.cs.unc.edu/~stc/FAQs/Video/dvi_spec-V1_0.pdf)\n* [IEC 60958-1](https://ia803003.us.archive.org/30/items/gov.in.is.iec.60958.1.2004/is.iec.60958.1.2004.pdf)\n* [IEC 60958-3](https://ia800905.us.archive.org/22/items/gov.in.is.iec.60958.3.2003/is.iec.60958.3.2003.pdf)\n* [E-DDC v1.2](https://glenwing.github.io/docs/)\n\n## Special Thanks\n\n* Mike Field's (@hamsternz) demos of DVI and HDMI output for helping me better understand HDMI\n\t* http://www.hamsterworks.co.nz/mediawiki/index.php/Dvid_test\n\t* http://www.hamsterworks.co.nz/mediawiki/index.php/Minimal_DVI-D\n* Jean P. Nicolle (fpga4fun.com) for sparking my interest in HDMI\n\t* https://www.fpga4fun.com/HDMI.html\n* Bureau of Indian Standards for free equivalents of non-free IEC standards 60958-1, 60958-3, etc.\n* @glenwing for [links to many VESA standard documents](https://glenwing.github.io/docs/)\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fhdl-util%2Fhdmi","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fhdl-util%2Fhdmi","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fhdl-util%2Fhdmi/lists"}