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2023\n\nEl presente repositorio contiene todo el material de la materia Arquitectura de Computadoras 2023 correspondiente a 3er año - 2do semestre de la Licenciatura en Ciencias de la Computación en la Facultad de Matemática, Astronomía, Física y Computación (FAMAF) de la Universidad Nacional de Córdoba (UNC).\n\n## Información importante del Quartus\n\n- ¿Cómo usar VSCode como editor?: \u003chttps://blog.csdn.net/qq_46588746/article/details/108780967\u003e\n- ¿Cómo poner *autoformatter on save* a los archivos del quartus?: \u003chttps://marketplace.visualstudio.com/items?itemName=bmpenuelas.systemverilog-formatter-vscode\u0026ssr=false#overview\u003e\n  - La config debe ser en **settings.json** del VSCode\n\n    ```json\n    \"[systemverilog]\": {\n        \"editor.defaultFormatter\": \"bmpenuelas.systemverilog-formatter-vscode\",\n        \"editor.formatOnSave\": true,\n    },\n    ```\n\n## Primera parte: Procesador de un solo ciclo (práctico)\n\n| Unidad | Tema | Enunciado | Resolución |\n| ------ | ---- | --------- | ---------- |\n| 1 | Procesador de un solo ciclo | [PDF](./Primera%20parte%20-%20Práctico/SingleCycleProcessor-Enunciado.pdf) | [Carpeta](/Primera%20parte%20-%20Práctico/SingleCycleProcessor/) |\n| 2 | Test del procesador de un solo ciclo | [PDF](./Primera%20parte%20-%20Práctico/SingleCycleProcessor2-Test-Enunciado.pdf) | [Carpeta](./Primera%20parte%20-%20Práctico/SingleCycleProcessor/) |\n| 3 | Procesador de un solo ciclo con excepciones | [PDF](./Primera%20parte%20-%20Práctico/SingleCycleProcessorWithExceptions%20-%20Guide.pdf) | [Carpeta](./Primera%20parte%20-%20Práctico/SingleCycleProcessorWithExceptions/) |\n\n## Segunda parte: Mejoras al procesador (teórico y práctico)\n\n| Unidad | Tema | Resumen y solución a los ejercicios |\n| ------ | ---- | ------------------------------------- |\n| 5 | Jerarquía de memoria | [JUAN](./Segunda%20parte%20-%20Teórico%20y%20Práctico/5%20-%20JUAN%20-%20Jerarquía%20de%20Memorias.pdf) y [EMA](./Segunda%20parte%20-%20Teórico%20y%20Práctico/5%20-%20EMA%20-%20Jerarquía%20de%20Memorias.pdf) |\n| 6 | Técnicas de mejora de rendimiento | [EMA](./Segunda%20parte%20-%20Teórico%20y%20Práctico/6%20-%20EMA%20-%20Técnicas%20de%20mejora%20de%20rendimiento.pdf) |\n| 7 | Dynamic Scheduling | [EMA](./Segunda%20parte%20-%20Teórico%20y%20Práctico/7%20-%20EMA%20-%20Dynamic%20Scheduling.pdf) |\n\n## Laboratorios\n\n| Proyecto | Desarrollo |\n| -------- | ---------- |\n| Laboratorio 1: ARMv8 en SystemVerilog | [Repositorio](https://github.com/helcsnewsxd/famaf-computer_science-computer_architecture-lab1) |\n| Laboratorio 2: Análisis de Microarquitecturas | [Repositorio](https://github.com/helcsnewsxd/famaf-computer_science-computer_architecture-lab2) |","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fhelcsnewsxd%2Ffamaf-computer_science-computer_architecture","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fhelcsnewsxd%2Ffamaf-computer_science-computer_architecture","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fhelcsnewsxd%2Ffamaf-computer_science-computer_architecture/lists"}