{"id":21024372,"url":"https://github.com/hukenovs/fp32_logic","last_synced_at":"2026-03-17T19:26:32.427Z","repository":{"id":90537996,"uuid":"144841246","full_name":"hukenovs/fp32_logic","owner":"hukenovs","description":"Floating point FP32 core HDL. For Xilinx FPGAs. Include base converters and some math functions.","archived":false,"fork":false,"pushed_at":"2018-10-17T11:50:00.000Z","size":27,"stargazers_count":10,"open_issues_count":0,"forks_count":3,"subscribers_count":3,"default_branch":"master","last_synced_at":"2025-12-28T08:17:50.918Z","etag":null,"topics":["altera","digital-signal-processing","dsp","floating-point","fpga","ieee-754","ieee754","integer-arithmetic","verilog","vhdl","xilinx"],"latest_commit_sha":null,"homepage":null,"language":"VHDL","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/hukenovs.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2018-08-15T10:49:00.000Z","updated_at":"2025-11-28T10:02:10.000Z","dependencies_parsed_at":null,"dependency_job_id":"3ea10d79-e4e3-4e9b-a4c1-40b09f10bd75","html_url":"https://github.com/hukenovs/fp32_logic","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/hukenovs/fp32_logic","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hukenovs%2Ffp32_logic","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hukenovs%2Ffp32_logic/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hukenovs%2Ffp32_logic/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hukenovs%2Ffp32_logic/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/hukenovs","download_url":"https://codeload.github.com/hukenovs/fp32_logic/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hukenovs%2Ffp32_logic/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":30629263,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-03-17T17:32:55.572Z","status":"ssl_error","status_checked_at":"2026-03-17T17:32:38.732Z","response_time":56,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["altera","digital-signal-processing","dsp","floating-point","fpga","ieee-754","ieee754","integer-arithmetic","verilog","vhdl","xilinx"],"created_at":"2024-11-19T11:25:36.894Z","updated_at":"2026-03-17T19:26:32.405Z","avatar_url":"https://github.com/hukenovs.png","language":"VHDL","funding_links":[],"categories":[],"sub_categories":[],"readme":"# fp32_logic\nFloating point FP32 (same as IEEE-754 w/ some diffs) core HDL. For Xilinx FPGAs. Include base converters and some math functions.\nSupported families: **Xilinx 6/7 series, Ultrascale, US+**.\nSource files: **VHDL**\n\nFP WORD 32-bit vector:\n\nEXPONENT - 8-bits.\nSIGN - 1-bit\nMANTISSA - 24+1 bits.\n'1' means hidden one for normalized floating-point values;\n\nMath: \n**A = (-1)^sign(A) * 2^(exp(A)-63) * mant(A)**\n\nComponent list:\n  * _fp32_fix2float_ - convert data from INT32 to FP32.\n  * _fp32_float2fix_ - convert data from FP32  to INT32.\n  * _fp32_addsub_    - floating point adder.\n  * _fp32_mult_      - floating point multiplier.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fhukenovs%2Ffp32_logic","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fhukenovs%2Ffp32_logic","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fhukenovs%2Ffp32_logic/lists"}