{"id":21024366,"url":"https://github.com/hukenovs/intfftk","last_synced_at":"2026-02-14T13:01:27.400Z","repository":{"id":55766698,"uuid":"145118369","full_name":"hukenovs/intfftk","owner":"hukenovs","description":"Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). 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   \n\nInteger data type and twiddles with configurable data width.   \n\n**Code language** - VHDL, Verilog\n\n**Vendor**: Xilinx, 6/7-series, Ultrascale, Ultrascale+;  \n\n\u003e _Smallest FPGA resourses and highest processing frequency that you ever seen!_   \n\nLicense: GNU GPL 3.0.\n\n### Main information\n\n| **Title**         | Universal integer FFT cores (Xilinx FPGAs) |\n| -- | -- |\n| **Author**        | [Alexander Kapitanov](https://habr.com/ru/users/hukenovs/) |\n| **Project**       | [Habrahabr](https://habr.com/ru/post/420517/) |\n| **Project lang**  | VHDL, Verilog                              |\n| **Vendor**        | Xilinx: 6/7-series, Ultrascale, US+        |\n| **Release Date**  | 13 May 2018                                |\n| **Last Update**   | 11 Jan 2019                                |\n\n### List of complements:\n- FFTs:\n   * int_fftNk – main core - Full-precision or Scaled FFT, Radix-2, DIF, input flow - normal, output flow - bit-reversed.\n   * int_ifftNk – main core - Full-precision or Scaled IFFT, Radix-2, DIT, input flow - bit-reversed, output flow - normal.\n- Butterflies:\n   * int_dif2_fly – Full-precision or Scaled butterfly Radix-2, decimation in frequency,\n   * int_dit2_fly – Full-precision or Scaled butterfly Radix-2, decimation in time,\n- Complex multipliers:\n   * int_cmult_dsp48 – main integer complex multiplier contains several cmults:\n     * int_cmult18x25_dsp48 – simple 25 x 18 two’s-complement half-complex-multiplier,\n     * int_cmult_dbl18_dsp48 – double 42(44) x 18 two’s-complement half-complex-multiplier,\n     * int_cmult_dbl35_dsp48 – double 25(27) x 35 two’s-complement half-complex-multiplier,\n     * int_cmult_trpl18_dsp48 – triple 59(61) x 18 two’s-complement half-complex-multiplier,\n     * int_cmult_trpl52_dsp48 – triple 25(27) x 52 two’s-complement half-complex-multiplier,\n\u003e \"half\" means that you should set output flow: Re or Im part.\n\n- Multipliers:\n  * mlt42x18_dsp48e1 – 42 x 18 two’s-complement multiplier (DSP48E1), del.: 4 taps, res.: 2 DSPs.\n  * mlt59x18_dsp48e1 – 59 x 18 two’s-complement multiplier (DSP48E1), del.: 5 taps, res.: 3 DSPs.\n  * mlt35x25_dsp48e1 – 35 x 25 two’s-complement multiplier (DSP48E1), del.: 4 taps, res.: 2 DSPs.\n  * mlt52x25_dsp48e1 – 52 x 25 two’s-complement multiplier (DSP48E1), del.: 5 taps, res.: 3 DSPs.\n  * mlt44x18_dsp48e2 – 44 x 18 two’s-complement multiplier (DSP48E2), del.: 4 taps, res.: 2 DSPs.\n  * mlt61x18_dsp48e2 – 61 x 18 two’s-complement multiplier (DSP48E2), del.: 5 taps, res.: 3 DSPs.\n  * mlt35x27_dsp48e2 – 35 x 27 two’s-complement multiplier (DSP48E2), del.: 4 taps, res.: 2 DSPs.\n  * mlt52x27_dsp48e2 – 52 x 27 two’s-complement multiplier (DSP48E2), del.: 5 taps, res.: 3 DSPs.\n\n- Adder:\n  * int_addsub_dsp48 – based on DSP48, up to 96-bit two’s-complement addition/substraction.\n\n- Delay line:\n  * int_delay_line – main delay line, cross-commutation data between butterflies.\n  * int_align_fft – data and twiddle factor alignment for butterflies in FFT core,\n  * int_align_fft – data and twiddle factor alignment for butterflies in IFFT core,\n\n- Twiddles:\n  * rom_twiddle_int – 1/4-periodic signal, twiddle factor generator based on memory and sometimes uses DSP48 units for large FFTs\n  * row_twiddle_tay – twiddle factor generator which used Taylor scheme for calculation twiddles.\n\n- Buffers:\n  * inbuf_half_path – simple input buffer, perform flow into two flows: [0 .. NFFT/2), (NFFT/2 .. NFFT-1], single clock,\n  * outbuf_half_path – simple input buffer, merge two flows into one signal, single clock,\n\n  * iobuf_flow_int2 – Mode-1: BITREV = FALSE: convert Interleave-2 flow into two parts of input flows, Mode-2: BITREV = TRUE: convert two-half flows into Interleave-2 signal. \n  * int_bitrev_ord – simple converter data from bit-reverse to natural order.\n\n### Author:\n  * [Kapitanov Alexander](https://habr.com/ru/users/hukenovs/) \n  \n### Release:\n  * 2018/13/05  \n\n### License:\n  * GNU GPL 3.0  \n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fhukenovs%2Fintfftk","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fhukenovs%2Fintfftk","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fhukenovs%2Fintfftk/lists"}