{"id":14992037,"url":"https://github.com/ingonyama-zk/blaze","last_synced_at":"2025-04-05T00:07:21.114Z","repository":{"id":58625338,"uuid":"532656530","full_name":"ingonyama-zk/blaze","owner":"ingonyama-zk","description":"blaze is a Rust library for ZK acceleration on Xilinx FPGAs.","archived":false,"fork":false,"pushed_at":"2024-10-22T12:17:06.000Z","size":2364,"stargazers_count":146,"open_issues_count":11,"forks_count":19,"subscribers_count":8,"default_branch":"main","last_synced_at":"2025-03-28T23:05:37.207Z","etag":null,"topics":["aws","fpga","hardware","xilinx-fpga","zero-knowledge"],"latest_commit_sha":null,"homepage":"","language":"Rust","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"gpl-3.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/ingonyama-zk.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE.md","code_of_conduct":null,"threat_model":null,"audit":null,"citation":"CITATION.cff","codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2022-09-04T20:57:12.000Z","updated_at":"2025-02-10T11:18:11.000Z","dependencies_parsed_at":"2024-02-18T15:25:19.771Z","dependency_job_id":"379c3547-98fd-46c5-a1d7-5c58945fb879","html_url":"https://github.com/ingonyama-zk/blaze","commit_stats":null,"previous_names":[],"tags_count":3,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ingonyama-zk%2Fblaze","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ingonyama-zk%2Fblaze/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ingonyama-zk%2Fblaze/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ingonyama-zk%2Fblaze/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/ingonyama-zk","download_url":"https://codeload.github.com/ingonyama-zk/blaze/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":247266563,"owners_count":20910836,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["aws","fpga","hardware","xilinx-fpga","zero-knowledge"],"created_at":"2024-09-24T15:00:41.135Z","updated_at":"2025-04-05T00:07:21.082Z","avatar_url":"https://github.com/ingonyama-zk.png","language":"Rust","funding_links":[],"categories":["Web3 and ZKP Framework"],"sub_categories":[],"readme":"# BLAZE\n\n \u003cdiv align=\"center\"\u003eblaze is a Rust library for ZK acceleration on Xilinx FPGAs.\u003c/div\u003e\n\n![ingo_BlazeFire_5d](https://github.com/ingonyama-zk/blaze/assets/2446179/6460173b-02af-4023-b055-c8274a0cbc21)\n\n**Disclaimer:** This release is aimed at extending the design and handling of HW, this design isn’t backward compatible with previous and F1 support is currently broken, will be fixed in short time.\n\n:fire: More Ingonyama AWS F1 AFIs will be public soon, stay tuned!\n\n# Read/Write to Device in Rust\n\nThis Rust package offers a basic AXI infrastructure and the ability to work with user logic through custom modules.\nThe custom modules provided are designed for [MSM](src/ingo_msm) and [Poseidon hash](src/ingo_hash) and allow for the loading of user logic onto an FPGA.\n\nIn addition to supporting our binary, this library allows work with custom builds using warpshell https://github.com/Quarky93/warpshell.\n\n## New Design\n\nThe new design is based on the idea of how a pool connection works with a database. Accordingly, this level includes interaction with a specific connection, and all things concerning connection selection, multiple connections, as well as state machines should be performed by a management layer.\n\nOn the connection side, we can provide an API to retrieve any necessary data (including firewall status, current task number, etc.) for management. The main design components are described below.\n\n### DriverClient\n\nThe [DriverClient](src/driver_client/) module is designed to establish a connection between the FPGA/AWS and a known type of card, such as the C1100 card. It does not possess any knowledge about primitives.\n\nThe [DriverClient](src/driver_client/) provides basic IO methods and can load a binary, as well as provide specific and debug information about current HW. For a specific card type, the [DriverConfig](src/driver_client/dclient.rs) remains the same and can be accessed using the `driver_client_cfg` function.\n\nIt is important to note that the high-level management layer determines which client and primitive should be used. The [DriverClient](src/driver_client/) can be overused in this process.\n\nHow to create a new connection:\n\n```rust\nlet dclient = DriverClient::new(\u0026id,\nDriverConfig::driver_client_cfg(CardType::C1100));\n```\n\n### DriverPrimitive\n\nTo simplify the process of using different primitives, the [DriverPrimitiveClient](src/driver_client/) was created. It is a wrapper around a [DriverClient](src/driver_client/) connection and includes the necessary configuration data for the primitive, an implementation of a common trait called [DriverPrimitiveClient](src/driver_client/), and public and private methods that are only valid for that primitive.\n\nThe configuration (e.g. for msm there are addresses space and curve description) for each primitive is provided based on the type of primitive, so there is no need to configure this manually on the high-level manager layer.\n\nTo create a new primitive instance for MSM, for example, one would use the following code:\n\n```rust\nlet dclient = DriverClient::new(\u0026id, DriverConfig::driver_client_cfg(CardType::C1100));\nlet driver = MSMClient::new(\n    MSMInit {\n        mem_type: PointMemoryType::DMA,\n        is_precompute: true,\n        curve: Curve::BLS381,\n    },\n    dclient,\n);\n```\n\nThe [DriverPrimitiveClient](src/driver_client/) is a trait that includes the basic functions of interaction with HW regarding calculations on a particular primitive. It can work with any type of data, whether it is a basic type or a tuple. The trait includes functions for initialization, setting input data, waiting for results, and getting results.\n\nFor data encapsulation, methods specific to each primitive can be divided into public (mainly methods for retrieving data from a particular offset) and private (methods for recording data or retrieving specific data for internal calculations).\n\n### General Example of usage\n\nWe will refer to any type of primitive as `DriverPrimitiveClient` to show generality.\n\n```rust\n let dclient = DriverClient::new(\u0026id, DriverConfig::driver_client_cfg(CardType::C1100));\n let driver = DriverPrimitiveClient::new(dpc_type, dclient);\n\n let _ = driver.initialize(dpc_param);\n let _ = driver.set_data(dpc_input);\n driver.wait_result();\n let dpc_res = driver.result(None).unwrap().unwrap();\n```\n\n## MSM (Multi Scalar Multiplication) Module\n\nThis module supports three curves (BLS12_377, BLS12_381, BN254) and two types of point storage on HW: DMA and HBM.\n\nThis function sets data for compute MSM and has three different cases depending on the input parameters.\n\n1. DMA only mode: - Addres for point in [`MSMConfig`].\n\n```rust\nMSMInput = {\n    points: Some(points),\n    scalars,\n    nof_elements: msm_size,\n    hbm_point_addr: None,\n}\n```\n\n2. HBM mode set points to HBM and scalars by DMA: points will be loaded on hbm at address `hbm_addr` with an `offset`.\n\n```rust\nMSMInput = {\n    points: Some(points),\n    scalars,\n    nof_elements: msm_size,\n    hbm_point_addr: Some(hbm_addr, offset),\n}\n```\n\n3. HBM mode set only scalars: points were loaded in previous iteretion on HBM.\n\n```rust\nMSMInput = {\n    points: None,\n    scalars,\n    nof_elements: msm_size,\n    hbm_point_addr: Some(hbm_addr, offset),\n}\n```\n\n## NTT (Number Theoretic Transform) Module\n\nThis module implements the calculation of NTT of size `2^27`. To use it, the input byte vector of elements must be specified. Each element must be represented in little-endian. The result will be a similar byte vector.\n\nIt is worth noting that the data transfer process is slightly different from other modules. The following is an example of how to use NTT. More details can be found here: [LINK TO BLOG]\n\n```rust\nlet dclient = DriverClient::new(\u0026id, DriverConfig::driver_client_cfg(CardType::C1100));\nlet driver = NTTClient::new(NTT::Ntt, dclient);\nlet buf_host = 0;\nlet buf_kernel = 0;\ndriver.set_data(NTTInput {\n    buf_host,\n    data: in_vec,\n})?;\ndriver.driver_client.initialize_cms()?;\ndriver.driver_client.reset_sensor_data()?;\n\ndriver.initialize(NttInit {})?;\ndriver.start_process(Some(buf_kernel))?;\ndriver.wait_result()?;\nlet res = driver.result(Some(buf_kernel))?.unwrap();\n```\n\n## Poseidon Module\n\n## Running tests and benchmark\n\n### MSM (Multi Scalar Multiplication) tests\n\nTo run tests for the MSM primitive, use the following command:\n\n```\n\nRUST_LOG=\u003cLEVEL_LOG\u003e cargo test -- \u003cTEST_FILE\u003e -- \u003cTEST_NAME\u003e\n```\n\nAlso, different tests can require additional parameters:\n`ID` `FILENAME`, and `MSM_SIZE`.\n\nReplace `\u003cLEVEL_LOG\u003e` with the desired log level (e.g. info, debug). Set `FILENAME` with the path to the binary\nfile and `ID` with the number of the FPGA slot.\nAlso, it's possible to set up a number of points in MSM in the `MSM_SIZE` variable.\n\nIf the values of `ID` and `MSM_SIZE` are not provided, they will be defaulted to `ID=0` and `MSM_SIZE=8192`.\n\n### NTT tests\n\nTo run tests for the NTT primitive, use the following command:\n\n```\n\nINFNAME=\u003cINPUT_VEC_FILE\u003e OUTFNAME=\u003cREFERENCE_OUT_VEC\u003e RUST_LOG=\u003cLEVEL_LOG\u003e cargo test -- integration_ntt\n```\n\nAlso, different tests can require additional parameters:\n`ID` `INFNAME`, and `OUTFNAME`.\n\nReplace `\u003cLEVEL_LOG\u003e` with the desired log level (e.g. info, debug). Set `INFNAME` with the path to the input vector in little-endian byte format. Since we are testing correctness, set the path to the file with which you want to compare the result for the `OUTFNAME` variable. It should also be a little-endian byte vector\nfile and `ID` with the number of the FPGA slot.\n\nIf the value of `ID` is not provided, they will be defaulted to `ID=0`.\n\n### NTT benchmark\n\nBenchmarks for NTT are located in the benches directory, it's worth clarifying that there is no correctness check inside the benchmark - for that use the tests.\n\nTo run bench for the NTT primitive, use the following command:\n\n```\n\nINFNAME=\u003cINPUT_VEC_FILE\u003e RUST_LOG=\u003cLEVEL_LOG\u003e cargo bench\n```\n\nAlso, bench can require additional parameters: `ID` and `INFNAME`. Set `INFNAME` with the path to the input vector in little-endian byte format.\n\nIf the value of `ID` is not provided, they will be defaulted to `ID=0`.\n\n### Poseidon tests\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fingonyama-zk%2Fblaze","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fingonyama-zk%2Fblaze","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fingonyama-zk%2Fblaze/lists"}