{"id":20536671,"url":"https://github.com/islandcontroller/jtag-wire-adapter","last_synced_at":"2026-03-06T18:45:57.274Z","repository":{"id":153356746,"uuid":"576729032","full_name":"islandcontroller/jtag-wire-adapter","owner":"islandcontroller","description":"A compact adapter for connecting J-Link debug probes to generic JTAG/SWD targets","archived":false,"fork":false,"pushed_at":"2023-08-02T21:21:53.000Z","size":3133,"stargazers_count":5,"open_issues_count":0,"forks_count":1,"subscribers_count":2,"default_branch":"master","last_synced_at":"2025-01-16T13:59:38.106Z","etag":null,"topics":["aisler-pcb","hardware","jlink","jtag","oshw","swd"],"latest_commit_sha":null,"homepage":"","language":null,"has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"cern-ohl-p-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/islandcontroller.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2022-12-10T19:38:07.000Z","updated_at":"2024-08-25T13:44:15.000Z","dependencies_parsed_at":null,"dependency_job_id":"0363cf62-679f-4d13-90b0-4f40889c0ff1","html_url":"https://github.com/islandcontroller/jtag-wire-adapter","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/islandcontroller%2Fjtag-wire-adapter","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/islandcontroller%2Fjtag-wire-adapter/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/islandcontroller%2Fjtag-wire-adapter/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/islandcontroller%2Fjtag-wire-adapter/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/islandcontroller","download_url":"https://codeload.github.com/islandcontroller/jtag-wire-adapter/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":242144416,"owners_count":20078964,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["aisler-pcb","hardware","jlink","jtag","oshw","swd"],"created_at":"2024-11-16T00:37:28.604Z","updated_at":"2026-03-06T18:45:52.225Z","avatar_url":"https://github.com/islandcontroller.png","language":null,"funding_links":[],"categories":[],"sub_categories":[],"readme":"# jtag-wire-adapter\r\n\r\n[![status - completed](https://img.shields.io/badge/status-completed-brightgreen?style=plastic)]() ![license - CERN-OHL-P-2.0](https://img.shields.io/github/license/islandcontroller/jtag-wire-adapter?style=plastic) [![Upload to AISLER](https://img.shields.io/badge/Upload_to_-AISLER-ff8000?style=plastic)](https://aisler.net/p/new?url=https://raw.githubusercontent.com/islandcontroller/jtag-wire-adapter/master/pcb/jtag-wire-adapter.kicad_pcb\u0026ref=github)\r\n\r\nA compact adapter board for connecting SEGGER J-Link debug probes to generic JTAG/SWD targets using a set of flying wires.\r\n\r\n\u003cp align=\"center\"\u003e\u003cimg src=\"doc/photo.png\" /\u003e\u003c/p\u003e\r\n\r\nView [**Schematic**](doc/sch_jtag-wire-adapter_rev1.pdf) \u0026#128196; or [**PCB Preview**](https://htmlpreview.github.io/?https://github.com/islandcontroller/jtag-wire-adapter/blob/master/doc/ibom.html) \u0026#127760;.\r\n\r\n### Key features\r\n\r\n* Snug-fit debug probe connector\r\n* .100\" pin header for flying wire connection\r\n* Signal assignment printed on silk screen\r\n\r\nInterested? Click the button below to push this project to AISLER and get your PCB fabricated.\r\n\r\n\u003cp align=\"center\"\u003e\u003ca href=\"https://aisler.net/p/new?url=https://raw.githubusercontent.com/islandcontroller/jtag-wire-adapter/master/pcb/jtag-wire-adapter.kicad_pcb\u0026ref=github\"\u003e\u003cimg src=\"https://img.shields.io/badge/AISLER-Order%20PCBs-orange?style=for-the-badge\"/\u003e\u003c/a\u003e\u003c/p\u003e\r\n\r\n## Overview\r\n\r\nThis adapter can be used to interface a SEGGER J-Link debug probe to a generic JTAG or SWD target, using .1\" *DuPont*-style jumper wires. This low cost solution can be especially useful for academic users of J-Link EDU probes, as it doesn't require special connector hardware to be fitted on target project boards.\r\n\r\n## BOM\r\n\r\nThe parts are generic and can be found pretty much anywhere on the internet.\r\n\r\n| Designator | Description                                             |\r\n|------------|---------------------------------------------------------|\r\n| `J1`       | Right-angle socket header, 2x10 contacts, .100\" spacing\u003cbr\u003eSuggested: `SFH11-PBPC-D10-RA` (Digikey [`S9205-ND`](https://www.digikey.de/de/products/detail/sullins-connector-solutions/SFH11-PBPC-D10-RA-BK/1990098)) |\r\n| `J2`       | Right-angle pin header, 1x7 contacts, .100\" spacing     |\r\n\r\n## Design Review and Validation\r\n\r\nPrototype PCBs were fabricated in the EU at [**AISLER B.V.**](https://aisler.net/) using their integrated KiCad plugin. See [photos](#photos) for further details.\r\n\r\n* The selected stacked-row header seems to be *just* short enough to accidentally fit with a column offset. A wider connector should be selected to prevent wrong connection.\r\n\r\n  * The \"original\" connector as used on other adpters is a *Sullins Connector Solutions* `SFH11-PBPC-D10-RA` (available from Digikey as [`S9205-ND`](https://www.digikey.de/de/products/detail/sullins-connector-solutions/SFH11-PBPC-D10-RA-BK/1990098)).\r\n\r\nA tool compatibility test was performed using a SEGGER J-Link\u003csup\u003eEDU\u003c/sup\u003e emulator and a \"blue pill\"-type STM32 board.\r\n\r\n## Photos\r\n\r\n\u003cp align=\"center\"\u003e\u003ca href=\"doc/pcb1.jpg\"\u003e\u003cimg src=\"doc/pcb1_preview.png\"/\u003e\u003c/a\u003e\u003ca href=\"doc/pcb2.jpg\"\u003e\u0026ensp;\u0026nbsp;\u0026ensp;\u003cimg src=\"doc/pcb2_preview.png\"/\u003e\u003c/a\u003e\u003c/p\u003e\r\n\u003cp align=\"center\"\u003e\u003cimg src=\"doc/parts.png\" /\u003e\u003c/p\u003e\r\n\r\n## Licensing\r\n\r\nIf not stated otherwise within the specific file, the contents of this project are licensed under the CERN Open Hardware Licence Version 2 - Permissive. The full license text is provided in the [`LICENSE`](LICENSE) document.\r\n\r\n        SPDX-License-Identifier: CERN-OHL-P-2.0\r\n\r\nThis licensing model is compliant with the [Open Source Hardware Definition 1.0](https://www.oshwa.org/definition/).","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fislandcontroller%2Fjtag-wire-adapter","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fislandcontroller%2Fjtag-wire-adapter","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fislandcontroller%2Fjtag-wire-adapter/lists"}