{"id":40497349,"url":"https://github.com/itay2805/esp32-microkernel","last_synced_at":"2026-01-20T19:00:48.808Z","repository":{"id":54071600,"uuid":"488729584","full_name":"Itay2805/esp32-microkernel","owner":"Itay2805","description":"A microkernel for ESP32 targeting TTGO T-Watch-2020-V2","archived":false,"fork":false,"pushed_at":"2022-08-20T10:11:35.000Z","size":237,"stargazers_count":6,"open_issues_count":0,"forks_count":0,"subscribers_count":2,"default_branch":"master","last_synced_at":"2023-02-27T17:05:51.464Z","etag":null,"topics":["esp32","microkernel","ttgo","twatch"],"latest_commit_sha":null,"homepage":"","language":"C","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/Itay2805.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2022-05-04T20:09:09.000Z","updated_at":"2022-09-24T08:39:51.000Z","dependencies_parsed_at":"2022-08-13T06:30:47.475Z","dependency_job_id":null,"html_url":"https://github.com/Itay2805/esp32-microkernel","commit_stats":null,"previous_names":[],"tags_count":null,"template":null,"template_full_name":null,"purl":"pkg:github/Itay2805/esp32-microkernel","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Itay2805%2Fesp32-microkernel","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Itay2805%2Fesp32-microkernel/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Itay2805%2Fesp32-microkernel/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Itay2805%2Fesp32-microkernel/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/Itay2805","download_url":"https://codeload.github.com/Itay2805/esp32-microkernel/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Itay2805%2Fesp32-microkernel/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28609550,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-01-20T18:56:40.769Z","status":"ssl_error","status_checked_at":"2026-01-20T18:54:26.653Z","response_time":117,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.5:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["esp32","microkernel","ttgo","twatch"],"created_at":"2026-01-20T19:00:24.241Z","updated_at":"2026-01-20T19:00:48.631Z","avatar_url":"https://github.com/Itay2805.png","language":"C","funding_links":[],"categories":[],"sub_categories":[],"readme":"# ESP32 Microkernel for TTGO T-Watch-2020-V2\n\nThis is a protected microkernel designed to run baremetal on an ESP32 with the main target \nbeing the TTGO T-Watch-2020-V2.\n\nThis projects has multiple aims:\n- test if the ESP32 can run a proper microkernel at all\n- have a simple yet usable Xtensa/ESP32 baremetal example\n\n## Wait.. what? how?\n\nIn brief, the ESP32 we have runs a dual core Xtensa CPU, the CPU itself\nhas no built-in memory or instruction protections, there is no concept of\nuserspace or rings.\n\nSo how can we even make a protected microkernel? well the ESP32 does provide an \nMMU in the SoC itself, that MMU does allow for both protections and translation of \nvirtual address range to a physical one. In addition it uses a PID controller \nthat can be used to switch between PIDs.\n\nThe combination of the MMU and PID controller allows us to protect the kernel\nmemory, the system resources, and DMA access of all the devices in the system. \nEssentially allowing to prevent escalation from a user process to the kernel.\n\nIt is worth noting that the MMU also prevents user code from modifying its own \ncode, so self modifying code is not allowed.\n\nBut what about interrupts? In Xtensa interrupts go through the vecbase, and because\nwe have no userspace the user can change it! well, thankfully the esp32 does provide\na way to protect specifically the vecbase! The dport can change it so the CPU will take\nthe vecbase from the dport instead from the internal register! Additionally we configure\nthe pid controller to switch to our kernel mode when a fetch from the vecbase is made.\n\nFor more indepth information it is the best to look at the code.\n\n## How to build\n\nCurrently, I only support building from linux.\n\nYou will need the following python dependencies:\n* `esptool`\n* `littlefs-python`\n* `tqdm`\n\nFirst you will need to get the toolchain:\n```shell\nmake fetch-toolchain\n```\n\nThen you can simply run\n```shell\nmake\n```\n\nThis will build a full system image that can be used under `out/image.bin`\n\nTo test run you can use (note that this will also build if needed), note that you might need to run this as \nroot if you don't have permission to use the serial device directly.\n```shell\nmake run\n```\n\nIf you want to use qemu then you will need to build it first \n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fitay2805%2Fesp32-microkernel","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fitay2805%2Fesp32-microkernel","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fitay2805%2Fesp32-microkernel/lists"}