{"id":21619387,"url":"https://github.com/jiahaoxiang2000/bitsliced_optimize","last_synced_at":"2025-03-18T18:20:45.993Z","repository":{"id":239139503,"uuid":"798657270","full_name":"jiahaoxiang2000/bitsliced_optimize","owner":"jiahaoxiang2000","description":"Optimal Low-Latency Implementation of Bitsliced SPN-Cipher on 32-bit Processors","archived":false,"fork":false,"pushed_at":"2024-11-21T05:34:47.000Z","size":58,"stargazers_count":0,"open_issues_count":0,"forks_count":0,"subscribers_count":1,"default_branch":"main","last_synced_at":"2024-11-24T23:08:52.073Z","etag":null,"topics":["cipher","embedded-systems","implementation"],"latest_commit_sha":null,"homepage":"","language":"Jupyter Notebook","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/jiahaoxiang2000.png","metadata":{"files":{"readme":"readme.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2024-05-10T08:08:07.000Z","updated_at":"2024-11-21T05:34:50.000Z","dependencies_parsed_at":"2024-05-15T18:18:28.654Z","dependency_job_id":"fb18fe11-5d99-4cdc-be48-8dbaa3f5201e","html_url":"https://github.com/jiahaoxiang2000/bitsliced_optimize","commit_stats":null,"previous_names":["jiahaoxiang2000/bitsliced_optimize"],"tags_count":0,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/jiahaoxiang2000%2Fbitsliced_optimize","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/jiahaoxiang2000%2Fbitsliced_optimize/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/jiahaoxiang2000%2Fbitsliced_optimize/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/jiahaoxiang2000%2Fbitsliced_optimize/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/jiahaoxiang2000","download_url":"https://codeload.github.com/jiahaoxiang2000/bitsliced_optimize/tar.gz/refs/heads/main","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":235510052,"owners_count":19001650,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["cipher","embedded-systems","implementation"],"created_at":"2024-11-24T23:08:54.212Z","updated_at":"2025-01-24T21:28:45.748Z","avatar_url":"https://github.com/jiahaoxiang2000.png","language":"Jupyter Notebook","funding_links":[],"categories":[],"sub_categories":[],"readme":"# Optimal Low-Latency Implementation of Bitsliced SPN-Cipher on 32-bit Processors\n\nThis repository contains the implementation and evaluation framework for optimizing bitsliced SPN-cipher implementations on 32-bit processors like ARM Cortex-M4. The work focuses on both theoretical optimization techniques and practical performance evaluation.\n\n## Contents\n\nThe project consists of three main components:\n\n- `non-linear-layer`: Implementation of a novel S-box optimization technique using the Bit-slice Gate Complexity (BGC) model that improves the efficiency of the non-linear substitution layer.\n- `linear-layer`: Implementation of the Optimization of Permutation Operations (OPO) algorithm for optimizing the linear permutation layer. The key implementation is in [optimize_permutation.ipynb](linear-layer/optimize_permutation.ipynb).\n- `LCB`: A comprehensive benchmarking framework for evaluating lightweight block cipher implementations on microcontrollers. Contains the experimental data and performance measurements discussed in the paper.\n\n## Getting Started\n\n- See `non-linear-layer/readme.md` for S-box optimization\n- See `linear-layer/readme.md` for permutation optimization\n- See `LCB/README.md` for performance evaluation framework\n\n## Tested Platforms\n\nThe optimizations target 32-bit microcontroller platforms:\n\n- ARM Cortex-M4 based boards (STM32L475)\n- ESP32-S3 based boards\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fjiahaoxiang2000%2Fbitsliced_optimize","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fjiahaoxiang2000%2Fbitsliced_optimize","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fjiahaoxiang2000%2Fbitsliced_optimize/lists"}