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reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["eagle","eurorack-diy","golang"],"created_at":"2026-01-28T13:32:35.747Z","updated_at":"2026-01-28T13:32:35.868Z","avatar_url":"https://github.com/jsleeio.png","language":"Go","funding_links":[],"categories":[],"sub_categories":[],"readme":"# overview\n\nThis repository contains code and tools for interacting with Autodesk Eagle\nfiles, and particularly for creating Eagle board files that can be used to\nmanufacture front panels for electronics. Originally this was intended for\nEurorack synthesizer systems, but now also has crude support for custom\nenclosures, such as the ubiquitous plastic \"jiffy boxes\".\n\nAt present, the below tools are included:\n\n* `panelgen`: create a new blank panel board file\n* `go-eagle`: derive a new panel board file from the board file for your circuit\n\nThe below panel formats are supported:\n\n* Eurorack 3U, per Doepfer spec\n* Pulplogic 1U, per Pulplogic spec\n* Intellijel 1U, per Intellijel spec\n* custom enclosure specs defined in a YAML file\n\n# installing (releases)\n\nGrab one of the prebuilt binaries from the release page if there is one for\nyour operating platform. If not...\n\n# installing (source)\n\nFirstly, install a Golang toolchain and `git`. Then...\n\n```\n$ git clone git@github.com:jsleeio/go-eagle.git\n$ go build\n$ go build ./cmd/panelgen\n```\n\n# go-eagle (formerly named 'schroff')\n\n`go-eagle` is used for deriving\n[Eurorack module front panels](http://www.doepfer.de/a100_man/a100m_e.htm)\nfrom the Eagle board file for the module's actual circuitry. That is, you\ndesign your module's circuit board in Eagle, and then `go-eagle` examines the\nboard file to discover:\n\n* which circuit components (potentiometers, jacks, LEDs, etc) require panel drill holes\n* the size of any such drill holes (via the component's `PANEL_DRILL_MM` attribute)\n* where the holes should be placed (via the component's origin coordinates)\n* where the legend text should be placed (via the component's origin coordinates, and optional offset)\n* header text to be placed in silkscreen at the top of the panel (via the board's `PANEL_HEADER_TEXT` attribute)\n* footer text to be placed in silkscreen at the bottom of the panel (via the board's `PANEL_FOOTER_TEXT` attribute)\n\nComponents that need panel holes must have a `PANEL_DRILL_MM` attribute.\n\n## list of global and component attributes\n\nattribute name                    | type      | default value    | purpose\n--------------------------------- | --------- | ---------------- | --------------------------------------------------------------------\n`PANEL_HEADER_LAYER`              | global    | `tStop`          | layer to place header text on\n`PANEL_HEADER_OFFSET_X`           | global    | `0.0`            | nudge panel header text left or right (millimetres)\n`PANEL_HEADER_OFFSET_Y`           | global    | `0.0`            | nudge panel header text up or down (millimetres)\n`PANEL_HEADER_TEXT`               | global    | `\u003cHEADER_TEXT\u003e`  | text for header section of panel\n`PANEL_FOOTER_LAYER`              | global    | `tStop`          | layer to place footer text on\n`PANEL_FOOTER_OFFSET_X`           | global    | `0.0`            | nudge panel footer text left or right (millimetres)\n`PANEL_FOOTER_OFFSET_Y`           | global    | `0.0`            | nudge panel footer text up or down (millimetres)\n`PANEL_FOOTER_TEXT`               | global    | `\u003cFOOTER_TEXT\u003e`  | text for footer section of panel\n`PANEL_LEGEND_LAYER`              | global    | `tStop`          | layer to place panel legend text on\n`PANEL_LEGEND_SKIP_RE`            | global    | _none_           | [RE2](https://github.com/google/re2/wiki/Syntax) expression; if a component name matches, legend text is skipped\n`PANEL_DRILL_MM`                  | component | _none_           | panel drill size to create for a component. Required for drill holes.\n`PANEL_HOLE_STOP_WIDTH`           | component | `2.0`            | override the width of the stop-mask ring around the component hole\n`PANEL_LEGEND_LOCATION`           | component | `above`          | set to `below` to place the legend text `below` the component instead of `above`\n`PANEL_LEGEND_OFFSET_X`           | component | `0.0`            | nudge panel legend text left or right (millimetres)\n`PANEL_LEGEND_OFFSET_Y`           | component | `0.0`            | nudge panel legend text up or down (millimetres)\n`PANEL_LEGEND_TICKS`              | component | `no`             | set to `yes` to add tick marks around component hole, eg. for potentiometers\n`PANEL_LEGEND_TICKS_COUNT`        | component | `11`             | number of ticks to draw\n`PANEL_LEGEND_TICKS_END_ANGLE`    | component | `240.0`          | ending polar angle to which to draw ticks, in degrees. Zero degrees is at 9 o'clock\n`PANEL_LEGEND_TICKS_LENGTH`       | component | `1.5`            | length of ticks\n`PANEL_LEGEND_TICKS_LABELS`       | component | `no`             | set to `yes` to add text labels next to tick marks\n`PANEL_LEGEND_TICKS_LABELS_TEXTS` | component | _none_           | labels for tick marks, separated with `,`. Quantity must match `PANEL_LEGEND_TICKS_COUNT`\n`PANEL_LEGEND_TICKS_START_ANGLE`  | component | `-60.0`          | starting polar angle from which to draw ticks, in degrees. Zero degrees is at 9 o'clock\n`PANEL_LEGEND_TICKS_WIDTH`        | component | `0.25`           | width of ticks\n`PANEL_LEGEND`                    | component | _component name_ | override panel legend text for a component\n\n## commandline options\n\n```\n$ ./go-eagle --help\nUsage of ./go-eagle:\n  -format string\n    \tpanel format to create (eurorack, pulplogic, intellijel) (default \"eurorack\")\n  -hole-stop-radius float\n    \tRadius to pull back soldermask around a hole (default 2)\n  -text-size float\n    \tlabel text size (default 2.25)\n  -text-spacing float\n    \tspacing between a hole and its related label (default 3.5)\n```\n\n## generating board files\n\nTo generate a panel board file:\n\n```\n$ go-eagle morphlag-rev2.brd\n2019/06/02 17:48:17 FALL: found PANEL_DRILL_MM attribute with value 7\n2019/06/02 17:48:17 IN: found PANEL_DRILL_MM attribute with value 6\n2019/06/02 17:48:17 OUT: found PANEL_DRILL_MM attribute with value 6\n2019/06/02 17:48:17 OUTPOL: found PANEL_DRILL_MM attribute with value 6\n2019/06/02 17:48:17 RISE: found PANEL_DRILL_MM attribute with value 7\n2019/06/02 17:48:17 SHAPE: found PANEL_DRILL_MM attribute with value 7\n2019/06/02 17:48:17 SW1: found PANEL_DRILL_MM attribute with value 4.5\n2019/06/02 17:48:17 POLARIZE: found PANEL_DRILL_MM attribute with value 7\n2019/06/02 17:48:17 OUTINV: found PANEL_DRILL_MM attribute with value 6\n2019/06/02 17:48:17 MANUAL: found PANEL_DRILL_MM attribute with value 7.5\n```\n\nThe output panel file takes the name of the input file and adds the suffix `.panel.brd`:\n\n```\n$ ls -l wavolver2-rev1.brd.panel.brd\n-rw-r--r--  1 jslee  staff  17912 28 Apr 17:02 wavolver2-rev1.brd.panel.brd\n```\n\n## compatibility\n\nAt present the generated board files load just fine in Eagle 9.3.2+ (probably\nmany earlier versions also!) but are _not_ accepted by\n[OSHPark](https://oshpark.com/)'s Eagle board loader.  I'm not sure why this\nis, but it's most likely *not* OSHPark's fault, so please *don't* complain to\nthem if you try to use this. Just generate some Gerber files instead.\n\n## custom panel specifications\n\nThese are now supported by `panelgen` and `go-eagle`, and are defined in YAML\nfiles that look like the below:\n\n    name: testEnclosure\n    width: 100.0\n    height: 75.0\n    horizontalFit: 0.0\n    cornerRadius: 0.0\n    mountingHoleDiameter: 3.1\n    mountingHoles:\n      - { x: 10, y: 10 }\n      - { x: 90, y: 10 }\n      - { x: 10, y: 65 }\n      - { x: 90, y: 65 }\n\nUsage wth `panelgen`:\n\n    $ ./panelgen -format=spec -spec-file=enclosures/spec-test.yaml \\\n      -reference-board=data/ref.brd -output=test.brd\n\nUsage with `go-eagle`:\n\n    $ ./go-eagle -format=spec -spec-file=enclosure.yaml test.brd\n\nThis is extremely preliminary at present.\n\n# panelgen\n\n`panelgen` is used for creating new, blank panels in Eurorack, Pulplogic 1U or\nIntellijel 1U formats. An existing Eagle board file is required in order to\nderive the desired set of Eagle layer information. This can be any Eagle board\nfile.\n\nDemonstration usage, creating a 6hp Pulplogic tile:\n\n```\n$ ./panelgen -format=pulplogic -reference-board=data/ref.brd -output=mytile.brd -width=6\n```\n\n## commandline options\n\n```\n$ ./panelgen -help\nUsage of ./panelgen:\n  -format string\n    \tpanel format to create (eurorack,pulplogic,intellijel,spec) (default \"eurorack\")\n  -outline-layer string\n    \tlayer to draw board outline in (default \"Dimension\")\n  -output string\n    \tfilename to write new Eagle board file to (default \"newpanel.brd\")\n  -reference-board string\n    \treference Eagle board file to read layer information from\n  -spec-file string\n    \tfilename to read YAML panel spec from\n  -width int\n    \twidth of the panel, in integer units appropriate for the format (default 4)\n```\n\n\n# to-do\n\n* exhaustively scan the Eagle DTD and add the various missing items (libraries!)\n* BOM generation tool\n* custom panel format should support defining a list of keepouts in at least\n  rectangular and circular shapes\n* a tool to generate an Eagle library for a custom enclosure, including keepouts\n  and cutouts features inside the case, and a Dimension layer outline. This\n  would be useful for a layout quick-start on the PCB to go inside the enclosure\n\n# copyright\n\nCopyright 2021 John Slee \u003cjslee@jslee.io\u003e.\n\nPermission is hereby granted, free of charge, to any person obtaining a copy of\nthis software and associated documentation files (the \"Software\"), to deal in\nthe Software without restriction, including without limitation the rights to\nuse, copy, modify, merge, publish, distribute, sublicense, and/or sell copies\nof the Software, and to permit persons to whom the Software is furnished to do\nso, subject to the following conditions:\n\nThe above copyright notice and this permission notice shall be included in all\ncopies or substantial portions of the Software.\n\nTHE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\nIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\nFITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE\nAUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\nLIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\nOUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\nSOFTWARE.\n\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fjsleeio%2Fgo-eagle","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fjsleeio%2Fgo-eagle","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fjsleeio%2Fgo-eagle/lists"}