{"id":19879368,"url":"https://github.com/jubayer98/design-simulate-a-mips-32-bit-cpu-using-logisim","last_synced_at":"2026-02-07T04:30:56.948Z","repository":{"id":127510952,"uuid":"134098948","full_name":"jubayer98/Design-Simulate-A-MIPS-32-Bit-CPU-Using-Logisim","owner":"jubayer98","description":"The project involves implementing a subset of the MIPS 32-bit architecture using Logisim, specifically focusing on a 32-bit pipelined version of the MIPS architecture. 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The project aims to implement a 32-bit pipelined version of the MIPS architecture to execute basic MIPS instructions.\n\n## Description\n\nThe MIPS (Microprocessor without Interlocked Pipeline Stages) architecture is a RISC (Reduced Instruction Set Computing) architecture that is widely used in academic settings to teach CPU design. This project focuses on designing the datapath and control units of a MIPS CPU, implementing a pipelined architecture to enhance instruction execution efficiency.\n\n## Tools and Requirements\n\n- **Logisim:** A graphical tool for designing and simulating digital logic circuits.\n  - Download and install Logisim from the [official website](http://www.cburch.com/logisim/).\n\n## Features\n\n- **32-Bit Pipelined MIPS CPU:** A complete design and simulation of a pipelined MIPS CPU.\n- **Instruction Set:** Supports a subset of MIPS instructions for basic operations.\n- **Modular Design:** The CPU is designed using modular components for better understanding and scalability.\n- **Datapath and Control Units:** Detailed design of the datapath and control units to handle instruction execution.\n\n## Getting Started\n\n### Prerequisites\n\nEnsure you have Logisim installed on your system.\n\n### Installation\n\n1. **Clone the Repository:**\n   ```bash\n   git clone https://github.com/jubayer98/Design-Simulate-A-MIPS-32-Bit-CPU-Using-Logisim.git\n   cd Design-Simulate-A-MIPS-32-Bit-CPU-Using-Logisim\n   ```\n\n2. **Open in Logisim:**\n   - Launch Logisim.\n   - Open the project file (`cpu.circ`) in Logisim.\n\n## Usage\n\n1. **Simulation:**\n   - Once the project is open in Logisim, start the simulation by clicking on the \"Simulate\" menu and selecting \"Ticks Enabled\".\n   - Load the machine code into the instruction memory and observe the execution of instructions through the pipeline stages.\n\n2. **Customization:**\n   - The modular design allows you to modify and extend the CPU easily.\n   - You can add more instructions or optimize the pipeline stages for better performance.\n\n## How It Works\n\n### Example\n\nLet's consider an example of adding two numbers:\n\n- **C Code:**\n  ```c\n  A = B + C;\n  ```\n\n- **Assembly Code:**\n  ```assembly\n  add a, b, c  # a is the sum of b and c\n  ```\n\n- **Machine Code:**\n  ```binary\n  000000 10001 10010 01000 00000 100000\n  ```\n\n### Datapath\n\nThe datapath of the MIPS CPU includes the following components:\n\n- **Program Counter (PC):** Holds the address of the next instruction to be executed.\n- **Instruction Memory:** Stores the instructions to be executed.\n- **Register File:** Contains the general-purpose registers for storing operands and results.\n- **ALU (Arithmetic Logic Unit):** Performs arithmetic and logical operations.\n- **Data Memory:** Stores data that is read from or written to by the instructions.\n- **Pipeline Registers:** Store intermediate values between pipeline stages.\n\n### Control Unit\n\nThe control unit generates the necessary control signals to coordinate the operations of the datapath components. It ensures that instructions are executed correctly through the pipeline stages.\n\n## Contributing\n\nContributions are welcome! If you have ideas for improvements or new features, feel free to open an issue or submit a pull request.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fjubayer98%2Fdesign-simulate-a-mips-32-bit-cpu-using-logisim","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fjubayer98%2Fdesign-simulate-a-mips-32-bit-cpu-using-logisim","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fjubayer98%2Fdesign-simulate-a-mips-32-bit-cpu-using-logisim/lists"}