{"id":51262460,"url":"https://github.com/k0nnect/chronos-bt","last_synced_at":"2026-06-29T13:01:33.776Z","repository":{"id":363198395,"uuid":"1261958531","full_name":"k0nnect/chronos-bt","owner":"k0nnect","description":"hardware accelerated hft backtesting framework that evaluates market making strategies using a custom c++20 discrete-event loop running at sub-100 nanosecond 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chronosBT - hft backtester with hardware acceleration\n\nan ultra low latency high-frequency trading backtester built around a\ncache-friendly limit order book in c++20, with a simulated fpga feature-extraction\npipeline described in systemverilog \u0026 bridged to the software engine over a\nmodelled axi-stream / pcie interface.\n\n## architecture\n\n```mermaid\nflowchart LR\n    %% ── watermark ───────────────────────────────\n    BRAND[\"\u003cb\u003e⏱ chronos-bt\u003c/b\u003e\u003cbr/\u003ehardware-accelerated hft backtester\u003cbr/\u003e— c. jagdeo —\u003cbr/\u003egithub.com/k0nnect/chronos-bt\"]\n    click BRAND href \"https://github.com/k0nnect/chronos-bt\" \"chronos-bt · c. jagdeo\" _blank\n    BRAND ~~~ feed\n\n    subgraph feed[\"phase 2 · feed pipeline\"]\n        direction TB\n        GEN[\"synthetic generator\u003cbr/\u003e(itch-like wire bytes)\"]\n        PCAP[\"offline pcap reader (phase 5)\u003cbr/\u003emmap · eth → ip → udp (zero-copy)\"]\n        PARSE[\"zero-copy parser\u003cbr/\u003eframe_cursor · decode\"]\n        RING[\"lock-free spsc ring\u003cbr/\u003e(feed thread → engine thread)\"]\n        GEN --\u003e PARSE --\u003e RING\n        PCAP --\u003e PARSE\n    end\n\n    subgraph book[\"phase 1 · l3 order book\"]\n        direction TB\n        BOOK[\"flat tick-indexed levels\u003cbr/\u003eintrusive fifo queues · O(1) id map\"]\n        ANALYTICS[\"spread · mid · micro-price\u003cbr/\u003eorder-flow imbalance\"]\n        BOOK --\u003e ANALYTICS\n    end\n\n    subgraph engine[\"phase 3 · backtest engine\"]\n        direction TB\n        APPLY[\"apply event\u003cbr/\u003e+ queue-consumption signal\"]\n        FILL[\"queue-aware fill model\u003cbr/\u003elatency · partials · fees\u003cbr/\u003e+ market impact (temp · perm · adverse selection)\"]\n        ALPHA[\"alpha engine (phase 6)\u003cbr/\u003eq.16 multi-level obi · kalman filter\"]\n        STRAT[\"crtp strategies\u003cbr/\u003emicro-price · statistical mm\"]\n        METRICS[\"metrics\u003cbr/\u003ep\u0026l · drawdown · sharpe\"]\n        APPLY --\u003e FILL --\u003e STRAT\n        ALPHA --\u003e STRAT\n        FILL --\u003e METRICS\n    end\n\n    subgraph hw[\"phase 4 · fpga accelerator (verilator cosim)\"]\n        direction TB\n        AXI[\"axi4-stream bridge\u003cbr/\u003e128b in / 64b out\"]\n        RTL[\"feature_extractor.sv\u003cbr/\u003efrac divider · micro-price · imbalance\"]\n        REF[\"bit-exact reference\u003cbr/\u003e(golden Q16.16 model)\"]\n        AXI --\u003e RTL\n        RTL -.-\u003e|rtl == reference| REF\n    end\n\n    subgraph viz[\"phase 5 · replay dashboard\"]\n        direction TB\n        TRACE[\"jsonl trace logger\u003cbr/\u003ebook · pnl · alpha state\"]\n        DASH[\"react / vite dashboard\u003cbr/\u003edepth · pnl · ticker · playback\"]\n        TRACE --\u003e DASH\n    end\n\n    RING --\u003e|market_event| APPLY\n    APPLY --\u003e|book mutations| BOOK\n    BOOK --\u003e|top-of-book snapshot| STRAT\n    BOOK --\u003e|multi-level snapshot| ALPHA\n    STRAT --\u003e|orders via gateway| FILL\n    METRICS --\u003e|per-tick snapshot| TRACE\n    BOOK ==\u003e|book-update beat| AXI\n    REF -.-\u003e|features ≈ order_book| ANALYTICS\n\n    %% ── styling ─────────────────────────────────────────\n    classDef brand fill:#0d1117,stroke:#1f6feb,stroke-width:1.5px,color:#e6edf3;\n    class BRAND brand;\n```\n\n## status\n\n| phase | scope | state |\n|------:|-------|-------|\n| 1 | core data structures + software l3 order book | done |\n| 2 | binary feed handler (itch-like) + spsc ring buffer | done |\n| 3 | backtest engine, strategy api, fill simulation + market impact | done |\n| 4 | systemverilog feature engine + verilator cosim bridge | done |\n| 5 | offline pcap replay + jsonl trace + react/vite replay dashboard | done |\n| 6 | statistical maker: q.16 alpha engine + inventory-aware quoting | done |\n\n## layout\n\n```\ninclude/hft/        public headers (header-only core)\n  core/             fixed-width types, cache helpers, compiler intrinsics,\n                    byte-order helpers, memory pool\n  book/             price level, order-id index map, l3 order book, event apply\n  feed/             wire protocol, zero-copy parser, spsc ring, feed handler,\n                    synthetic market generator, pcap structures + mmap reader\n  engine/           multi-level book-update snapshot, crtp strategy + order\n                    gateway, queue-aware fill model, fixed-point market-impact\n                    model, metrics, backtest engine\n  signals/          q.16 alpha engine (multi-level obi + constant-gain filter)\n  strategies/       micro-price maker, statistical (alpha + inventory) maker\n  metrics/          jsonl trace logger + strategy trace-extras\nhardware/           systemverilog accelerator + verilator cosim\n  rtl/              frac divider, micro-price, volume-imbalance, feature_extractor,\n                    axi-stream interface\n  dpi/              fixed-point reference + verilated-model c++ wrapper\n  tb/               systemverilog testbench + c++ cosim cross-check\nsrc/                executables / translation units (drivers, pcap reader,\n                    statistical-maker library)\ntests/              assert-based unit tests (no external framework)\nbench/              standalone micro-benchmarks\nfrontend/           vite + react + typescript replay dashboard (tailwind, recharts)\ncmake/              shared compiler/optimisation flags\nscripts/            build helpers\ndata/               captured / synthetic market data\n```\n\n## the order book\n\nphase 1 implements an l3 (per-order) book optimised for the hot path:\n\n- **prices are integer ticks.** each side owns a flat, directly-indexed array of\n  price levels over a fixed band, so tick → level is one subtraction.\n- **resting orders live in a pre-reserved object pool** and are threaded into\n  per-level fifo queues with intrusive 32-bit links, preserving time priority.\n- **order-id → slot lookup** is an open-addressing flat map; cancels and\n  executes are O(1).\n- **best bid/ask are cached indices**, rescanned over contiguous memory only\n  when a top level empties.\n- **zero heap allocation, no locks and no exceptions on add / cancel / execute.**\n\nanalytics computed directly from level aggregates: spread, mid, size-weighted\nmicro-price, and multi-level order-flow imbalance — the same quantities the\nphase 4 fpga engine will compute in hardware.\n\n## the feed pipeline\n\nphase 2 turns a raw binary market-data stream into book mutations:\n\n- **wire protocol** — an itch-like binary format: a 2-byte big-endian length\n  prefix per frame, then a fixed width big-endian message body (add / execute /\n  cancel / delete / replace / trade). packed structs pin the on-wire sizes.\n- **zero-copy parser** — `frame_cursor` walks the buffer handing back body\n  pointers without copying; `decode` reads fields with `load_be` straight into a\n  normalized `market_event`. alignment-safe, strict-aliasing-safe, and resilient\n  to a truncated trailing frame (it stops and reports bytes consumed).\n- **lock-free spsc ring** — wait-free single-producer/single-consumer queue with\n  head/tail on separate cache lines and per-side cached indices, so the common\n  case never reads the contended atomic. it is the wire between the feed thread\n  and the engine thread.\n- **feed handler** — drives bytes → events → a sink (a vector in tests, the ring\n  in the live path), tracking parsed / malformed / consumed counters.\n- **synthetic generator** — produces a deterministic, internally consistent itch\n  stream and reports the exact resting-order count the book must hold after\n  replay, which the integration test asserts against.\n\nrepresentative single-machine throughput (release, `-O3 -march=native`): decode\n~3.5 ns/msg (~8 GB/s), cross-thread ring hop ~25 ns, full feed→ring→book pipeline\n~70 ns/event. run `./build/bench_feed` to reproduce.\n\n## the backtest engine\n\nphase 3 is the trading loop: events become book mutations, simulated fills,\nstrategy decisions and metrics, with no virtual dispatch and no hot-path\nallocation.\n\n- **crtp strategy** — strategies derive from `strategy\u003cDerived\u003e`; the engine\n  dispatches `on_market_event` / `on_book_update` / `on_order_fill` through a\n  `static_cast`, never a vtable. orders flow back through a concrete\n  `order_gateway` (a fixed staging buffer the engine drains each tick), so the\n  strategy stays decoupled from the book/fill-model types.\n- **queue-position-aware fill model** — our orders are not inserted into the\n  feed-driven book (that would corrupt replay); instead each working order tracks\n  the real volume resting ahead of it and only fills once that queue trades out.\n  models tick-to-trade latency, partial fills, marketable/market taker sweeps\n  across levels, and maker/taker fees (negative maker bp = rebate).\n- **market-impact model** (optional, off by default) — when enabled the fill model\n  stops treating liquidity as free and static: taker sweeps pay temporary slippage,\n  leave a decaying permanent skew on the fair mid, and degrade the queue position of\n  our own resting orders. see below.\n- **metrics engine** — O(1) per update, no trade history: signed average-cost\n  realized/unrealized p\u0026l, fees, position, peak inventory, max drawdown, and a\n  welford accumulator for a sharpe estimate.\n- **backtest engine** — resolves each event's queue-consumption signal from the\n  pre-mutation book, applies it, ticks the fill model, delivers fills to strategy\n  and metrics, hands the strategy a fresh top-of-book snapshot, and marks to\n  market — all templated on the concrete book and strategy.\n- **sample strategy** — a micro-price market maker that joins the inside, leans\n  on micro-price/imbalance to withdraw from the side about to be run over, and\n  respects a hard inventory cap. run `./build/micro_price_mm`.\n\n## market impact\n\nby default the fill model assumes idealized liquidity: a taker pays exactly the\ndisplayed price at each level and our own flow never moves the market. that flatters\npassive edge and ignores the cost of size. set `fill_config::enable_impact` and the\nmodel drives a fixed-point impact accumulator (`engine/market_impact.hpp`) that adds\nthe three textbook execution-cost channels — all in integer Q.16 arithmetic (the same\nFRAC=16 format as the fpga datapath), so the hot path never touches the fpu:\n\n- **temporary impact** — an immediate, level-depletion-**linear** concession charged\n  per taker child fill: taking a whole displayed level costs `temp_coeff` ticks, half\n  the level costs half that. realized taker prices come out strictly worse than the\n  idealized sweep — the direct cost of crossing with size.\n- **permanent impact** — a **square-root participation law**,\n  `skew += perm_coeff · sqrt(filled / rolling_volume)`, signed by aggressor direction\n  (a buy lifts the fair mid, a sell depresses it). the rolling-volume denominator is an\n  ewma of observed trade size, floored so the law is well-defined from the first tick.\n  each event the accumulated skew is multiplied by a `decay` factor in [0,1), so a\n  single trade's footprint relaxes geometrically — the propagator picture, and the\n  channel through which a large execution shows up as measurable price decay on the\n  marks that follow it.\n- **queue degradation (adverse selection)** — our aggressive flow inflates the\n  `queue_ahead` of our own resting passive orders (scaled by the same sqrt-participation\n  term): a footprint of size signals intent and draws faster liquidity ahead of us, so\n  we wait longer for the favourable fills and are left with the toxic ones.\n\nthe math is exact and self-contained: a digit-by-digit integer square root, 128-bit\nintermediate products, and doubles confined to configure time. `test_market_impact`\npins the fixed-point primitives and proves, against the idealized baseline the same\ncode path produces with impact off, that large executions move realized prices,\ndecay the mid, degrade passive fills, and lower marked p\u0026l.\n\n## the statistical market maker\n\nphase 6 replaces the micro-price maker with a depth-aware, inventory-managed\nstrategy that reads multi-level book structure \u0026 smooths it before it quotes.\neverything on the hot path is integer Q.16 fixed point with zero heap allocation;\ndoubles appear only at configure time.\n\n- **alpha engine** (`signals/alpha_engine.hpp`) — two pieces. first a\n  volume-weighted **order-book imbalance** over the top 5 levels of each side, with\n  a linear taper `{5,4,3,2,1}` so flow near the touch (the most predictive) weighs\n  most; the result is signed \u0026 bounded to `[-1,1]`. second a **constant-gain\n  alpha-beta filter** — the steady-state form of a kalman filter that tracks a\n  level \u0026 a velocity with fixed gains, denoising the tick-to-tick obi into a stable\n  alpha with two state words, two multiplies \u0026 two adds per update (no history, no\n  allocation). the multi-level depth it needs rides along on the engine's\n  `book_update` snapshot, so the strategy never re-walks the book.\n- **quoting** (`strategies/statistical_mm.hpp`) — from the filtered alpha \u0026 its own\n  inventory the maker derives two integer controls. **skew** shifts the quote\n  center: lean *with* the predicted move (alpha) to earn the drift, lean *against*\n  inventory to mean-revert position risk back toward flat. **width** widens the\n  half-spread when `|alpha|` or `|inventory|` is large — strong alpha means the\n  resting side is about to be adversely selected (exactly the toxicity the\n  market-impact module models as permanent skew + queue degradation), so the maker\n  demands more edge before resting there. it never quotes tighter than the touch\n  (a tighter computed price joins the inside; widening steps it out behind the\n  touch), \u0026 a hard position cap stops it quoting a side that would breach the limit.\n- **drivers \u0026 tests** — `test_alpha_engine` pins the obi (sign, bounds,\n  near-level dominance) \u0026 the filter (priming, steady state, monotone tracking);\n  `test_statistical_mm` checks it quotes an uncrossed book, respects the inventory\n  cap, \u0026 skews its center with the alpha. run the full pcap-fed backtest with\n  `./build/stat_mm` (see below).\n\n## offline pcap replay\n\nphase 5 lets the engine consume real captured multicast feeds instead of only the\nsynthetic generator. `feed/pcap_reader.hpp` memory-maps a `.pcap` trace once\n(`PcapReader`, the only translation unit that touches `\u003csys/mman.h\u003e`) \u0026 exposes a\n**zero-copy frame cursor** that peels ethernet → ipv4 → udp off each record \u0026\nhands the raw udp payload — our itch-like stream — straight to the existing\n`itch::decode`, no copy \u0026 no allocation. the cursor advances by exactly the byte\nlength each pcap record header declares, so a non-udp or truncated record is\nskipped cleanly rather than walking off the mapping. `feed/pcap_structures.hpp`\npins every framing layout with `static_assert`s on its wire size.\n\n```sh\n./build/stat_mm                 # synthesizes a pcap, replays it through the maker\n./build/stat_mm capture.pcap    # or replay a real ethernet/ipv4/udp itch capture\n```\n\nwith no argument the driver builds a deterministic capture (wrapping a synthetic\nitch stream in real eth/ip/udp framing), replays it, \u0026 writes `stat_trace.jsonl`.\n`test_pcap` exercises the same path against a hand-built mock savefile, including\nipv4 options, skipped arp/tcp records \u0026 a truncated tail.\n\n## the replay dashboard\n\nphase 5 also ships a visual replay dashboard under `frontend/` — vite + react +\ntypescript, tailwind dark theme. the c++ side streams an append-only **jsonl\ntrace** (`metrics/trace_logger.hpp`): one allocation-free line per logging\ninterval carrying best bid/ask, the top-5 book levels, position \u0026 realized p\u0026l,\nplus an optional `\"a\"` object with the statistical maker's alpha / obi / skew /\ninventory state. the dashboard loads that file \u0026 replays it frame by frame:\n\n- a cumulative **depth ladder** over the top 5 bid/ask levels,\n- a realized **p\u0026l curve** (recharts),\n- a scrolling **execution ticker** (prints derived from position deltas),\n- a **playback controller** (play / pause / speed / scrub) over the trace,\n- a live **obi / alpha** readout when the trace carries strategy state.\n\n```sh\ncd build \u0026\u0026 ./micro_price_mm   # writes ./build/trace.jsonl, or\n./build/stat_mm                # writes ./build/stat_trace.jsonl (with alpha state)\n\ncd frontend \u0026\u0026 npm install \u0026\u0026 npm run dev    # http://localhost:5173\n```\n\nupload a `.jsonl` trace with **upload jsonl**, or hit **load sample** for the\nbundled capture. nothing is uploaded anywhere — parsing is entirely client-side.\n\n## the hardware accelerator\n\nphase 4 offloads feature extraction (micro-price + volume imbalance) to a\nsimulated fpga described in synthesizable systemverilog and co-simulated with\nverilator.\n\n- **fixed-point datapath** — micro-price is computed as\n  `bid + (ask - bid) * weight` with `weight = bid_qty / (bid_qty + ask_qty)`, a\n  proper fraction produced by a pipelined **radix-2 shift/subtract fractional\n  divider** (no inferred `/`). imbalance reuses the same divider on\n  `|bid_qty - ask_qty| / (bid_qty + ask_qty)` with the sign reapplied. both\n  datapaths share a FRAC+3 cycle latency, are fully pipelined (one result/cycle),\n  use strictly non-blocking sequential logic, and carry the `valid` bit through\n  every stage.\n- **axi4-stream** — a 128-bit inbound book-update beat and a 64-bit outbound\n  feature beat, with a standard `tvalid`/`tready`/`tlast` interface.\n- **bit-exact reference** — `hardware/dpi/feature_reference.hpp` is the single\n  source of truth for the fixed-point math; the rtl mirrors it exactly. it is\n  validated against the floating-point `order_book` in `test_feature_golden`\n  (no verilator needed): across ~200k two-sided states the worst error is 3 ulp\n  (micro-price) and 1 ulp (imbalance) of Q16.16.\n- **cosimulation** — `FpgaFeatureEngine` wraps the verilated model and drives its\n  clock, modelling the pipeline latency. `hardware/tb/cosim_check.cpp` streams the\n  phase-2 feed through the rtl and asserts `rtl == reference` bit-for-bit and\n  `reference == order_book` within the ulp window. a systemverilog self-checking\n  testbench (`hardware/tb/tb_feature_extractor.sv`) covers the rtl standalone.\n\n### building the hardware layer\n\nrequires [verilator](https://verilator.org) (5.x recommended). the rest of the\nproject builds and tests without it.\n\n```sh\ncmake -S . -B build -DCMAKE_BUILD_TYPE=Release -DHFT_BUILD_HARDWARE=ON\ncmake --build build -j\nctest --test-dir build -R hardware_cosim --output-on-failure   # rtl vs reference\ncmake --build build --target hardware_lint                     # verilator --lint-only\n./build/bench_hardware                                         # sw vs hw comparison\n\n# run the pure-systemverilog testbench directly:\nverilator --binary --timing -Wall --top-module tb_feature_extractor \\\n  hardware/rtl/axi_stream_if.sv hardware/rtl/frac_divider.sv \\\n  hardware/rtl/micro_price.sv hardware/rtl/volume_imbalance.sv \\\n  hardware/rtl/feature_extractor.sv hardware/tb/tb_feature_extractor.sv\n./obj_dir/Vtb_feature_extractor\n```\n\n## build\n\nrequires cmake ≥ 3.20 and a c++20 compiler (gcc 11+, clang 13+, or msvc 19.3+).\n\n```sh\ncmake -S . -B build -DCMAKE_BUILD_TYPE=Release\ncmake --build build -j\nctest --test-dir build --output-on-failure\n./build/hft_demo\n```\n\n`scripts/build.sh` wraps the same steps. the build produces four drivers —\n`hft_demo` (book demo + micro-benchmark), `micro_price_mm` \u0026 `stat_mm` (full\nbacktests), plus the `bench_feed` micro-benchmark — alongside the unit-test suite.\n\nrelease builds compile with `-O3 -march=native -mtune=native`, link-time\noptimization, and aggressive scalar/vector flags (see `cmake/compilerflags.cmake`).\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fk0nnect%2Fchronos-bt","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fk0nnect%2Fchronos-bt","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fk0nnect%2Fchronos-bt/lists"}