{"id":16160806,"url":"https://github.com/kenny2github/v2mc","last_synced_at":"2025-08-22T14:31:18.411Z","repository":{"id":119867221,"uuid":"604465939","full_name":"Kenny2github/V2MC","owner":"Kenny2github","description":"Synthesize Verilog to Minecraft redstone","archived":false,"fork":false,"pushed_at":"2024-11-09T14:07:53.000Z","size":199,"stargazers_count":14,"open_issues_count":0,"forks_count":1,"subscribers_count":3,"default_branch":"main","last_synced_at":"2025-04-09T07:23:15.470Z","etag":null,"topics":["hdl","minecraft","redstone","verilog","yosys"],"latest_commit_sha":null,"homepage":"","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"gpl-3.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/Kenny2github.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE.txt","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2023-02-21T05:43:12.000Z","updated_at":"2025-03-04T17:07:15.000Z","dependencies_parsed_at":"2024-06-27T09:47:50.324Z","dependency_job_id":"e964b0f3-a448-454c-84ea-d9ce5aa37847","html_url":"https://github.com/Kenny2github/V2MC","commit_stats":{"total_commits":38,"total_committers":1,"mean_commits":38.0,"dds":0.0,"last_synced_commit":"2bfc8a397e30545fa16c3c25b1171ce1e1386acf"},"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/Kenny2github/V2MC","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Kenny2github%2FV2MC","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Kenny2github%2FV2MC/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Kenny2github%2FV2MC/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Kenny2github%2FV2MC/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/Kenny2github","download_url":"https://codeload.github.com/Kenny2github/V2MC/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Kenny2github%2FV2MC/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":271652340,"owners_count":24797049,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","status":"online","status_checked_at":"2025-08-22T02:00:08.480Z","response_time":65,"last_error":null,"robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":true,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["hdl","minecraft","redstone","verilog","yosys"],"created_at":"2024-10-10T02:04:46.755Z","updated_at":"2025-08-22T14:31:18.077Z","avatar_url":"https://github.com/Kenny2github.png","language":"Python","readme":"# Verilog to Minecraft Redstone\nThis project provides Minecraft redstone as a synthesis target for Verilog\n\n## Goal\nFully synthesize all synthesizable Verilog. This includes both combinational and sequential logic - flip-flops and all that jazz.\n\nThis project is purely for technology mapping, placement, routing, or some combination thereof. Analysis \u0026 elaboration of Verilog is done by Yosys, and technology mapping is done with Yosys.\n\n## Dependencies\nThe following must be in your `PATH`:\n* Python 3\n* Yosys 0.47 built with Python support (`make ENABLE_PYOSYS=1 \u0026\u0026 make install`)\n\nWe require pyosys (`python3 setup.py install` at root of Yosys repository, which you should already have from building it) in order to access the Yosys internal representation of RTL designs.\n\nWe require the dependencies in `requirements.txt` in order to manipulate NBT structures.\n\n## I/O Format\nFor input, we take one or more Verilog HDL design files. For output, we produce a Minecraft structure file.\n\n## Technology mapping\nCurrently we map the following [Yosys internal cells](https://yosyshq.readthedocs.io/projects/yosys/en/latest/yosys_internals/formats/cell_library.html#rtl-cells) to custom primitives:\n* `$dff, $sdff, $sdffe` → `MC_DFF31`\n* `$adff, $adffe` → `MC_ADFF31`\n\nRedstone signal strength is the main factor leading to the limitation of `WIDTH` to 31 (15 signal strength, in two directions, separated by a hard-powered block) when any input/output is a number of bits independent of `WIDTH`. The technology mapping process reduces, for example, a 64-bit `$dff` to two 31-bit and one 2-bit `MC_DFF31`s.\n\nAll others we allow `techmap` to map to [Yosys internal gates](https://yosyshq.readthedocs.io/projects/yosys/en/latest/yosys_internals/formats/cell_library.html#gates), which we then map to custom primitives:\n","funding_links":[],"categories":[],"sub_categories":[],"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fkenny2github%2Fv2mc","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Fkenny2github%2Fv2mc","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Fkenny2github%2Fv2mc/lists"}