{"id":18315368,"url":"https://github.com/lefticus/4bitalu","last_synced_at":"2026-02-01T11:33:53.469Z","repository":{"id":209987210,"uuid":"725409738","full_name":"lefticus/4bitalu","owner":"lefticus","description":null,"archived":false,"fork":false,"pushed_at":"2023-12-09T20:34:24.000Z","size":10548,"stargazers_count":5,"open_issues_count":0,"forks_count":0,"subscribers_count":3,"default_branch":"main","last_synced_at":"2025-06-16T11:06:24.935Z","etag":null,"topics":[],"latest_commit_sha":null,"homepage":null,"language":null,"has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/lefticus.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2023-11-30T04:36:01.000Z","updated_at":"2023-12-17T17:44:18.000Z","dependencies_parsed_at":"2023-12-09T21:37:16.912Z","dependency_job_id":null,"html_url":"https://github.com/lefticus/4bitalu","commit_stats":null,"previous_names":["lefticus/4bitalu"],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/lefticus/4bitalu","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lefticus%2F4bitalu","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lefticus%2F4bitalu/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lefticus%2F4bitalu/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lefticus%2F4bitalu/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/lefticus","download_url":"https://codeload.github.com/lefticus/4bitalu/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lefticus%2F4bitalu/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28977318,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-02-01T11:31:13.034Z","status":"ssl_error","status_checked_at":"2026-02-01T11:30:25.558Z","response_time":56,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":[],"created_at":"2024-11-05T16:39:26.638Z","updated_at":"2026-02-01T11:33:53.455Z","avatar_url":"https://github.com/lefticus.png","language":null,"funding_links":[],"categories":[],"sub_categories":[],"readme":"# 4bitalu\n\n[digikey BOM](https://www.digikey.com/en/mylists/list/D8YFZJU3KQ)\n\n## Background\n\nThis project is derived from my ECPE 2504 class that I took at Virginia Tech. The project was submitted on March 18, 1998.\n\nThe goal of the class project was to create a \"Nibble Slice ALU\".\n\nThis was a project that had:\n\n * A 4 bit register (SR Latch Flip-Flop)\n * 4 bit opcode input\n * 4 bit operand input\n\nWe were allowed to use 7400 series TTL logic chips\n\n * 74153 4-bit multiplexers (x2)\n * 74175 Flip-Flop\n * 7483 4-bit adder\n * 7400 Quad NAND (x3)\n\nThe projects were built on breadboards with jumpers, switches, chips provided by the university (no pictures of the original were taken)\n\nRequirements:\n\n* 'A' input is the 4bit flip-flop\n* 'B' input is a 4bit dip switch\n* OpCode is a 4bit dip switch\n* 8 instructions were required\n  1. A \u003c- A (Hold)\n  2. A \u003c- shr A (Shift-Right A)\n  3. A \u003c- A+B (Add B to A)\n  4. A \u003c- A+B+1 (Add B to A + 1)\n  5. A \u003c- A+1 (Increment A)\n  6. A \u003c- A' (Complement A)\n  7. A \u003c- 0 (Clear A)\n  8. A \u003c- A' OR B (Imply)\n\n\n8 instructions were required - but we have 16 possible opcodes. That means we ended up with an additional 8 \"unintended\" or \"undocumented\" OpCodes!\n\nThe original product requirements doc follows:\n \n![Original Requirements Doc](ProjectRequirements.png)\n  \n## Original Design\n\n![](SingleStage.png)\n![](4StagesCombined.png)\n![](OriginalSchematic.png)\n\n\n## 2023 Build\n\nI decided 25 years later to try my hand at PCB design and to actually build this old project. This took 2 revisions:\n\n1. [Rev 1](df868067a174cf4c2a293e076a1fb69d7d88c638) had several issues\n  * Power pins were not connected\n  * Clock signal was not connected\n  * All of the bits input to the adder were reversed because the new tool I was using (KiCad) had the pins in a different order compared to the schematics from 1998\n  * The register LEDs were actually connected to the output of the adder, not to the output of the Flip-Flop (so I was reading what would be, not what currently was!)\n2. [Rev 2](fc047236eafd9e9970c500b91abf409b33e64aa5) fixed those problems, and did not introduce any new ones, it does work!\n  * Except that the pull-down resistors for the inputs are spec'd too high, so the carry-in bit to the adder was always around 1 volt.\n  * This should not have been a problem, those adders should not register high unless the value is at least 2v, but it was always Carrying-In an extra bit (effectively every result was the expected result + 1)\n  * Also many (optional) LEDs are added for observing the processes in play\n3. Rev 3 is currently in process\n  * Adds power filtering capacitors to the VCC of the 74's chips\n  * Inverts the output of the clock switch (in rev2 down is high and up is low)\n  * Adds an LED to show the current state of the clock input\n\nThese project files are all in KiCad format, if anyone wishes to fork / build their own / test this stuff out too\n\n\n## Images\n\n## Rev 1\n\nRev 1 Empty\n\n![](Rev1Empty.jpg)\n\nRev 1 Front\n\n![](Rev1Front.jpg)\n\nRev 1 Back with bodge wires\n\n![](Rev1Back.jpg)\n\n## Rev 2\n\nRev 2 Empty\n\n![](Rev2Empty.jpg)\n\nRev 2 Running!\n\n![](Rev2Running.jpg)\n\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flefticus%2F4bitalu","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Flefticus%2F4bitalu","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flefticus%2F4bitalu/lists"}