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returned=1 errno=0 peeraddr=140.82.121.5:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["cpu","cpuid","dub","system"],"created_at":"2024-12-01T04:12:12.374Z","updated_at":"2026-02-02T08:37:24.002Z","avatar_url":"https://github.com/libmir.png","language":"D","funding_links":[],"categories":[],"sub_categories":[],"readme":"[![Gitter](https://img.shields.io/gitter/room/libmir/public.svg)](https://gitter.im/libmir/public)\n\n[![Build Status](https://travis-ci.org/libmir/mir-cpuid.svg?branch=master)](https://travis-ci.org/libmir/mir-cpuid)\n[![Build Status](https://ci.appveyor.com/api/projects/status/github/libmir/mir-cpuid?svg=true)](https://ci.appveyor.com/project/9il/mir-cpuid/branch/master)\n\n[![Dub version](https://img.shields.io/dub/v/mir-cpuid.svg)](http://code.dlang.org/packages/mir-cpuid)\n[![Dub downloads](https://img.shields.io/dub/dt/mir-cpuid.svg)](http://code.dlang.org/packages/mir-cpuid)\n[![License](https://img.shields.io/dub/l/mir-cpuid.svg)](http://code.dlang.org/packages/mir-cpuid)\n\n# CPU Information\n\n```d\nvoid main()\n{\n    import std.stdio;\n    import cpuid.unified;\n\n    enum fmt = \"%14s: %s\";\n\n    fmt.writefln(\"cores\", cores);\n    fmt.writefln(\"threads\", threads);\n\n    fmt.writefln(\"data caches\", dCache.length);\n    fmt.writefln(\"code caches\", iCache.length);\n    fmt.writefln(\"unified caches\", uCache.length);\n\n    fmt.writefln(\"data TLBs\", dTlb.length);\n    fmt.writefln(\"code TLBs\", iTlb.length);\n    fmt.writefln(\"unified TLBs\", uTlb.length);\n}\n```\n\nThis package also can be used as workaround for [core.cpuid Issue 16028](https://issues.dlang.org/show_bug.cgi?id=16028).\n\n## Documentation\n\nhttp://mir-cpuid.libmir.org\n\n## Testing\n\nSee [all reports](https://github.com/libmir/mir-cpuid/issues?utf8=%E2%9C%93\u0026q=is%3Aissue%20label%3AReports%20).\n\nRun the following command from the project's directory to receive a report about your CPU\n\n```\ndub --single report.d\n```\n\nPlease report dub log in a new GitHub issue!\n\nSee also [output example](https://gist.github.com/9il/66d2f824ca52e1293358b86604e7fb21).\n\n## Building a betterC library\n\nBetterC mode works when compiled with LDC only.\n\n```\ndub build --compiler=ldmd2 --build-mode=singleFile --parallel\n```\n\n## API Features\n\n - API was split to _unified_, _target_ specified, and _vendor_ specified parts.\n - Complex cache topology (number of cores per cache) is supported. This feature is required by ARM CPUs.\n - Translation lookaside buffers are supported. They are used in server and math software, for example cache optimized BLAS requires TLB information.\n - Caches and TLBs are split into three types:\n \t- Data\n \t- Instruction (code)\n \t- Unified (data and code)\n - `_cpuid` function is available for x86/x86-64 targets.\n\n## Implementation Features\n\n - The library was written completely from scratch.\n - Code is clean and simple.\n - Unions and `mir.bitmanip.bitfields` are used instead of bit operations.\n - Slim betterC library with `extern(C)` insterface.\n\n## TODO\n\n - [x] Add information about recent features like AVX2, AVX512F.\n - [ ] Add information about ARM target and ARM vendors.\n - [x] Test a lot of different CPUs.\n - [ ] Extend testing infrastructure.\n - [ ] CPU(package) count identification.\n - [ ] Per CPU(package) CPUID information.\n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flibmir%2Fmir-cpuid","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Flibmir%2Fmir-cpuid","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flibmir%2Fmir-cpuid/lists"}