{"id":30865837,"url":"https://github.com/librelane/librelane","last_synced_at":"2026-02-19T10:13:40.479Z","repository":{"id":289518059,"uuid":"968608922","full_name":"librelane/librelane","owner":"librelane","description":"ASIC implementation flow infrastructure, successor to OpenLane","archived":false,"fork":false,"pushed_at":"2026-01-21T17:10:27.000Z","size":33324,"stargazers_count":255,"open_issues_count":130,"forks_count":44,"subscribers_count":4,"default_branch":"main","last_synced_at":"2026-01-22T05:45:56.744Z","etag":null,"topics":["asic","asic-design","chip-design","digital-design","eda","electronic-design-automation","librelane","openlane"],"latest_commit_sha":null,"homepage":"https://librelane.readthedocs.io","language":"Python","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"apache-2.0","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/librelane.png","metadata":{"files":{"readme":"Readme.md","changelog":"Changelog.md","contributing":null,"funding":null,"license":"License","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":"Authors.md","dei":null,"publiccode":null,"codemeta":null,"zenodo":null,"notice":null,"maintainers":null,"copyright":null,"agents":null,"dco":null,"cla":null}},"created_at":"2025-04-18T11:51:22.000Z","updated_at":"2026-01-21T01:15:50.000Z","dependencies_parsed_at":null,"dependency_job_id":"4d43cf60-8e5e-45b9-b246-76c9fc57d7d4","html_url":"https://github.com/librelane/librelane","commit_stats":null,"previous_names":["librelane/librelane"],"tags_count":177,"template":false,"template_full_name":null,"purl":"pkg:github/librelane/librelane","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/librelane%2Flibrelane","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/librelane%2Flibrelane/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/librelane%2Flibrelane/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/librelane%2Flibrelane/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/librelane","download_url":"https://codeload.github.com/librelane/librelane/tar.gz/refs/heads/main","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/librelane%2Flibrelane/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28737922,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-01-24T21:19:41.845Z","status":"ssl_error","status_checked_at":"2026-01-24T21:13:38.675Z","response_time":89,"last_error":"SSL_connect returned=1 errno=0 peeraddr=140.82.121.6:443 state=error: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["asic","asic-design","chip-design","digital-design","eda","electronic-design-automation","librelane","openlane"],"created_at":"2025-09-07T22:02:03.817Z","updated_at":"2026-02-19T10:13:40.471Z","avatar_url":"https://github.com/librelane.png","language":"Python","funding_links":[],"categories":["Python"],"sub_categories":[],"readme":"\u003ch1 align=\"center\"\u003eLibreLane\u003c/h1\u003e\n\u003cp align=\"center\"\u003e\n    \u003ca href=\"https://opensource.org/licenses/Apache-2.0\"\u003e\u003cimg src=\"https://img.shields.io/badge/License-Apache%202.0-blue.svg\" alt=\"License: Apache 2.0\"/\u003e\u003c/a\u003e\n    \u003ca href=\"https://www.python.org\"\u003e\u003cimg src=\"https://img.shields.io/badge/Python-3.8-3776AB.svg?style=flat\u0026logo=python\u0026logoColor=white\" alt=\"Python 3.8.1 or higher\" /\u003e\u003c/a\u003e\n    \u003ca href=\"https://github.com/psf/black\"\u003e\u003cimg src=\"https://img.shields.io/badge/code%20style-black-000000.svg\" alt=\"Code Style: black\"/\u003e\u003c/a\u003e\n    \u003ca href=\"https://mypy-lang.org/\"\u003e\u003cimg src=\"https://www.mypy-lang.org/static/mypy_badge.svg\" alt=\"Checked with mypy\"/\u003e\u003c/a\u003e\n    \u003ca href=\"https://nixos.org/\"\u003e\u003cimg src=\"https://img.shields.io/static/v1?logo=nixos\u0026logoColor=white\u0026label=\u0026message=Built%20with%20Nix\u0026color=41439a\" alt=\"Built with Nix\"/\u003e\u003c/a\u003e\n\u003c/p\u003e\n\u003cp align=\"center\"\u003e\n    \u003ca href=\"https://colab.research.google.com/github/librelane/librelane/blob/main/notebook.ipynb\"\u003e\u003cimg src=\"https://colab.research.google.com/assets/colab-badge.svg\" alt=\"Open in Colab\"\u003e\u003c/a\u003e\n    \u003ca href=\"https://librelane.readthedocs.io/\"\u003e\u003cimg src=\"https://readthedocs.org/projects/librelane/badge/?version=latest\" alt=\"Documentation Build Status Badge\"/\u003e\u003c/a\u003e\n    \u003ca href=\"https://fossi-chat.org\"\u003e\u003cimg src=\"https://img.shields.io/badge/Community-FOSSi%20Chat-1bb378?logo=element\" alt=\"Invite to FOSSi Chat\"/\u003e\u003c/a\u003e\n\u003c/p\u003e\n\nLibreLane is an ASIC infrastructure library based on several components including\nOpenROAD, Yosys, Magic, Netgen, CVC, KLayout and a number of custom scripts for\ndesign exploration and optimization, currently developed and maintained under\nthe stewardship of the [FOSSi Foundation](https://fossi-foundation.org).\n\nA reference flow, \"Classic\", performs all ASIC implementation steps from RTL all\nthe way down to GDSII.\n\nYou can find the documentation\n[here](https://librelane.readthedocs.io/en/latest/getting_started/) to get\nstarted. You can discuss LibreLane in the\n[FOSSi Chat Matrix Server](https://fossi-chat.org).\n\n\n## Try it out\n\nYou can try LibreLane right in your browser, free-of-charge, using Google\nColaboratory by following\n[**this link**](https://colab.research.google.com/github/librelane/librelane/blob/main/notebook.ipynb).\n\n## Installation\n\nYou'll need the following:\n\n* Python **3.8.1** or higher with PIP, Venv and Tkinter\n\n### Nix (Recommended)\n\nWorks for macOS and Linux (x86-64 and aarch64). Recommended, as it is more\nintegrated with your filesystem and overall has less upload and download deltas.\n\nSee\n[Nix-based installation](https://librelane.readthedocs.io/en/latest/installation/nix_installation/index.html)\nin the docs for more info.\n\n### Docker\n\nWorks for Windows, macOS and Linux (x86-64 and aarch64).\n\nSee\n[Docker-based installation](https://librelane.readthedocs.io/en/latest/installation/docker_installation/index.html)\nin the docs for more info.\n\nDo note you'll need to add `--dockerized` right after `librelane` in most CLI\ninvocations.\n\n### Python-only Installation (Advanced, Not Recommended)\n\n**You'll need to bring your own compiled utilities**, but otherwise, simply\ninstall LibreLane as follows:\n\n```sh\npython3 -m pip install --upgrade librelane\n```\n\nPython-only installations are presently unsupported and entirely at your own\nrisk.\n\n## Usage\n\nIn the root folder of the repository, you may invoke:\n\n```sh\npython3 -m librelane --pdk-root \u003cpath/to/pdk\u003e \u003c/path/to/config.json\u003e\n```\n\nTo start with, you can try:\n\n```sh\npython3 -m librelane --pdk-root $HOME/.ciel ./designs/spm/config.json\n```\n\n## Publication\n\nIf you use LibreLane in your research, please cite the following paper.\n\n* M. Shalan and T. Edwards, “Building OpenLANE: A 130nm OpenROAD-based\n  Tapeout-Proven Flow: Invited Paper,” *2020 IEEE/ACM International Conference\n  On Computer Aided Design (ICCAD)*, San Diego, CA, USA, 2020, pp. 1-6.\n  [Paper](https://ieeexplore.ieee.org/document/9256623)\n\n```bibtex\n@INPROCEEDINGS{9256623,\n  author={Shalan, Mohamed and Edwards, Tim},\n  booktitle={2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)}, \n  title={Building OpenLANE: A 130nm OpenROAD-based Tapeout- Proven Flow : Invited Paper}, \n  year={2020},\n  volume={},\n  number={},\n  pages={1-6},\n  doi={}}\n```\n\n## License and Legal Info\n\nLibreLane is a trademark of the [FOSSi Foundation](https://fossi-foundation.org).\n\nLibreLane code and binaries are available under\n[The Apache License, version 2.0](https://www.apache.org/licenses/LICENSE-2.0.txt).\n\nLibreLane is based on [OpenLane 2](https://github.com/efabless/openlane2)\nby Efabless Corporation:\n\n```\nCopyright 2022-2025 Efabless Corporation\n\nLicensed under the Apache License, Version 2.0 (the \"License\");\nyou may not use this file except in compliance with the License.\nYou may obtain a copy of the License at\n\n     http://www.apache.org/licenses/LICENSE-2.0\n\nUnless required by applicable law or agreed to in writing, software\ndistributed under the License is distributed on an \"AS IS\" BASIS,\nWITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\nSee the License for the specific language governing permissions and\nlimitations under the License.\n``` \n","project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flibrelane%2Flibrelane","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Flibrelane%2Flibrelane","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flibrelane%2Flibrelane/lists"}