{"id":16297783,"url":"https://github.com/lionleaf/dmkonst","last_synced_at":"2026-01-20T09:01:54.358Z","repository":{"id":20281600,"uuid":"23554903","full_name":"lionleaf/dmkonst","owner":"lionleaf","description":"An optimized pipelined MIPS CPU written in VHDL","archived":false,"fork":false,"pushed_at":"2015-01-17T16:59:42.000Z","size":6685,"stargazers_count":10,"open_issues_count":0,"forks_count":2,"subscribers_count":5,"default_branch":"master","last_synced_at":"2025-04-09T15:53:27.941Z","etag":null,"topics":["processor","vhdl"],"latest_commit_sha":null,"homepage":"","language":"VHDL","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":null,"status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/lionleaf.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":null,"code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null}},"created_at":"2014-09-01T20:29:23.000Z","updated_at":"2024-01-22T22:13:17.000Z","dependencies_parsed_at":"2022-08-25T19:21:04.008Z","dependency_job_id":null,"html_url":"https://github.com/lionleaf/dmkonst","commit_stats":null,"previous_names":[],"tags_count":0,"template":false,"template_full_name":null,"purl":"pkg:github/lionleaf/dmkonst","repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lionleaf%2Fdmkonst","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lionleaf%2Fdmkonst/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lionleaf%2Fdmkonst/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lionleaf%2Fdmkonst/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/lionleaf","download_url":"https://codeload.github.com/lionleaf/dmkonst/tar.gz/refs/heads/master","sbom_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lionleaf%2Fdmkonst/sbom","scorecard":null,"host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":286080680,"owners_count":28599832,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2026-01-20T08:51:33.170Z","status":"ssl_error","status_checked_at":"2026-01-20T08:51:10.855Z","response_time":117,"last_error":"SSL_read: unexpected eof while reading","robots_txt_status":"success","robots_txt_updated_at":"2025-07-24T06:49:26.215Z","robots_txt_url":"https://github.com/robots.txt","online":false,"can_crawl_api":true,"host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["processor","vhdl"],"created_at":"2024-10-10T20:42:46.661Z","updated_at":"2026-01-20T09:01:54.331Z","avatar_url":"https://github.com/lionleaf.png","language":"VHDL","readme":"TDT4255 Computer Construction\n==========\n\nUniversity project as part of TDT4255 at the Norwegian University of Science and Technology.\n\nWritten by Aleksander Wasaznik, Geir Kulia and Andreas Løve Selvik.\n\nNote: During this semester both Aleksander and Andreas was also part of the ambitious course \"Computer Design Project\" where we built a computer from the ground up with a custom GPU. Those repositories can be found here: https://github.com/dmpro2014\n\nThe exercise was split in four parts:\n\n0. Tutorial\n-----------\nThe result of following a tutorial step by step to introduce VHDL and the toolchain, which was a good thing, as most of us had never touch a hardware definition language.\n\n1. A simple stack machine   (stack-machine)\n-----------\nAn simple introduction to VHDL and the toolchain where we had to build a simple stack-machine that can calculate\nmathematical expressions with +, -, * and / written in reverse polish notation.\nHere we had to design the RTL ourselves.\n\n2. A multicycle MIPS processor (multi-cycle-mips)\n-----------\nGiven a subset of the MIPS instruction set and the requirement that it had to be a a multi-cycle implementation (no pipelining) we designed and implemented this processor. It was inspired by the processor detailed in Computer Organization and Design [Patterson and Hennessy]. \nThe resulting implementation was succesfully tested on a Spartan-6 FPGA.\nWe spent a lot of effort on optimizing the design and VHDL to get the highest possible performance, and we had among the fastest processors.\n\nThis exercise counted 25% of our grade.\n\n[Direct link to the report.](https://github.com/lionleaf/dmkonst/blob/master/multi-cycle-mips-report.pdf?raw=true)\n\n3. A pipelined MIPS processor with optimizations (pipeline-mips)\n----------\nWe pipelined the processor from the last exercise. And then introduced optimizations, such as forwarding, hazard detection and branch handling to deal with the pipeline hazards.\nThis processor was also successfully tested on a Spartan-6 FPGA.\nWe spent quite some time playing with the VHDL language to try to implement the pipeline registers as clean as possible, which can be seen in various branches of this repository.\n\nThis exercise also accounted for 25% of our grade.\n\n[Direct link to the report.](https://github.com/lionleaf/dmkonst/blob/master/pipeline-mips-report.pdf?raw=true)\n","funding_links":[],"categories":[],"sub_categories":[],"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flionleaf%2Fdmkonst","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Flionleaf%2Fdmkonst","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flionleaf%2Fdmkonst/lists"}