{"id":13398944,"url":"https://github.com/lnis-uofu/OpenFPGA","last_synced_at":"2025-03-14T03:31:00.479Z","repository":{"id":37876767,"uuid":"137416811","full_name":"lnis-uofu/OpenFPGA","owner":"lnis-uofu","description":"An Open-source FPGA IP Generator","archived":false,"fork":false,"pushed_at":"2024-09-14T02:54:14.000Z","size":92922,"stargazers_count":813,"open_issues_count":119,"forks_count":161,"subscribers_count":43,"default_branch":"master","last_synced_at":"2024-09-14T16:22:38.130Z","etag":null,"topics":["fpga","fpga-soc"],"latest_commit_sha":null,"homepage":"https://openfpga.readthedocs.io/en/master/","language":"Verilog","has_issues":true,"has_wiki":null,"has_pages":null,"mirror_url":null,"source_name":null,"license":"mit","status":null,"scm":"git","pull_requests_enabled":true,"icon_url":"https://github.com/lnis-uofu.png","metadata":{"files":{"readme":"README.md","changelog":null,"contributing":null,"funding":null,"license":"LICENSE","code_of_conduct":null,"threat_model":null,"audit":null,"citation":null,"codeowners":null,"security":null,"support":null,"governance":null,"roadmap":null,"authors":null,"dei":null,"publiccode":null,"codemeta":null}},"created_at":"2018-06-14T22:49:34.000Z","updated_at":"2024-09-13T17:30:09.000Z","dependencies_parsed_at":"2024-09-16T23:43:56.203Z","dependency_job_id":"2cc7f49a-f28f-4be9-8c1b-11ca6e1ef4ae","html_url":"https://github.com/lnis-uofu/OpenFPGA","commit_stats":null,"previous_names":["lnis-projects/openfpga"],"tags_count":8,"template":false,"template_full_name":null,"repository_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lnis-uofu%2FOpenFPGA","tags_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lnis-uofu%2FOpenFPGA/tags","releases_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lnis-uofu%2FOpenFPGA/releases","manifests_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/lnis-uofu%2FOpenFPGA/manifests","owner_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners/lnis-uofu","download_url":"https://codeload.github.com/lnis-uofu/OpenFPGA/tar.gz/refs/heads/master","host":{"name":"GitHub","url":"https://github.com","kind":"github","repositories_count":221432668,"owners_count":16820053,"icon_url":"https://github.com/github.png","version":null,"created_at":"2022-05-30T11:31:42.601Z","updated_at":"2022-07-04T15:15:14.044Z","host_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub","repositories_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories","repository_names_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/repository_names","owners_url":"https://repos.ecosyste.ms/api/v1/hosts/GitHub/owners"}},"keywords":["fpga","fpga-soc"],"created_at":"2024-07-30T19:00:32.913Z","updated_at":"2024-10-25T14:31:58.022Z","avatar_url":"https://github.com/lnis-uofu.png","language":"Verilog","funding_links":[],"categories":["Projects (sorted by year)","FPGAs","Verilog","C","FPGA Architectures","Applications","Hardware Accelerators"],"sub_categories":["2018","Reconfigurable / Open Source FPGA"],"readme":null,"project_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flnis-uofu%2FOpenFPGA","html_url":"https://awesome.ecosyste.ms/projects/github.com%2Flnis-uofu%2FOpenFPGA","lists_url":"https://awesome.ecosyste.ms/api/v1/projects/github.com%2Flnis-uofu%2FOpenFPGA/lists"}